Commit graph

14436 commits

Author SHA1 Message Date
Ye Li
6306f75d8e drivers: misc: imx8ulp: Add S400 API for image authentication
Add S400 API for image authentication

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:51 +02:00
Ye Li
aadd6ca158 arm: imx8ulp: Update the reset vector in u-boot
Because we have set reset vector to ATF in SPL, have to set it back
to ROM for any reset in u-boot

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:51 +02:00
Peng Fan
3a01f723ab arm: imx8ulp: disable wdog3
Disable wdog3 which is configured by ROM

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:51 +02:00
Ye Li
610083e547 arm: imx8ulp: Enable full L2 cache in SPL
SRAM2 is half L2 cache and default to SRAM after system boot.
To enable the full l2 cache (512KB), it needs to reset A35 to make
the change happen.

So re-implement the jump entry function in SPL:
1. configure the core0 reset vector to entry (ATF)
2. enable the L2 full cache
3. reset A35
So when core0 up, it runs into ATF. And we have 512KB L2 cache working.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:51 +02:00
Ye Li
981f040a9a arm: imx8ulp: soc: Change to use CMC1 to get bootcfg
CMC1 also has a MR register for bootcfg

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09 14:46:51 +02:00
Peng Fan
a84dab4f70 arm: imx8ulp: add clock support
Add i.MX8ULP clock support

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:51 +02:00
Ye Li
0c00d03aca driver: misc: Add MU and S400 API to communicate with Sentinel
Add MU driver and S400 API. Need enable MISC driver to work

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09 14:46:50 +02:00
Peng Fan
3854a066f2 arm: imx: move container Kconfig under mach-imx
Since i.MX8 and i.MX8ULP reuse common container, so move the Kconfig
public to both.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:50 +02:00
Ye Li
6f3858d732 arm: imx8ulp: add container support
i.MX8ULP support using ROM API to load container image,
it use same ROM API as i.MX8MN/MP, and use same container format
as i.MX8QM/QXP.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:50 +02:00
Peng Fan
20ed81eaeb arm: imx: parse-container: guard included header files
Guard included sci.h with CONFIG_AHAB_BOOT to avoid build failure
for i.MX8ULP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:50 +02:00
Ye Li
31f0085285 arm: imx8: Move container image header file to mach-imx
Since the container is shared among i.MX platforms, move its header file
to mach-imx

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:50 +02:00
Ye Li
7d84978c9c arm: imx8: Move container parser and image to mach-imx common folder
Since we will re-use the container parser on imx8ulp, move the codes
to mach-imx

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09 14:46:50 +02:00
Peng Fan
9ef89ea9b0 arm: imx: basic i.MX8ULP support
Add basic i.MX8ULP support

For the MMU part, Using a simple way the calculate the MMU size to avoid
default heavy calcaulation. And align address and size in the table
settings to 2MB or 4GB as much as possible. So we can reduce the 4K page
allocations in MMU table which will spends much time in create the
page table

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:50 +02:00
Peng Fan
c17f5935cf imx: imx8ulp: add get reset cause
Add get reset cause function to show what triggerred reset.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:50 +02:00
Peng Fan
77c3b9cc98 arm: imx8ulp: support print cpu info
Support print cpu info. the clock function has not been added, it will
be added in following patches.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:50 +02:00
Peng Fan
5f17fef893 arm: imx: sys_proto: move boot mode define to common header
These defines could be reused by i.MX8ULP, so move them
to common header.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:50 +02:00
Peng Fan
331d40d701 arm: imx: add i.MX8ULP cpu type and helper
Add i.MX8ULP cpu type and helpers.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:50 +02:00
Peng Fan
19b990b4f7 arm: imx: add i.MX8ULP basic Kconfig option
Add i.MX8ULP related basic Kconfig option, which will be used later.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:50 +02:00
Fabio Estevam
1d1f3c8099 mx28evk: Convert to driver model
Make the conversion to driver model as it is mandatory.

Successfully tested booting Linux from the SD card.

Dropped support for networking and splash screen as these need
to be properly converted to DM and tested.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-08-09 14:46:50 +02:00
Sebastian Reichel
3bbc48e8f1 board: ge: bx50v3: Add PCIe reset to DT
Add PCIe reset gpio to the Bx50v3 devicetree and get get rid of
CONFIG_PCIE_IMX_PERST_GPIO.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2021-08-09 14:46:50 +02:00
Tim Harvey
a8a72c3ce9 board: gateworks: venice: add imx8mm-gw7902 support
The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC

Do the following to add support for it:
- add dts
- add PMIC config

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-08-09 14:46:50 +02:00
Tim Harvey
42bc70d14a arm: dts: imx8mm-venice-gw7901: use common u-boot dtsi
Use the common imx8mm-u-boot.dtsi

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-08-09 14:46:50 +02:00
Tim Harvey
aea162c10e arm: dts: imx8mm-venice-gw700x: fix fifo-depth phy props
Replace the deprecated 'tx-fifo-depth' and 'rx-fifo-depth' properties
not supported by U-Boot drivers/net/phy/dp83867.c with the proper
'ti,fifo-depth' property.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-08-09 14:46:50 +02:00
Tim Harvey
98559e02f1 arm: dts: imx8mm-venice-gw71xx: fix USB OTG VBUS
The GW71xx has a USB Type-C connector with USB 2.0 signaling. GPIO1_12
is the power-enable to the TPS25821 Source controller and power switch
responsible for monitoring the CC pins and enabling VBUS. Therefore
GPIO1_12 must always be enabled and the vbus output enable from the
IMX8MM can be ignored.

To fix USB OTG VBUS enable a pull-up on GPIO1_12 to always power the
TPS25821 and change the regulator output to GPIO1_10 which is
unconnected.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-08-09 14:46:50 +02:00
Tim Harvey
a194e6ed45 imx: ventana: remove hard-coded USB OTG pinmux
pinmux is now done via dt. Add missing OTG_OC pinmux for boards that
use it.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-08-09 14:46:50 +02:00
Tim Harvey
dd79c97b92 imx: ventana: fix UMS support
The Gateworks Ventana boards have always had usb0=usbh1 and usb1=usbotg
because OTG is often subloaded on these boards and a bit in the EEPROM
which flagging that OTG is subloaded is used to remove the dt node via the
alias.

U-Boot DM_USB UMS requires the usb0 alias be assigned to the usbotg
so fix the usb0 alias in order for UMS to work.

Fixes 72c46327f0: ("imx: ventana: enable dm support for USB")

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-08-09 14:46:50 +02:00
Fabio Estevam
3f24bd329b imx28-evk: Import devicetree file from Linux
Import the imx28-evk devicetree files from Linux kernel
version 5.11-rc7.

This is in preparation for converting the mx28evk_defconfig
target to driver model.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-08-06 13:26:08 +02:00
Tom Rini
b91c704333 Merge https://source.denx.de/u-boot/custodians/u-boot-samsung 2021-08-03 09:07:01 -04:00
Simon Glass
0b1284eb52 global: Convert simple_strtoul() with decimal to dectoul()
It is a pain to have to specify the value 10 in each call. Add a new
dectoul() function and update the code to use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02 13:32:14 -04:00
Simon Glass
7e5f460ec4 global: Convert simple_strtoul() with hex to hextoul()
It is a pain to have to specify the value 16 in each call. Add a new
hextoul() function and update the code to use it.

Add a proper comment to simple_strtoul() while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02 13:32:14 -04:00
Tom Rini
5371593aed Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi
- Move the PSCI runtime code for H3/A23/A33 into SRAM
- Pick the environment from the actual MMC boot device (SD card vs.
  eMMC)
- Plus a small improvement from Icenowy, just for good measure.
2021-07-31 20:51:24 -04:00
Icenowy Zheng
001ec430be sunxi: decide the inclusion of SCP by SCP_ADDR existence
There are more Allwinner SoCs that do not have a SCP now.

When there's no SCP_ADDR macro defined, we can assume there's no SCP
available.

Drop the scp part of FIT description when SCP_ADDR does not exist.

Signed-off-by: Icenowy Zheng <icenowy@sipeed.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-08-01 00:11:34 +01:00
Samuel Holland
1ebfc0c631 sunxi: A23/A33/H3: Move sun8i secure monitor to SRAM A2
So far for the H3, A23, and A33 SoCs, we use DRAM to hold the secure
monitor code (providing PSCI runtime services). And while those SoCs do
not have the secure SRAM B like older SoCs, there is enough (secure)
SRAM A2 to put the monitor code and data in there instead.

Follow the design of 64-bit SoCs and use the first part for the monitor,
and the last 16 KiB for the SCP firmware. With this change, the monitor
no longer needs to reserve a region in DRAM.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: amend commit message, fix R40 and V3s build]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-08-01 00:11:34 +01:00
Pali Rohár
2226ca1734 arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage header
Now that proper load and execution addresses are set in v1 kwbimage we
can use it for loading and booting U-Boot proper.

Use the new spl_parse_board_header() function to implement parsing the
kwbimage v1 header. Use information from this header to locate offset and
size of the U-Boot proper binary, instead of using the legacy U-Boot
header which is prepended to the U-Boot proper binary stored at fixed
offset. This has the advantage that we do not need to relay on legacy
U-Boot header anymore and therefore U-Boot proper binary can be stored at
any offset, as is the case when loading & booting U-Boot proper by
BootROM. The CONFIG_SYS_U_BOOT_OFFS option is therefore not used by SPL
code anymore.

Also allow to compile U-Boot SPL without CONFIG_SPL_SPI_FLASH_SUPPORT,
CONFIG_SPL_MMC_SUPPORT or CONFIG_SPL_SATA_SUPPORT set. In this case
BootROM is used for loading and executing U-Boot proper. This reduces the
size of U-Boot's SPL image. By default these config options are enabled
and so BootROM loading is not used. In some cases BootROM reads from SPI
NOR at lower speed than U-Boot SPL. So people can decide whether they
want to have smaller SPL binary at the cost of slower boot.

Therefore dependency on CONFIG_SPL_DM_SPI, CONFIG_SPL_SPI_FLASH_SUPPORT,
CONFIG_SPL_SPI_LOAD, CONFIG_SPL_SPI_SUPPORT, CONFIG_SPL_DM_GPIO,
CONFIG_SPL_DM_MMC, CONFIG_SPL_GPIO_SUPPORT, CONFIG_SPL_LIBDISK_SUPPORT,
CONFIG_SPL_MMC_SUPPORT, CONFIG_SPL_SATA_SUPPORT and
CONFIG_SPL_LIBDISK_SUPPORT is changed from strict to related "imply"
(which can be selectivelly turned off and causes booting via BootROM).

Options CONFIG_SYS_SPI_U_BOOT_OFFS,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR and
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET have to to be set to
zero as they define the location where kwbimage header starts. It is the
location where BootROM expects start of the kwbimage from which it reads,
parses and executes SPL part. The same applies to option
CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR, which has to be set to one.

Update all config files to set correct values of these options and set
CONFIG_SYS_U_BOOT_OFFS to the correct value - the offset where U-Boot
proper starts.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-31 09:59:58 +02:00
Pali Rohár
abbf2179b2 arm: mvebu: Use U-Boot's SPL BootROM framework for booting from NAND/UART
Current code uses hack in board_init_f() which calls return_to_bootrom()
to skip U-Boot SPL code and return back to BootROM to load U-Boot via
UART or from NAND.

This change migrates that hack from the board_init_f() function and
changes it to return BOOT_DEVICE_BOOTROM instead of returning to BootROM
directly, so that U-Boot's SPL framework is used for returning to
BootROM.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Chris Packham <judge.packham@gmail.com>
2021-07-31 09:49:32 +02:00
Pali Rohár
9d0225b7fa arm: mvebu: Implement return_to_bootrom() via U-Boot's SPL framework
U-Boot's SPL framework already has an API for loading U-Boot via
BootROM.

Implement the function board_return_to_bootrom() for mvebu SPL code.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Chris Packham <judge.packham@gmail.com>
2021-07-31 09:49:32 +02:00
Pali Rohár
e1cd0d424c arm: mvebu: Mark return_to_bootrom() as a noreturn function
This function does not return, so add the appropriate compiler flag.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Chris Packham <judge.packham@gmail.com>
2021-07-31 09:49:32 +02:00
Pali Rohár
4375598c52 arm: mvebu: Fix return_to_bootrom()
Register r0 should be set to return value 0x0 - NO_ERR.

Set r0 with return value after all registers are restored from the
stack, so that the return value is always correct.

Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 944c7a3176 ("arm: mvebu: Add option to use UART xmodem protocol via kwboot")
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Chris Packham <judge.packham@gmail.com>
2021-07-31 09:49:32 +02:00
Tom Rini
15f7e0dc01 Merge branch '2021-07-28-assorted-fixes'
- Assorted bugfixes
2021-07-29 12:10:55 -04:00
Tom Rini
38436abd5e Merge tag 'ti-v2021.10-rc2' of https://source.denx.de/u-boot/custodians/u-boot-ti
- Add MMC High speed modes for AM64 and J7200
- Add Sierra/Torrent SERDES driver
- Minor clean-ups for R5F boot from SPL
2021-07-29 08:20:06 -04:00
Patrice Chotard
268f6ac1f9 arm64: Update memcpy_{from, to}io() helpers
At early U-Boot stage, before relocation, MMU is not yet configured
and disabled. DDR may not be configured with the correct memory
attributes (can be configured in MT_DEVICE instead of MT_MEMORY).

In this case, usage of memcpy_{from, to}io() may leads to synchronous
abort in AARCH64 in case the normal memory address is not 64Bits aligned.

To avoid such situation, forbid usage of normal memory cast to (u64 *) in
case MMU is not enabled.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: mark.kettenis@xs4all.nl
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-28 19:30:22 -04:00
Patrick Delaunay
558e699d15 arm: use the correct prototype for reset_cpu function
Align reset_cpu function with the next prototypes in
sysreset.h or in cpu_func.h to solve compilation issue:

  void reset_cpu(void);

This patch solves the prototype conflict when cpu_func.h is
included.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-28 19:30:22 -04:00
Simon Glass
975e7cf301 i2c: Rename SPL/TPL_I2C_SUPPORT to I2C
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-28 14:29:37 -04:00
Simon Glass
69d9eda4da i2c: Rename CONFIG_SYS_I2C to CONFIG_SYS_I2C_LEGACY
It is quite confusing that CONFIG_SYS_I2C selects the legacy I2C and
CONFIG_DM_I2C selects the current I2C. The deadline to migrate I2C is less
than a year away.

Also we want to have a CONFIG_I2C for U-Boot proper just like we have
CONFIG_SPL_I2C for SPL, so we can simplify the Makefile rules.

Rename this symbol so it is clear it is going away.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-28 14:29:37 -04:00
Simon Glass
9ca00684db Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28 14:29:37 -04:00
Simon Glass
83061dbd1c Rename GPIO_SUPPORT to GPIO
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28 14:29:36 -04:00
Simon Glass
333e4a621d Rename SPL_USB_HOST_SUPPORT to SPL_USB_HOST
Rename this option so that CONFIG_IS_ENABLED can be used with it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28 14:27:54 -04:00
Simon Glass
078111b9c0 Rename SPL_WATCHDOG_SUPPORT to SPL_WATCHDOG
Rename this option so that CONFIG_IS_ENABLED can be used with it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28 14:27:54 -04:00
Simon Glass
89ddb0bfeb Rename SPL_MUSB_NEW_SUPPORT to SPL_MUSB_NEW
Rename this option so that CONFIG_IS_ENABLED can be used with it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28 14:27:54 -04:00
Simon Glass
f2d7a36ec2 Rename SPL_ETH_SUPPORT to SPL_ETH
Rename this option so that CONFIG_IS_ENABLED can be used with it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28 14:27:54 -04:00