Commit graph

4 commits

Author SHA1 Message Date
Thierry Reding
1e669b4808 ARM: tegra: Rename pcie-controller to pcie
Recent versions of DTC have checks for PCI host bridge device tree nodes
that are named something other than "pci" or "pcie". Fix all occurrences
of such nodes for Tegra boards to avoid potential warnings from DTC.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-06-05 09:16:35 -07:00
Simon Glass
f53dcc0e35 tegra: fdt: Ensure that the console UART is enabled
Many tegra boards have the console UART node disabled. With livetree this
prevents serial from working since it does not 'force' the console to be
bound. Updates the affected boards to fix this error.

The boards were checked with:

for b in $(grep  tegra boards.cfg  |grep -v integrator | \
		awk '{print $7}' | sort); do
	echo $b;
	fdtgrep -c nvidia,tegra20-uart b/$b/u-boot.dtb |grep okay;
done

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
2017-07-11 10:08:20 -06:00
Stephen Warren
67748a73b1 mmc: tegra: use correct alias for SDHCI/MMC nodes
The Tegra MMC driver currently honors "sdhci" entries in /aliases. The
MMC core however uses "mmc" entries in /aliases. This difference will be
relevant once the Tegra MMC driver is converted to DM, and the MMC core
handles alias lookups. To avoid issues during that conversion, fix the
Tegra MMC driver and all Tegra DTs to use the same alias name as the MMC
core does.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-27 09:11:01 -07:00
Peter Chubb
b615267633 ARM: tegra: Add support for TK1-SOM board from Colorado Engineering
The Colorado TK1 SOM is a small form factor board similar to the
Jetson TK1.  The main differences lie in the pinmux, and in that the
PCIe controller is set to use in 4lanes+1lane, rather than 2+2.

The pinmux header here was generated from a spreadsheet provided by
Colorado Engineering using the tegra-pinmux scripts.  The spreadsheet
was converted from v09 to v11 by me.

Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-01 09:24:30 -07:00