Commit graph

10 commits

Author SHA1 Message Date
Masahiro Yamada
dd43e2a6bd mmc: sdhci-cadence: add HS200 support
Add HS200 timing setting and the MMC tuning callback.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
4041bf7f8a mmc: sdhci-cadence: call mmc_of_parse()
This is needed to parse more capabilities such as mmc-hs200-1_8v.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
954a963146 mmc: sdhci-cadence: use bitfield access macros for cleanup
This driver is a counterpart from the one in Linux.  Follow the
clean-up I did in Linux.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
3d3108d459 mmc: sdhci-cadence: set timing mode register depending on frequency
The MMC framework in U-Boot does not support a systematic API for
timing switch like mmc_set_timing() in Linux.

U-Boot just provides a hook to change the clock frequency via
mmc_set_clock().  It is up to drivers if additional register
settings are needed.

This driver needs to set a correct timing mode into a register when
it migrates to a different speed mode.  Only increasing clock frequency
could result in setup/hold timing violation.

The timing mode should be decided by checking MMC_TIMING_* like
drivers/mmc/host/sdhci-cadence.c in Linux, but "timing" is not
supported by U-Boot for now.  Just use mmc->clock to decide the
timing mode.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-09-29 11:34:22 +09:00
Masahiro Yamada
aae6f016a7 mmc: cadence: use fdt32_t for DT property value to fix sparse warning
DTB is encoded in big endian.  When we retrieve property values,
we need to use fdt32_to_cpu (aka be32_to_cpu) for endian conversion.
This is a bit error-prone, but sparse is useful to detect endian
mismatch.

We need to use (fdt32_t *) instead of (u32 *) for a pointer of a
property value.  Otherwise sparse warns "cast to restricted __be32".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-07-19 19:13:59 +09:00
Simon Glass
da409ccc4a dm: core: Replace of_offset with accessor (part 2)
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:04 -06:00
Simon Glass
a821c4af79 dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.

In the end we will have:

   1. dev_read_addr...()    - works on devices, supports flat/live tree
   2. devfdt_get_addr...()  - current functions, flat tree only
   3. of_get_address() etc. - new functions, live tree only

All drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.

Note this involves changing some dead code - the imx_lpi2c.c file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:01 -06:00
Simon Glass
9d922450aa dm: Use dm.h header when driver mode is used
This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 06:57:52 -06:00
Masahiro Yamada
0cacd6b755 mmc: sdhci-cadence: import updates from Linux 4.12
This driver is a counterpart of drivers/mmc/host/sdhci-cadence.c
from Linux.  Some updates for v4.12-rc1 can be imported to U-Boot.

 - Fix value of SDHCI_CDNS_HRS04_RDATA_SHIFT
 - Add polling for ACK bit to be sure that data are written to
   the PHY register
 - Retrieve PHY values from DT properties instead of fixed data

The following is the list of upstream commits:

 - Linux commit 4e03f628b464e0580abadf5161eaa38c61d20943
   mmc: sdhci-cadence: fix bit shift of read data from PHY port

 - Linux commit a0f8243229ed071c8da0ea7cedc1b7bf1b1515da
   mmc: sdhci-cadence: Fix writing PHY delay

 - Linux commit a89c472d8b55c5afc4c79e6e3d1338730034eb01
   mmc: sdhci-cadence: Update PHY delay configuration

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-15 18:28:22 +09:00
Masahiro Yamada
e5e7a7c204 mmc: sdhci-cadence: add Cadence SD4HC support
Add a driver for the Cadence SD4HC SD/SDIO/eMMC Controller.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-11 19:40:14 +09:00