Commit graph

11 commits

Author SHA1 Message Date
Simon Glass
401d1c4f5d common: Drop asm/global_data.h from common header
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-02 15:33:42 -05:00
Simon Glass
02d7a53ce6 bloblist: Add missing tag names
Add tag names for recently added types.

Fixes: d2cb7a22da (x86: Allow putting some tables in the bloblist)
Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Simon Glass
9fe064646d bloblist: Support relocating to a larger space
Typically in TPL/SPL the bloblist is quite small. But U-Boot proper may
want to add a lot more to it, such as ACPI tables.

Add a way to expand the bloblist by relocating it in U-Boot proper, along
with the other relocation activities.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Simon Glass
4c1497e776 bloblist: Allow custom alignment for blobs
Some blobs need a larger alignment than the default. For example, ACPI
tables often start at a 4KB boundary. Add support for this.

Update the size of the test blob to allow these larger records.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Simon Glass
751b7c7963 bloblist: Tidy up the data alignment
The intention which bloblists is that each blob's data is aligned in
memory. At present it is only the headers that are aligned.

Update the code to correct this and add a little more documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Simon Glass
4aed227623 bloblist: Add a command
It is helpful to be able to see basic statistics about the bloblist and
also to list its contents. Add a 'bloblist' command to handle this.

Put the display functions in the bloblist modules rather than in the
command code itself. That allows showing a list from SPL, where commands
are not available.

Also make bloblist_first/next_blob() static as they are not used outside
this file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Simon Glass
b83994dec7 bloblist: Zero records when adding
It is convenient for bloblist to zero out the contents of a records when
it is added. This saves the callers having to do it.

Update the API accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
02247c1887 bloblist: Tidy up a few comments and code-style nits
Add a messing error code to bloblist_new() and tidy up the line length in
bloblist_addrec().

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
5b044548f5 bloblist: Add a new function to add or check size
A common check is to see if a blob is present, create it if not and make
sure that the size is large enough. Add a function to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
3db7110857 crc32: Use the crc.h header for crc functions
Drop inclusion of crc.h in common.h and use the correct header directly
instead.

With this we can drop the conflicting definition in fw_env.h and rely on
the crc.h header, which is already included.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:08 -05:00
Simon Glass
9f407d4ef0 Add core support for a bloblist to convey data from SPL
At present there is no standard way in U-Boot to pass information from SPL
to U-Boot proper. But sometimes SPL wants to convey information to U-Boot
that U-Boot cannot easily figure out. For example, if SPL sets up SDRAM
then it might want to pass the size of SDRAM, or the location of each
bank, to U-Boot proper.

Add a new 'bloblist' feature which provides this. A bloblist is set up in
the first phase of U-Boot that runs (i.e. TPL or SPL). The location of
this info may be in SRAM or CAR (x86 cache-as-RAM) or somewhere else.

Information placed in this region is preserved (with a checksum) through
TPL and SPL and ends up in U-Boot. At this point it is copied into SDRAM
so it can be used after relocation.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Dannenberg <dannenberg@ti.com>
2018-11-26 08:25:32 -05:00