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27609 commits

Author SHA1 Message Date
Mike Frysinger
dd14af7640 Blackfin: new spibootldr command
Newer Blackfin parts can an on-chip ROM that can boot LDRs over SPI flashes,
so add a new 'spibootldr' command to take advantage of it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:04 -04:00
Mike Frysinger
67c2829b64 Blackfin: support embedding the environment into loader files (LDRs)
For the most part, the Blackfin processor boots files in the LDR format
rather than binary/ELF files.  So we want to export the environment as a
raw blob to the LDR utility so it can embed it at the right location.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:03 -04:00
Mike Frysinger
31f30c9eb6 add %.c->%.i and %.c->%.s rules
The Linux kernel has some helper rules which allow you to quickly produce
some of the intermediary files from C source.  Specifically, you can
create .i files which is the preprocessed output and you can create .s
files which is the assembler output.  This is useful when you are trying
to track down header/macro expansion errors or inline assembly errors.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-14 23:36:47 +02:00
Mike Frysinger
6d1ce38787 make sure toplevel $(SUBDIRS) is always declared
The $(SUBDIRS) variable is only declared when U-Boot has been configured,
but it gets used all the time.  In the non-configured case, it is used to
generate a helpful error message, but it needs to be set properly for that
to occur.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 23:12:30 +02:00
Grzegorz Bernacki
1260233982 digsy mtc: Add description to GPIO initial configuration.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2009-06-14 23:06:03 +02:00
Grzegorz Bernacki
12304871bc digsy MTC: Add 'mtc' command.
New command allows to:
     o check FW version
     o set LED status
     o set digital output status
     o get digital input status

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2009-06-14 23:04:37 +02:00
Grzegorz Bernacki
f1f66edfc7 digsy MTC: Add SPI support.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2009-06-14 23:03:57 +02:00
Grzegorz Bernacki
6325b7780d mpc52xx: Add SPI driver.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2009-06-14 23:01:38 +02:00
Mike Frysinger
5ec5529b82 allow boards to customize compiler options on a per-file/dir basis
With our Blackfin boards, we like to build the compression routines with
-O2 as our tests show a pretty good size/speed tradeoff.  For the rest of
U-Boot though, we want to stick with the default -Os as that is mostly
control code.  So in our case, we would add a line like so to the board
specific config.mk file:
	CFLAGS_lib_generic += -O2

Now all files under lib_generic/ will have -O2 appended to their build.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-14 22:44:24 +02:00
Wolfgang Denk
92afd368bb Merge branch 'next' of ../master 2009-06-14 22:05:42 +02:00
Wolfgang Denk
6b1f78ae6a Prepare v2009.06
Update CHANGELOG, fix minor coding stylke issue. Update Makefile.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-06-14 21:30:39 +02:00
Wolfgang Denk
c3147c1762 Revert "SMC911x driver fixed for NFS boot"
This reverts commit ca9c8a1e10,
which causes compile warnings ("large integer implicitly truncated
to unsigned type") on all systems that use this driver. The warning
results from passing long constants (TX_CFG, RX_CFG) into
smc911x_set_mac_csr() which is declared to accept "unsigned
character" arguments only.

Being close to a release, with nobody available to actually test the
code or the suggested fixes, it seems better to revert the patch.
2009-06-14 20:31:36 +02:00
Peter Tyser
388517e4b7 xes: Update Freescale clock code to work with 86xx processors
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:23:47 -05:00
Peter Tyser
25623937bb xes: Update Freescale DDR code to work with 86xx processors
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:23:45 -05:00
Peter Tyser
bef3013908 xes: Update Freescale PCI code to work with 86xx processors
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:23:43 -05:00
Peter Tyser
6442b71b52 85xx: Add PORBMSR and PORDEVSR shift defines
Add defines similar to those already used for the the 86xx architecture.
This will ease sharing of PCI code between the 85xx and 86xx
architectures.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:20:52 -05:00
Peter Tyser
2f21ce4d54 fsl/85xx, 86xx: Sync up DMA code
The following changes were made to sync up the DMA code between the 85xx
and 86xx architectures which will make it easier to break out common
8xxx DMA code:

85xx:
- Don't set STRANSINT and SPCIORDER fields in SATR register.  These bits
  only have an affect when the SBPATMU bit is set.
- Write 0xffffffff instead of 0xfffffff to clear errors in the DMA
  status register.  We may as well clear all 32 bits of the register...

86xx:
- Add CONFIG_SYS_MPC86xx_DMA_ADDR define to address DMA registers
- Add clearing of errors in the DMA status register when initializing
  the controller
- Clear the channel start bit in the DMA mode register after a transfer

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:58 -05:00
Peter Tyser
b1f12650d3 fsl: Create common fsl_dma.h for 85xx and 86xx cpus
Break out DMA structures for the Freescale MPC85xx and MPC86xx cpus to
reduce a large amount of code duplication

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:45 -05:00
Haiying Wang
3bd8e532b5 85xx: Add UEC6 and UEC8 at SGMII mode for MPC8569MDS
On MPC8569MDS board, UCC6 and UCC8 can be configured to work at SGMII mode via
UEM on PB board. Since MPC8569 supports up to 4 Gigabit Ethernet ports, we
disable UEC6 and UEC8 by default.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:02 -05:00
Haiying Wang
e8efef7c1b drivers/qe: add sgmii support in for UEC driver
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:02 -05:00
Haiying Wang
8e55258f14 qe: Pass in uec_info struct through uec_initialize
The uec driver contains code to hard code configuration information for the uec
ethernet controllers. This patch creates an array of uec_info structures, which
are then parsed by the corresponding driver instance to determine configuration.
It also creates function uec_standard_init() to initialize all UEC interfaces
for 83xx and 85xx.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:02 -05:00
Haiying Wang
9a6110897f fsl: Update the number of ethxaddr in reading system eeprom
We support up to 8 mac addresses in system eeprom, so we define the macro
MAX_NUM_PORTS to limit the mac_count to 8, and update the number of ethxaddr
according to mac_count.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:01 -05:00
Haiying Wang
f82107f637 85xx: Add RMII support for MPC8569MDS
This patch supports UCC working at RMII mode on PIB board, fixup fdt blob to
support rmii in kernel. It also changes the name of enable_mpc8569mds_qe_mdio to
enalbe_mpc8569mds_qe_uec which is  more accurate.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:01 -05:00
Haiying Wang
750098d33b 85xx: Add UEC3 and UEC4 support for MPC8569MDS
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:00 -05:00
Haiying Wang
4e7b25e4fe drivers/qe: Add more SNUM number for QE
Some QE chips like 8569 need more SNUM numbers for supporting 4 UECs in RGMII-
1000 mode.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:00 -05:00
Haiying Wang
7211fbfa18 drivers/qe: Change QE RISC ALLOCATION to support 4 RISCs
Also define the QE_RISC_ALLOCATION_RISCs to MACROs instead of using enum, and
define MAX_QE_RISC for QE based silicons.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:16:59 -05:00
Haiying Wang
b3d7f20f43 85xx: Add QE clk support
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Acked-by: Timur Tabi <Timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:16:59 -05:00
Kumar Gala
71b358cc26 85xx: Added MPC8535/E identifiers
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:16:26 -05:00
Kumar Gala
22419d7797 85xx: Always attempt ethernet device tree fixup
Its reasonable that we may have ethernet devices but dont have drivers
or support enabled for them in u-boot and want the device tree fixed up.
Unconditionally calling the ethernet fixup is fine since if we dont have
ethernet nodes that match (or aliases) we will not attempt to do
anything.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Timur Tabi <timur@freescale.com>
2009-06-12 17:16:26 -05:00
Haiying Wang
52d6ad5ecf drivers/qe: Rename the camel-case identifiers in uec
Rename riscRx/riscTx to risc_rx/risc_tx to comply with Codingstyle.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2009-06-12 17:16:25 -05:00
Srikanth Srinivasan
feb7838f97 85xx: Add P2020DS support
The patch adds support for P2020DS reference platform.
DDR3 interface uses hard-coded initialization rather than SPD
for now and was tested at 667Mhz. Some PIXIS register
definitions and associated code sections need to be fixed.
TSEC1/2/3, NOR flash, MAC/SYS ID EEPROM, PCIE1/2/3 are all
tested under u-boot.

Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Travis Wheatley <Travis.Wheatley@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:16:25 -05:00
Stefan Roese
229549a56d mpc512x: MPC5121ADS: Add NAND support
This patch adds NAND support to the MPC5121ADS board. Please
note that the image size increased since NAND support didn't
fit in the current image size (256k).

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2009-06-12 20:47:19 +02:00
Stefan Roese
35f2edbb6c nand/mpc512x: Add MPC512x NAND support (NFC)
This patch adds NAND Flash Controller driver for MPC5121 revision 2.
All device features, except hardware ECC and power management, are
supported.

This NFC driver replaces the one orignally posted by John Rigby:

"[PATCH] Freescale NFC NAND driver"

It's a port of the Linux driver version posted by Piotr Ziecik a few
weeks ago. Using this driver has the following advantages (from my
point of view):

- Compatibility with the Linux NAND driver (e.g. ECC usage)
- Better code quality in general
- Resulting U-Boot image is a bit smaller (approx. 3k)
- Better to sync with newer Linux driver versions

The only disadvantage I can see, is that HW-ECC is not supported right
now. But this could be added later (e.g. port from Linux driver after
it's supported there). Using HW-ECC on the MCP5121 NFC has a general
problem because of the ECC usage in the spare area. This collides with
JFFS2 for example.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Piotr Ziecik <kosmo@semihalf.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
2009-06-12 20:47:19 +02:00
Stefan Roese
e53b507cee mpc512x: Add esd gmbh mecp5123 board support
MECP5123 is a MPC5121E based module by esd gmbh.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-06-12 20:47:19 +02:00
Stefan Roese
6bd55cc65d mcp512x: Add macros for SCFR LPC divisor access
Thos macros will be used by the esd mecp5123 board.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:47:19 +02:00
Stefan Roese
c60dc8527d mpc512x: Fix problem with I2C access before relocation
This is needed for the upcoming esd MECP5123 board port which uses
I2C EEPROM for environment storage.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Acked-by: Heiko Schocher<hs@denx.de>
2009-06-12 20:47:18 +02:00
Stefan Roese
58f10460b0 74xx_7xx: CPCI750: Add CPCI adapter/target support
The CPCI750 can be built as CPCI host or adapter/target board. This patch
adds support for runtime detection of those variants.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-06-12 20:47:18 +02:00
Stefan Roese
ae7a2739d7 74xx_7xx: CPCI750: Enable access to PCI function > 0
The Marvell bridge 64360 supports serveral PCI functions, not only 0. This
patch enables access to those functions.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-06-12 20:47:18 +02:00
Stefan Roese
e5b563e9ec 74xx_7xx: CPCI750: Minor coding style cleanup of cpci750.c
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-06-12 20:47:18 +02:00
Stefan Roese
0e5ef07d0d 74xx_7xx: CPCI750: Add loadpci command
This command is used to load/boot an OS-image which is transferred from
the CPCI host to the CPCI target/adapter.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-06-12 20:47:18 +02:00
Stefan Roese
0a14d6b8f4 74xx_7xx: CPCI750: Add commandline editing/history
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-06-12 20:47:18 +02:00
Stefan Roese
60cfe87bd3 UBI: Add compile-time check for correct malloc area configuration
UBI is quite memory greedy and requires at least approx. 512k of malloc
area. This patch adds a compile-time check, so that boards will not
build with less memory reserved for this area (CONFIG_SYS_MALLOC_LEN).

Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:47:18 +02:00
Prafulla Wadaskar
7ce6031afc sf: new Macronix MX25xx SPI flash driver
Added macronix SF driver for MTD framework
MX25L12805D is supported and tested
TBD: sector erase implementation, other deivces support

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-12 20:47:18 +02:00
Todor I Mollov
2a6cc58869 sf: atmel: implement power-of-two write/erase funcs
Signed-off-by: Todor I Mollov <tmollov@ucsd.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2009-06-12 20:47:18 +02:00
Vivek Mahajan
4bc6eb79be mpc85xx: 8536ds: Add USB related CONFIGs
This patch adds CONFIGs for enabling USB in mpc8536ds and also
adds usb_phy_type in CONFIG_EXTRA_ENV_SETTINGS. Also revamps its
Copyright.

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-06-12 20:47:18 +02:00
Vivek Mahajan
6823e9b012 mpc83xx: 8315erdb: Add USB related CONFIGs
This patch adds CONFIGs for enabling USB in mpc8315erdb and also
adds usb_phy_type in CONFIG_EXTRA_ENV_SETTINGS. Also revamps its
Copyright.

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-06-12 20:47:18 +02:00
Vivek Mahajan
a07bf180ef mpc85xx: USB: Add support
The following patch adds 85xx-specific USB support and also
revamps Copyright in immap_85xx.h

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-06-12 20:47:17 +02:00
Vivek Mahajan
4ef01010aa mpc83xx: USB: Reorganized its support
The following patch reorganizes/reworks the USB support for mpc83xx
as under:-

  * Moves the 83xx USB clock init from drivers/usb/host/ehci-fsl.c to
    cpu/mpx83xx/cpu_init.c

  * Board specific usb_phy_type is read from the environment

  * Adds USB EHCI specific structure in include/usb/ehci-fsl.h

  * Copyrights revamped in most of the following files

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-06-12 20:47:17 +02:00
Vivek Mahajan
ed90d2c871 mpc8xxx: USB: Relocates ehci-fsl.h to include/usb
The following patch moves 8xxx-specifc USB #defines from
drivers/usb/host/ehci-fsl.h to include/usb.

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-06-12 20:47:17 +02:00
Vivek Mahajan
cfd39cdf94 mpc8xxx: USB: Removed reenablement of its interface
To prepare for the 85xx USB support, which requires interface enablement
only once in (specified) order, no different than instructions for
enabling the interface under 83xx.  It is unknown why the original author
enabled the interface twice (checked for references in errata, etc).

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-06-12 20:47:17 +02:00