Commit graph

33488 commits

Author SHA1 Message Date
Zhao Qiang
713bf94ff2 QE: modify the address of qe ucode
The address of uboot changed, so change qe ucode

Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-26 09:09:56 -07:00
Alison Wang
6a00a9cb15 armv8/fsl-lsch3: fdt: Check the pointer returned from call to a function may be NULL
Pointer 'reg' returned from call to function 'fdt_getprop' may be
NULL, will be passed to function and may be dereferenced there by
passing argument 1 to function 'of_read_number'. So check pointer
'reg' first.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-26 09:09:55 -07:00
Scott Wood
da77c81990 fdt_support: Don't panic if stdout alias is missing
Currently, using fdt_fixup_stdout() on a device tree that is missing
the relevant alias results in this:

WARNING: could not set linux,stdout-path FDT_ERR_NOTFOUND.
ERROR: /chosen node create failed
 - must RESET the board to recover.

FDT creation failed! hanging...### ERROR ### Please RESET the board ###

There is no reason for this to be a fatal error rather than a warning,
and removing this allows for a smooth transition on a platform where
the device tree currently lacks the correct aliases but will have them
in the future.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-26 09:09:54 -07:00
Scott Wood
6b6db0d509 arm/fsl-ls: Add CONFIG_OF_STDOUT_VIA_ALIAS
This will allow OF-based earlycon to be used once the appropriate
aliases are added to the device tree and kernel support is fixed.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-26 09:09:54 -07:00
Heiko Schocher
248f260cbd UBI: Fastmap: Fix PEB array type
The PEB array is an array of __be32, so let's fix the
scan_pool() prototype accordingly.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>

Signed-off-by: Heiko Schocher <hs@denx.de>
2015-10-26 09:22:50 +01:00
Heiko Schocher
0195a7bb36 ubi,ubifs: sync with linux v4.2
sync with linux v4.2

commit 64291f7db5bd8150a74ad2036f1037e6a0428df2
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Sun Aug 30 11:34:09 2015 -0700

    Linux 4.2

This update is needed, as it turned out, that fastmap
was in experimental/broken state in kernel v3.15, which
was the last base for U-Boot.

Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
2015-10-26 09:22:36 +01:00
Heiko Schocher
5219db8ae8 linux, compat: add missing definitions for ubi
add missing definitions for the ubi/ubifs sync
with linux 4.2, also change "#define kfree ..."
into a static inline, so prevent ubi compile error:

   CC      drivers/mtd/ubi/fastmap.o
drivers/mtd/ubi/fastmap.c: In function 'scan_pool':
drivers/mtd/ubi/fastmap.c:475:3: error: called object 'free' is not a function

Signed-off-by: Heiko Schocher <hs@denx.de>
2015-10-26 09:22:02 +01:00
Jagan Teki
e5e0d68f27 spi: zynq_qspi: Minor cleanups
- Use __func__ on debug
- Removed unnecessary comment
- Fix function name in debug as zynq_qspi_xfer instead of spi_xfer

Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
baaaa7539c sf: Add FSR support to spi_flash_cmd_wait_ready
This patch adds flag status register reading support to
spi_flash_cmd_wait_ready.

Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Hou Zhiqiang <B48286@freescale.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
4efad20a17 sf: Update status reg check in spi_flash_cmd_wait_ready
Current flash wait_ready logic is not modular to add new
register status check, hence updated the status check for
adding few more register checks in future.

Below are the sf speed runs with 'sf update' on whole flash, 16MiB.

=> sf update 0x100 0x0 0x1000000
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 59.564s, speed 289262 B/s

=> sf update 0x100 0x0 0x1000000
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 62.549s, speed 275036 B/s

=> sf update 0x100 0x0 0x1000000
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 61.276s, speed 284359 B/s

Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Tom Rini <trini@konsulko.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
1fabefddfc sf: Make flash->flags use for generic usage
Use the flash->flags for generic usage, not only for dm-spi-flash,
this will be used for future flag additions.

[Correct the spi flash flags detect logic]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
70ccf59406 sf: Optimize BAR write code
Optimized spi-flash bar writing code and also removed
unnecessary bank_sel in read_ops.

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
234a9e1c60 sf: Add spi_flash_read_bar
Add spi_flash_read_bar function for reading bar and
discovering bar commands at probe time.

Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
3c75ade2b3 sf: Return bank_sel, if flash->bank_curr == bank_sel
If computed bank_sel is same as flash->bank_curr which is
computed at probe time, then return the bank_sel instead of zero.

Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
86e99b9861 spi: zynq_spi: Remove unneeded headers
- Removed unneeded inclusion of header files
- Add "Xilinx" on license text

Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Siva Durga Prasad Paladugu
8e0e01d330 zynq-common: Add SPL SPI offset, size configs
Define CONFIG_SYS_SPI_ARGS_OFFS, CONFIG_SYS_SPI_ARGS_SIZE
and CONFIG_SYS_SPI_KERNEL_OFFS which will be used in SPL
spi mode. These macros defines the device tree offset, size
and the kernel image offset in flash respectively.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
2775e91835 spi: zynq_qspi: Fix to configure CPOL, CPHA mask
priv->mode is initialized when .set_speed triggers
with mode value, so checking mode for configuring
CPOL, CPHA using priv->mode is invalid hence use
mode from .set_speed argument, and at the end
priv->mode will initialized with mode.

This patch also replaces formatting string to use
speed instead of mode in .set_speed ops.

Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
232a8e4ecc zynq-common: Enable ISSI SPI-NOR flash support
This patch enabled CONFIG_SPI_FLASH_ISSI for qspi on zynq boards.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
720e5e54eb sf: params: Add IS25LP128 part support
Added support for IS25LP128 flash part.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
65a75b6f7a sf: params: Add IS25LP064 part support
Added support for IS25LP064 flash part.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
24ea6ac892 sf: params: Add IS25LP032 part support
Added support for IS25LP032 flash part.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
191269987c spi: zynq_spi: Store cs value into private data
Store cs value into private data and use it while activating
chipselect instead of passing through function.

Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
dda6241a1d spi: zynq_spi: Rename baudrate divisor mask name
Rename ZYNQ_SPI_CR_BRD_MASK to ZYNQ_SPI_CR_BAUD_MASK
for more readable.

Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
46ab8a6a13 spi: zynq_spi: Add config reg shift named macros
Update the numerical values for baudrate and chipselect
with config reg shift named macro's

Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
78a025ace8 spi: Kconfig: Add Zynq QSPI controller entry
Add Zynq QSPI controller Kconfig entry.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
38a41675db configs: zynq: Enable zynq qspi controller
Enable zynq qspi controller driver on respective zynq boards.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
9a7620916d zynq-common: Enable Bank/Extended address register support
Enabled SPI flash Bank/Extended address register support.

Bank/Extended address registers are used to access the flash
which has size > 16MiB in 3-byte addressing.

Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
a241d4ecab zynq-common: Enable zynq qspi controller support
This patch adds support for zynq qspi controller driver
on zynq-common.h

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
73193b01c5 configs: Enable legacy SPI flash interface support
Enable legacy spi-flash interface support for boards which
supports qspi controller with connected spi-nor flash.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
976dfb0fd8 dts: zed: Enable zynq qspi controller node
Enabled zynq qspi controller node for zed board.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
7b0d345981 dts: zc770-xm010: Enable zynq qspi controller node
Enabled zynq qspi controller node for zc770-xm010 board.

=> sf probe 0 -- bus1 for selecting qspi controller
=> sf probe 1 -- bus0 for selecting spi controller

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
e94c71c075 dts: zc706: Enable zynq qspi controller node
Enabled zynq qspi controller node for zc706 board.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
e9cf6ec516 dts: zc702: Enable zynq qspi controller node
Enabled zynq qspi controller node for zc702 board.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2015-10-25 20:17:01 +05:30
Jagan Teki
659cc15630 dts: microzed: Enable zynq qspi controller node
Enabled zynq qspi controller node for microzed board,
verified the same on spansion spi-nor flash.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:01 +05:30
Jagan Teki
e5e7c747a0 doc: device-tree-bindings: spi: Add zynq qspi info
Added device-tree-binding information for zynq qspi controller
driver.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:01 +05:30
Jagan Teki
70676cb3b5 dts: zynq: Add zynq qspi controller nodes
This patch adds zynq qspi controller nodes in zynq-7000.dtsi.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:01 +05:30
Jagan Teki
46d0a9913c spi: Add zynq qspi controller driver
Added zynq qspi controller driver for Xilinx Zynq APSOC,
this driver is driver-model driven with devicetree support.

=> sf probe
SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB
=> mw.b 0x100 0xCC 0x1000000
=> sf update 0x100 0x0 0x1000000
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 59.842s, speed 289262 B/s
=> sf read 0x3000000 0x0 0x1000000
device 0 whole chip
SF: 16777216 bytes @ 0x0 Read: OK
=> cmp.b 0x3000000 0x100 0x1000000
Total of 16777216 byte(s) were the same

Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:01 +05:30
Gong Qianyu
677f970bc6 common/board_f.c: modify the macro to use get_clocks() more common
get_clocks() should not be limited by ESDHC.

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
2015-10-24 13:50:38 -04:00
Masahiro Yamada
09f3ca3dd5 arm, powerpc: select SYS_GENERIC_BOARD
We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.

Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-10-24 13:50:38 -04:00
Simon Glass
5553f000fc Revert "ARM: zynq: disable CONFIG_SYS_MALLOC_F to fix MMC boot"
This reverts commit 321f86e18d.

The original bug has been fixed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-on: Zedboard and ZC706 board
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-on: zc702
Tested-by: Michal Simek <michal.simek@xilinx.com>
2015-10-24 13:50:37 -04:00
Simon Glass
5fa030b9f0 zynq: Move SPL console init out of board_init_f()
We should not init the console this early since it precludes using driver
model for the UART, since it is not set up at the start of board_init_f().
See the README for more information. The debug UART does not have this
restriction. If we want to do early init with the console on it can be done
in spl_board_init().

Move the preloader_console_init() call from board_init_f() to board_init_r().

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
2015-10-24 13:50:37 -04:00
Simon Glass
cd2bee3544 microblaze: Add a TODO to call board_init_f_mem()
This C function should be used to do the early memory layout and init. This
is beyond my powers, so just add a TODO for the maintainer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2015-10-24 13:50:37 -04:00
Simon Glass
5ba534d247 arm: Switch 32-bit ARM to using generic global_data setup
There is quite a bit of assembler code that can be removed if we use the
generic global_data setup. Less arch-specific code makes it easier to add
new features and maintain the start-up code.

Drop the unneeded code and adjust the hooks in board_f.c to cope.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-10-24 13:50:36 -04:00
Simon Glass
931bec31b4 arm: Switch aarch64 to using generic global_data setup
There is quite a bit of assembler code that can be removed if we use the
generic global_data setup. Less arch-specific code makes it easier to add
new features and maintain the start-up code.

Drop the unneeded code and adjust the hooks in board_f.c to cope.

Tested on LS2085ARDB and LS2085AQDS (armv8 SoC).
Tested-by: York Sun <yorksun@freescale.com>

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-10-24 13:50:36 -04:00
Simon Glass
518f0bccc4 board_init_f_mem(): Don't create an unused early malloc() area
Change the #ifdef so that the early malloc() area is not set up in SPL if
CONFIG_SYS_SPL_MALLOC_START is defined. In that case it would never actually
be used, and just chews up stack space.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-10-24 13:50:35 -04:00
Simon Glass
12360982fa board_init_f_mem(): Don't require memset()
Unfortunately memset() is not always available, so provide a substitute when
needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-10-24 13:50:35 -04:00
Simon Glass
af6bbd4dae Move board_init_f_mem() into a common location
This function will be used by both SPL and U-Boot proper. So move it into
a common place. Also change the #ifdef so that the early malloc() area is
not set up in SPL if CONFIG_SYS_SPL_MALLOC_START is defined. In that case
it would never actually be used, and just chews up stack space.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-10-24 13:50:34 -04:00
Stephen Warren
47b7164450 fs-test.sh: fix pre-requisite detection
In the following snippet:

if [ ! -x `which $prereq` ]; then

When $prereq does not exist, `which $prereq` evaluates to the empty string,
which results in *no* argument being passed to the -x operator, which then
evaluates to true, which is the equivalent of the prereq having been found. In
order for this to fail as expected, we must pass an empty argument, which then
causes -x to fail. Do this by wrapping the `` in quotes so there's always an
argument to -x, even if the value of the argument is zero-length.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2015-10-24 13:50:34 -04:00
Stephen Warren
4a28274227 test: fat: add test of non-contiguous file reads
In my patch series to replace fs/fat with "ff.c", I enhanced ff.c to
optimize file reading, so that reads of contiguous clusters are submitted
to the IO device as a single read. This test attempts to torture-test
edge-cases of that enhancement.

BTW, the only way I found to validate that this script actually does
create non-contiguous files was to manually inspect the FAT bitmap in a
hex dump of the FAT image. hdparm --fibmap doesn't work on loop-mounted
filesystems. filefrag -v -e seems to lie about files being contiguous
when they aren't.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2015-10-24 13:50:34 -04:00
Stephen Warren
7861204c9a itest: make memory access work under sandbox
itest accesses memory, and hence must map/unmap it. Without doing so, it
accesses invalid addresses and crashes.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-10-24 13:50:33 -04:00