Commit graph

89879 commits

Author SHA1 Message Date
Venkatesh Yadav Abbarapu
83cab0b30f arm64: versal-net: enable CONFIG_MMC_SDHCI_ADMA
The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit
widths of DMA. This significantly improves read and write throughput.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231027030446.4009-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:09 +01:00
Michal Simek
a156b6ce0f arm64: zynqmp: Fix Kconfig entry indentation
Use tabs instead of space for entry indentation which is standard coding
style.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ff28e719de82258c066f1fedae87f88597f367b5.1698302068.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
0d3399dfd8 arm: xilinx: Add missing dual parallel flash description
Describe flash memories based on the latest DT binding.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/cddf2909d0445eba08b998d42ffc31c1fa3132b9.1698045694.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Tejas Bhumkar
820bad0271 arm64: zynqmp: Disable Tri-state for MIO38 Pin
gpio38 is used in SOM's kv260 to reset the Ethernet PHY.
At present, HW reset is not working properly as Tri-state 
is enabled for MIO38, causing inappropriate PHY register reads.

Disabled Tri-state for MIO38 to make HW reset work.

Tri-state disable :
ZynqMP> md 0xFF180208 2
ff180208: 00bfe7a3 00000540

Tri-state enable :
ZynqMP> md 0xFF180208 2
ff180208: 00bfe7e3 00000540

Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Link: https://lore.kernel.org/r/20231020050622.972750-1-tejas.arvind.bhumkar@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:09 +01:00
Ibai Erkiaga
3e89144892 zynqmp: migrate gqspi debug to logging
The following patch migrates the usage of debug and printf functions
to the relevant logging function as per U-Boot DM guidelines.

Additionally some of the debugging statements have been rearanged for
a more meaningfull debug experience.

aarch64-linux-gnu-size reports 229 bytes less when debug is enabled at
file level, while is just 5bytes more when disabled.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@amd.com>
Link: https://lore.kernel.org/r/20231013123739.2757979-1-ibai.erkiaga-elorza@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:09 +01:00
Amit Kumar Mahapatra
fdff4b3c48 arm64: dts: zynqmp: make hw-ecc as the default ecc mode
Except for Linux no other component (i.e., u-boot, fsbl or BootRom) of the
software stack supports software ecc engine. So, make hw-ecc as the default
ecc mode.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f47b95616eb40d3a9908ca60df94ec6e873b071c.1697119098.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Venkatesh Yadav Abbarapu
03cc435539 ARM: zynq: Disable the config CONFIG_SPI_FLASH_USE_4K_SECTORS
Lock size for the flashes will be in terms of sector size, so
disable the CONFIG_SPI_FLASH_USE_4K_SECTORS and read it from the
flash itself.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8e5c2bf3b7e5f366c4e261e8055ea254bda53aa9.1697117993.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Venkatesh Yadav Abbarapu
ed1b1dd3bf arm64: zynqmp: Disable the lock option for mini qspi
As mini configs are required only for flashing the images, so
disabling the lock config which will save nearly 6KB of memory.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/374d6b3a46d19b7ee171dfe8071676098db93e25.1697117869.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Piyush Mehta
1bccde607e arm64: zynqmp: remove snps, xhci-stream-quirk property for usb
To sync up with the upstream bulk-stream feature, removed
'snps,xhci-stream-quirk' DT property for usb.

Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1f4ecfe3ea6a4d0d8d8de324f5dffd3efc86656a.1697115523.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
fa6106f989 arm64: zynqmp: Remove address/size-cells from ams node
Remove unused address/size-cells which is also done upstream that's why
this is pretty much sync patch with upstream.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0ca8d8fe245ad7cb665f5333202d83f70acfc11f.1697115523.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
e6b5c01a6c Revert "arm64: zynqmp: Add power domain description for PL"
This reverts commit d59fac2f3f.

This power domain shouldn't be enabled by default. Power domain behavior
should be handled on case by case basis. Adding this property to
zynqmp.dtsi is breaking some suspend/resume cases that's why remove it
from this file.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7ed2a46383c6918fbbaca2d618459b1ee58f865c.1697115523.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
ff31d0330d arm64: zynqmp: Remove xlnx,zynqmp-aes node
AES can be discovered via firmware interface that's why remove node for it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/eaf575a6ca92f8c10cefb447c08c1292025deb74.1697115523.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
f87696afa0 arm64: zynqmp: Use mdio node by vp-x-a2785-00-revA and vpk120-revA
All boards have been converted to use mdio node that's why move ethernet
phys under mdio node too.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6c60f5d29b9d9992bd0130fd263c8ed13cb8166c.1697115523.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
971a772624 arm64: zynqmp: Remove fclk driver
fclk will never go upstream that's why removing this node from DT.
All PL (programmable logic) based IPs should handle clocks self without
using this workaround.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fbb8665b8a58dbe96349abfe5492a509939e165b.1697098930.git.michal.simek@amd.com
2023-11-07 13:47:08 +01:00
Venkatesh Yadav Abbarapu
20d1836eea spi: cadence_ospi_versal: Add support for 64-bit address
When 64-bit address is passed only lower 32-bit address
is getting updated. Program the upper 32-bit address in the
DMA destination memory address MSBs register.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231011031515.4151-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Venkatesh Yadav Abbarapu
ba9bdfd959 drivers: firmware: Handle error case in the zynqmp_pm_feature
Unhandled error coming from xilinx_pm_request() but return
value is not read back that's why getting sparse warning
as below:
warning: variable 'ret' set but not used [-Wunused-but-set-variable].
In case of error return the "ret" value.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231011025647.17200-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Venkatesh Yadav Abbarapu
dea1c089cf arm64: versal_net: Disable the lock option for mini ospi and qspi
As mini configs are required only for flashing the images, so
disabling the lock config which will save nearly 6KB of memory.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231003031715.5343-4-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Venkatesh Yadav Abbarapu
534892c22c arm64: versal: Disable the lock option for mini ospi and qspi
As mini configs are required only for flashing the images, so
disabling the lock config which will save nearly 6KB of memory.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231003031715.5343-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Venkatesh Yadav Abbarapu
188c803d08 mtd: spi-nor: Add spi flash lock config option
Provide an explicit configuration option to disable default "lock"
of any flash chip which supports locking. By disabling the lock
config will save some amount of memory and also don't expose the
lock functionality to the users i.e., via sf protect command.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231003031715.5343-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Algapally Santosh Sagar
bd9ff681bd serial: zynqmp: Fetch baudrate from dtb and update
The baudrate configured in .config is taken by default by serial. If
change of baudrate is required then the .config needs to changed and
u-boot recompilation is required or the u-boot environment needs to be
updated.

To avoid this, support is added to fetch the baudrate directly from the
device tree file and update.
The serial, prints the log with the configured baudrate in the dtb.
The commit c4df0f6f31 ("arm: mvebu: Espressobin: Set default value for
$fdtfile env variable") is taken as reference for changing the default
environment variable.

The default environment stores the default baudrate value, When default
baudrate and dtb baudrate are not same glitches are seen on the serial.
So, the environment also needs to be updated with the dtb baudrate to
avoid the glitches on the serial.

Also add test to cover this new function.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230921112043.3144726-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Algapally Santosh Sagar
8819892bdb configs: Add support in Kconfig and convert for armada boards
Move the DEFAULT_ENV_IS_RW to Kconfig for easier configuration.
Hence, add the CONFIG_DEFAULT_ENV_IS_RW config to the defconfig files
to allow enabling them for armada boards.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20230921112043.3144726-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Tom Rini
3af0e9556c Prepare v2024.01-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-11-06 14:47:25 -05:00
Tom Rini
9e0864fdba configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-11-06 14:41:58 -05:00
Tom Rini
5493fb52fd Merge branch '2023-11-06-assorted-changes'
- One new MIPS platform and a mailmap update
2023-11-06 10:20:42 -05:00
Heinrich Schuchardt
0b9a55795e .mailmap: map Pali Rohár
Pali expressed that he does not want to receive mails relating to his past
contributions.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2023-11-06 10:20:21 -05:00
Linus Walleij
a01b946e56 bmips: Add Inteno XG6846 board
This adds support for the Inteno XG6846 board based on the
Broadcom MIPS 6328 SoC.

The default boot will read a uImage from flash and boot it.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-06 10:20:21 -05:00
Tom Rini
274f41c653 - fixup to also enabled DFU RAM boot for libretech-ac
- sm fix to bind child sm devices in the device tree
 - add missing A1 clocks for USB stack
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Merge tag 'u-boot-amlogic-20231106' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- fixup to also enabled DFU RAM boot for libretech-ac
- sm fix to bind child sm devices in the device tree
- add missing A1 clocks for USB stack
2023-11-06 09:47:13 -05:00
Tom Rini
fd0d7d7efe Merge branch '2023-11-06-networking-updates'
- A few dhcp related improvements, be clearer to the user when we don't
  have a MAC address, assorted driver/phy improvements and new drivers.
2023-11-06 09:45:33 -05:00
Neil Armstrong
c550e81171 ARM: configs: libretech-ac: enable USB_DFU like in meson64.h
USB_DFU was added in meson64.h but is missing in libretech-ac.h,
fix this to enable DFU RAM boot for libretech-ac.

Fixes 4aa027b3f8 ("configs: meson64: add alternate USB DFU boot target")

Link: https://lore.kernel.org/r/20231102-libretech-ac-fix-dfu-v1-1-112379165028@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-11-06 09:46:05 +01:00
Dmitry Rokosov
e9f4f7789c drivers: sm: bind child sm devices in the device tree
One well-known sm child device that provides secure power control is the
Secure Power Controller. This device utilizes SMC calls to communicate
with power domains on the secure monitor side.

Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231101140500.9025-3-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-11-06 09:45:47 +01:00
Alexey Romanov
8ec790399a clk: a1: add new clocks for USB stack
Since we sync device tree with Linux, we have to add this
clock definition for USB stack.

Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231101140500.9025-2-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-11-06 09:45:47 +01:00
Baruch Siach
d44f3d21fe net: designware: add DMA offset awareness
Older DesignWare Ethernet MAC versions that this driver supports can
only work with 32-bit DMA source/destination addresses. Some platforms
have no physical RAM at the lowest 4GB address space. For these
platforms the driver must translate DMA addresses to/from physical
memory addresses.

Call translation routines so that properly configured platforms can use
the DesignWare Ethernet MAC. For platforms using device-tree this
usually means adding dma-ranges property to the bus the device node is
in.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2023-11-05 16:11:38 -05:00
Fabio Estevam
7907cf8004 net: eth-uclass: Improve error message when MAC is not found
While bringinp up a new board without the MAC fuses programmed,
the following error message was observed:

Error: ethernet@30bf0000 address not set.

Improve the error message to make it clearer the reason of
the failure.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-11-05 16:11:38 -05:00
Bin Meng
9e4cabcf43 net: e1000: Drop e1000_eth_ids[]
e1000_eth_ids holds compatible strings for e1000 devices, but it
is meaningless as e1000 is a PCI device and there is no such
compatible string assigned to e1000 by the DT bindings community.

Drop it.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-05 16:11:38 -05:00
Sean Anderson
798962cedd net: Add option for tracing packets
Add an option to trace all packets send/received. This can be helpful when
debugging protocol issues, as the packets can then be imported into
wireshark [1] and analyzed further.

[1] https://www.wireshark.org/docs/wsug_html_chunked/ChIOImportSection.html

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-05 16:11:38 -05:00
Frank de Brabander
a56e30e65f net: phy: TI DP83869 fix invalid clock delay configuration
Setting the clock delay from the device tree settings
rx-internal-delay-ps and tx-internal-delay-ps was broken:

 - The expected value in the device tree is suppose to be a
   delay in picoseconds, but the driver only allowed an array index.
 - Driver converted this array index to the actual delay in
   picoseconds and tried to apply this in the device register. This
   however is not a valid register value. The actual logic here was
   reversed, it converted an register representation of the delay to
   the device tree delay in picoseconds.

Only when the internal delays were NOT configured in the device tree
and they default value of 7 (=2000ps) was used, a valid value was
loaded in the register.

Signed-off-by: Frank de Brabander <debrabander@gmail.com>
2023-11-05 16:11:38 -05:00
Michal Simek
d71e7f41bf net: eth-uclass: Setup ROM source only when ROM reading passes
There is no reason to setup ROM source if read_rom_hwaddr hook doesn't
exist or reading mac address fails. It is ending up with confusion about
mac address source.

It is nicely visible if you put mac address to DT as
local-mac-address = [ff ff ff ff ff ff];
but also save ethaddr to variables
setenv -f ethaddr 02:18:31:7e:3e:01

Before this patch U-Boot prints that source is ROM
Address in ROM is		ff:ff:ff:ff:ff:ff
Address in environment is	02:18:31:7e:3e:01

After that source is DT:
Address in DT is		ff:ff:ff:ff:ff:ff
Address in environment is	02:18:31:7e:3e:01

Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-05 16:11:38 -05:00
Yang Xiwen
6b5c8d98e2 net: add hifemac_mdio MDIO bus driver for HiSilicon platform
It adds the driver for the internal MDIO bus of HIFEMAC Ethernet
controller.  It's based on the mainstream linux driver.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2023-11-05 16:11:38 -05:00
Yang Xiwen
9d8f78a2a7 net: add hifemac Ethernet driver for HiSilicon platform
It adds the driver for HIFEMAC Ethernet controller found on HiSilicon
SoCs like Hi3798MV200.  It's based on the mainstream linux driver, but
quite a lot of code gets rewritten and cleaned up to adopt u-boot driver
model.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2023-11-05 16:11:38 -05:00
Robert Marko
89943052e4 net: mv88e6xxx: add Clause 45 support
Marvell LinkStreet switches support Clause 45 MDIO on the internal bus.

C45 read or writes require the register address to be written first to
the SMI PHY Data register, and then a special C45 Write Address Register
OP is used on the SMI PHY Register before making a C45 Read Data Register
OP and being able to actually read the register.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2023-11-05 16:11:37 -05:00
Robert Marko
1aecba9c1b net: mv88e6xxx: use generic bitfield macros for MDIO
Driver is currently defining the mask and bit shifting itself,
there is no need for that as U-Boot has generic bitfield macros that help
us achieve the same result but in a cleaner way.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2023-11-05 13:28:40 -05:00
Dylan Hung
607e7fa622 net: ftgmac100: Add reset control
Add optional reset control, especially for the Aspeed SOC. For the
hardware without a reset line, the reset assertion/deassertion will be
skipped.

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-11-05 13:28:40 -05:00
Sean Edmond
91953956d2 net: Get pxe config file from dhcp option 209
Allow dhcp server pass pxe config file full path by using option 209

Signed-off-by: Sean Edmond <seanedmond@microsoft.com>
2023-11-05 13:28:40 -05:00
Sean Edmond
b2369a19b8 net: dhcp6: Fix OPT_BOOTFILE_PARAM parsing
RFC 5970 states that OPT_BOOTFILE_PARAM (option 60) can be
multiple parameters that start with a 16-bit length field followed
by the parameter. For example:
[ param-len 1 (16-bits) ] [ parameter 1 (variable length) ]

This fix ensure we're considering "param-len 1" in the parsing.

Signed-off-by: Sean Edmond <seanedmond@microsoft.com>
2023-11-05 13:28:40 -05:00
Ley Foon Tan
5d260d0800 net: dw_eth_qos: Add 64-bit addressing
Set upper 32bit address for DMA descriptors and buffer address to support
64-bit addressing.

Signed-off-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
2023-11-05 13:28:40 -05:00
Tom Rini
a4c83bda17 Merge branch '2023-11-03-assorted-tegra-improvements'
- Assorted improvements for Tegra platforms
2023-11-04 09:55:39 -04:00
Svyatoslav Ryhel
4afdc7a3c6 sysreset: implement PALMAS sysreset functions
PALMAS PMIC family has embedded poweroff function used by some
device to initiane device power off. Implement it as sysreset
driver.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-11-03 17:42:39 -04:00
Svyatoslav Ryhel
8b8a00eaf4 sysreset: implement TPS65910 sysreset functions
TPS65910/TPS65911 PMICs have embedded power control functions
used by some device to initiane device power off. Implement it as
sysreset driver.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-11-03 17:42:14 -04:00
Svyatoslav Ryhel
9d937cdc2c sysreset: implement TPS80031 sysreset functions
TPS80031/TPS80032 PMICs have embedded power control functions
used by some device to initiane device power off. Implement it as
sysreset driver.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-11-03 17:41:54 -04:00
Svyatoslav Ryhel
fa1e72ea3d sysreset: implement MAX77663 sysreset functions
MAX77663 PMIC has embedded poweroff function used by some
device to initiane device power off. Implement it as sysreset
driver.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-11-03 17:40:40 -04:00