Define CONFIG_PHY_MICREL, and
minimize the tx clock delay.
There is an issue with 1000 baseTx mode on early revs
of the SabreLite boards. The center tap pin 9 of the mag RJ45
USB combo was connected to the 3.3 filtered supply. Letting
this pin float solved the problem. Symptoms of the problem
were packets with many extra zeroes tacked on the end, and random
bit flips causing a high rate of CRC errors. 10/100 baseTx worked
fine on all revs. To disable 1000 baseTx for these boards, simply
define the environment variable disable_giga. ie.
setenv disable_giga 1
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
The default settings store the persistent environment on SD card
and not serial flash (SPI NOR).
To use SPI NOR to save the environment instead of SD card, edit
include/configs/mx6qsabrelite.h and
- undefine CONFIG_ENV_IS_IN_MMC
- define CONFIG_ENV_IS_IN_SPI_FLASH
The SPI driver can take as chip select the controller's chip selects
as well as an external GPIO. The LSB byte has the value of the internal
chip select, the highest (thought as 16-bit value) contains the GPIO
number.
The GPIO used on Sabre Lite is GP3:19 == 83.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
CC: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
To be able to load the device tree and initrd correctly, set
the fdt_high and initrd_high environment variables.
Using 0xffffffff implies that the device tree and the initrd
are initially copied to working addresses. This will avoid an
additional copy.
Loading the device tree to 0x30000000 and the initrd to 0x3c000000
should work for both boards, the ARM2 and SabreLite.
Example (SabreLite):
fatload mmc 0:2 0x10000000 uImage
fatload mmc 0:2 0x3c000000 uInitrd
fatload mmc 0:2 0x30000000 board.dtb
bootm 0x10000000 0x3c000000 0x30000000
Note: This requires that the kernel has CONFIG_HIGHMEM enabled.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
Add the initial support for Freescale i.MX6Q Sabre Lite board
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
CC: Eric Nelson <eric.nelson@boundarydevices.com>
