Commit graph

77971 commits

Author SHA1 Message Date
Simon Glass
866e2ac5aa efi: Move exit_boot_services into a function
At present this code is inline in the app and stub. But they do the same
thing. The difference is that the stub does it immediately and the app
doesn't want to do it until the end (when it boots a kernel) or not at
all, if returning to UEFI.

Move it into a function so it can be called as needed.

Add a comment showing how to store the memory map so that it can be
accessed within the app if needed, for debugging purposes only. The map
can change without notice.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-15 10:57:22 +01:00
Heinrich Schuchardt
bf59c46bcb MAINTAINERS: remove Alexander Graf from EFI PAYLOAD
The last review by Alex was in 2019.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15 10:57:22 +01:00
Heinrich Schuchardt
717b33cb9b efidebug: avoid 'dfu_alt_info not defined' message
If variable dfu_alt_info is not defined duplicate messages are displayed.

    => efidebug boot dump
    Scanning disk mmc2.blk...
    Scanning disk mmc1.blk...
    Scanning disk mmc0.blk...
    Found 3 disks
    No EFI system partition
    "dfu_alt_info" env variable not defined!
    Probably dfu_alt_info not defined
    "dfu_alt_info" env variable not defined!
    Probably dfu_alt_info not defined

Remove the 'Probably dfu_alt_info not defined' message.
Instead write a warning if the variable contains no entities.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15 10:57:22 +01:00
Ilias Apalodimas
a2f1482fc0 efi_loader: Get rid of kaslr-seed if EFI_RNG_PROTOCOL is installed
U-Boot, in some occasions, injects a 'kaslr-seed' property on the /chosen
node. That would be problematic in case we want to measure the DTB we
install in the configuration table, since it would change across reboots.

The Linux kernel EFI-stub completely ignores it and only relies on
EFI_RNG_PROTOCOL for it's own randomness needs (i.e the randomization
of the physical placement of the kernel). In fact it (blindly) overwrites
the existing seed if the protocol is installed. However it still uses it
for randomizing it's virtual placement.
So let's get rid of it in the presence of the RNG protocol.

It's worth noting that TPMs also provide an RNG.  So if we tweak our
EFI_RNG_PROTOCOL slightly and install the protocol when a TPM device
is present the 'kaslr-seed' property will always be removed, allowing
us to reliably measure our DTB.

Acked-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-01-15 10:57:22 +01:00
Heinrich Schuchardt
bc314f8e5f cmd: part: list all 128 GPT partitions
A GPT partition table typically has 128 entries. If a partition table
contains a partition 128 'part list' should be able to list it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15 10:57:22 +01:00
Heinrich Schuchardt
504dbd224a disk: gpt: print all partitions
For GPT partition tables the 'part list' command stops at the first invalid
partition number. But Ubuntu has images with partitions number

    1, 12, 13, 14, 15

In this case only partition 1 was listed by 'part list'.

Fixes: 38a3021edc ("disk: part_efi: remove indent level from loop")
Reported-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
2022-01-15 10:57:22 +01:00
Heinrich Schuchardt
9ef5ccaa71 efi_loader: fix SectionAlignment, FileAlignment
The alignment of sections in the EFI binaries generated by U-Boot is
incorrect.

According to the PE-COFF specification [1] the minimum value for
FileAlignment is 512. If the value of SectionAlignment is
less then the page size, it must equal FileAlignment.

Let's set both values to 512 for the ARM and RISC-V architectures.

[1] https://docs.microsoft.com/en-us/windows/win32/debug/pe-format

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15 10:57:22 +01:00
Heinrich Schuchardt
dfbc2be47e riscv: revert Complete efi header for RV32/64
EDK II refuses to load the EFI binaries created by U-Boot.
The reason is an incorrect PE-COFF header. The number of
data directories does not match NumberOfRvaAndSizes.
This leads to a failed consistency check in
PeCoffLoaderGetPeHeader():

    SizeOfOptionalHeader - HeaderWithoutDataDir) !=
    NumberOfRvaAndSizes * sizeof(DATA_DIRECTORY))

Fixes: 9afaeec6ef ("riscv: Complete efi header for RV32/64")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15 10:57:21 +01:00
Patrick Delaunay
5ebb52702e doc: add include/dm/fdtaddr.h to the HTML documentation
Correct Sphinx style comments in include/dm/fdtaddr.h
and add the devfdt API to the HTML documentation;
these functions are NOT compatible with live tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15 10:57:21 +01:00
Patrick Delaunay
be74f71a67 doc: add include/dm/of*.h to the HTML documentation
Correct Sphinx style comments in include/dm/ofnode.h
and add the device tree node API to the HTML documentation;
the ofnode functions are compatible with Live tree or with flat
device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15 10:57:21 +01:00
Patrick Delaunay
6de6a615f8 doc: add include/dm/read.h to the HTML documentation
Correct Sphinx style comments in include/dm/read.h
and add the device read from device tree API to the HTML
documentation.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15 10:57:21 +01:00
Patrick Delaunay
494bc8e6f0 doc: add include/dm/devres.h to the HTML documentation
Correct Sphinx style comments in include/dm/devres.h
and add the driver model device resource API, devres_*(),
to the HTML documentation.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15 10:57:21 +01:00
Patrick Delaunay
9fb1c77ef6 doc: add include/dm/device.h to the HTML documentation
Correct Sphinx style comments in include/dm/device.h
and add the driver model device API to the HTML documentation.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15 10:57:21 +01:00
Patrick Delaunay
ca4ca43e2f doc: add include/dm/platdata.h to the HTML documentation
Correct Sphinx style comments in include/dm/platdata.h
and add the associated API to the HTML documentation.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15 10:57:21 +01:00
Patrick Delaunay
cbb14ac92c doc: add include/dm/lists.h to the HTML documentation
Correct Sphinx style comments in include/dm/lists.h
and add the list API to the HTML documentation.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15 10:57:21 +01:00
Patrick Delaunay
0cdd7ded88 doc: add include/dm/root.h to the HTML documentation
Correct Sphinx style comments in include/dm/devres.h
and add the associated driver model API to the HTML documentation.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15 10:57:21 +01:00
Patrick Delaunay
797b2a2ed4 doc: add include/dm/uclass.h to the HTML documentation
Correct Sphinx style comments in include/dm/uclass.h
and add the driver model UCLASS API to the HTML documentation.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15 10:57:21 +01:00
Heinrich Schuchardt
8804b276a7 .readthedocs.yml: update the requirements
Fix an error:
  This project needs at least Sphinx v2.4.4.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15 10:57:21 +01:00
Heinrich Schuchardt
bba1cc9b8c doc: Building on Alpine Linux
Describe the required packages for building U-Boot on Alpine Linux

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-01-15 10:57:21 +01:00
Andre Przywara
46620d21a6 doc: add Arm Juno board documentation
The Juno Arm development board is an open, vendor-neutral, Armv8-A
development platform.
Add documentation that briefly outlines the hardware, and describes
building and installation of U-Boot.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-15 10:57:21 +01:00
Eugen Hristev
97f2a749d5 lib: Kconfig: fix PHANDLE_CHECK_SEQ position outside of menu
CONFIG_PHANDLE_CHECK_SEQ is outside of the menu 'Library routines'
thus it's invisible in menuconfig and cannot be selected.
Fix this by moving the 'endmenu' after the PHANDLE_CHECK_SEQ definition

Fixes: c589132a1d ("fdt: Use phandle to distinguish DT nodes with same name")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-14 14:36:57 -05:00
Peter Robinson
f6f27be146 env: fat: Add new lines at the end of print statements
Add some new line feeds at the end of print messages to make things
easier to read on the console. The other env options do this so
this is just an omission for FAT env.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2022-01-14 14:36:57 -05:00
Alper Nebi Yasak
226fce6108 phy: Track power-on and init counts in uclass
On boards using the RK3399 SoC, the USB OHCI and EHCI controllers share
the same PHY device instance. While these controllers are being stopped
they both attempt to power-off and deinitialize it, but trying to
power-off the deinitialized PHY device results in a hang. This usually
happens just before booting an OS, and can be explicitly triggered by
running "usb start; usb stop" in the U-Boot shell.

Implement a uclass-wide counting mechanism for PHY initialization and
power state change requests, so that we don't power-off/deinitialize a
PHY instance until all of its users want it done. The Allwinner A10 USB
PHY driver does this counting in-driver, remove those parts in favour of
this in-uclass implementation.

The sandbox PHY operations test needs some changes since the uclass will
no longer call into the drivers for actions matching its tracked state
(e.g. powering-off a powered-off PHY). Update that test, and add a new
one which simulates multiple users of a single PHY.

The major complication here is that PHY handles aren't deduplicated per
instance, so the obvious idea of putting the counts in the PHY handles
don't immediately work. It seems possible to bind a child udevice per
PHY instance to the PHY provider and deduplicate the handles in each
child's uclass-private areas, like in the CLK framework. An alternative
approach could be to use those bound child udevices themselves as the
PHY handles. Instead, to avoid the architectural changes those would
require, this patch solves things by dynamically allocating a list of
structs (one per instance) in the provider's uclass-private area.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com> - Rock960
2022-01-14 14:36:57 -05:00
Piotr Kubik
703f8c8451 ARM: qemu-arm: Fix build fail with boot devices disabled
BOOT_TARGET_DEVICES should only be added if the corresponding u-boot
command is enabled otherwise the build will fail.

Signed-off-by: Piotr Kubik <piotr_kubik@vp.pl>
2022-01-14 14:36:57 -05:00
Mark Kettenis
3cdfa312c6 armv8: apple: Disable PSCI reset
Apple's ARMv8 cores don't implement EL3 and therefore don't
provide a PSCI implementation.  So don't attempt to use
PSCI to reset on machines using Apple SoCs.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2022-01-14 13:16:11 -05:00
Joel Peshkin
36a3b4ed56 BRCMNAND: Fix reporting of uncorrectable errors on subpages during page read
Previously, a subpage with an uncorrectable error followed by a subpage
with a correctable error would return an erroneous correctable status.

Signed-off-by: Joel Peshkin <joel.peshkin@broadcom.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-14 13:16:11 -05:00
Samuel Dionne-Riel
4a05497a8c cmd: adc: Report return value on error
Reporting the return value should always be done on error conditions,
this way the developer can start debugging issues with more knowledge
in-hand.

Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com>
2022-01-14 13:16:11 -05:00
Samuel Dionne-Riel
499f18446d lib: export vsscanf
The function was missing from exports, even though it loooks like the
intent of the implementation in sscanf.c was to have it exported.

Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-14 13:16:11 -05:00
Hou Zhiqiang
2f3e8d6a86 checkpatch: report ERROR only on disabling of fdt and initrd relocation
Let the check pass when patches have these patterns in their context.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2022-01-14 13:16:11 -05:00
Pali Rohár
d17ab6e128 nvme: Do not allocate 8kB buffer on stack
Calling 'nvme scan' followed by 'nvme detail' crashes U-Boot on Turris
Omnia with the following error:

  undefined instruction
  pc : [<0a000000>]          lr : [<7ff80bfc>]
  reloc pc : [<8a8c0000>]    lr : [<00840bfc>]
  sp : 7fb2b908  ip : 0000002a     fp : 02000000
  r10: 04000000  r9 : 7fb2fed0     r8 : e1000000
  r7 : 0c000000  r6 : 03000000     r5 : 06000000  r4 : 01000000
  r3 : 7fb30928  r2 : 7fb30928     r1 : 00000000  r0 : 00000000
  Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
  Code: 0f0fb4f0 0f0fb4f0 0f0fb4f0 0f0fb4f0 (f0f04b0f)
  Resetting CPU ...

This happens when nvme_print_info() tries to return to the caller. It
looks like this error is caused by trying to allocate 8 KiB of memory
on the stack by the two uses of ALLOC_CACHE_ALIGN_BUFFER().

Use malloc_cache_aligned() to allocate this memory dynamically instead.

This fixes 'nvme detail' on Turris Omnia.

Note that similar change was applied to file drivers/nvme/nvme.c in past by
commit 2f83481dff ("nvme: use page-aligned buffer for identify command").

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
2022-01-14 13:16:10 -05:00
Patrick Delaunay
0a4512b5fb test: test_lsblk: Mark as sandbox specific
This test checks for output specific to the sandbox blk device
"sandbox_host_blk", mark it as sandbox specific.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-01-14 12:26:42 -05:00
Maciej W. Rozycki
a398a51ccc pci: Work around PCIe link training failures
Attempt to handle cases with a downstream port of a PCIe switch where
link training never completes and the link continues switching between
speeds indefinitely with the data link layer never reaching the active
state.

It has been observed with a downstream port of the ASMedia ASM2824 Gen 3
switch wired to the upstream port of the Pericom PI7C9X2G304 Gen 2
switch, using a Delock Riser Card PCI Express x1 > 2 x PCIe x1 device,
P/N 41433, wired to a SiFive HiFive Unmatched board.  In this setup the
switches are supposed to negotiate the link speed of preferably 5.0GT/s,
falling back to 2.5GT/s.

However the link continues oscillating between the two speeds, at the
rate of 34-35 times per second, with link training reported repeatedly
active ~84% of the time, e.g.:

02:03.0 PCI bridge [0604]: ASMedia Technology Inc. ASM2824 PCIe Gen3 Packet Switch [1b21:2824] (rev 01) (prog-if 00 [Normal decode])
[...]
	Bus: primary=02, secondary=05, subordinate=05, sec-latency=0
[...]
	Capabilities: [80] Express (v2) Downstream Port (Slot+), MSI 00
[...]
		LnkSta:	Speed 5GT/s (downgraded), Width x1 (ok)
			TrErr- Train+ SlotClk+ DLActive- BWMgmt+ ABWMgmt-
[...]
		LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis+, Selectable De-emphasis: -3.5dB
			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
			 Compliance De-emphasis: -6dB
[...]

Forcibly limiting the target link speed to 2.5GT/s with the upstream
ASM2824 device makes the two switches communicate correctly however:

02:03.0 PCI bridge [0604]: ASMedia Technology Inc. ASM2824 PCIe Gen3 Packet Switch [1b21:2824] (rev 01) (prog-if 00 [Normal decode])
[...]
	Bus: primary=02, secondary=05, subordinate=09, sec-latency=0
[...]
	Capabilities: [80] Express (v2) Downstream Port (Slot+), MSI 00
[...]
		LnkSta:	Speed 2.5GT/s (downgraded), Width x1 (ok)
			TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
[...]
		LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis+, Selectable De-emphasis: -3.5dB
			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
			 Compliance De-emphasis: -6dB
[...]

and then:

05:00.0 PCI bridge [0604]: Pericom Semiconductor PI7C9X2G304 EL/SL PCIe2 3-Port/4-Lane Packet Switch [12d8:2304] (rev 05) (prog-if 00 [Normal decode])
[...]
	Bus: primary=05, secondary=06, subordinate=09, sec-latency=0
[...]
	Capabilities: [c0] Express (v2) Upstream Port, MSI 00
[...]
		LnkSta:	Speed 2.5GT/s (downgraded), Width x1 (downgraded)
			TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
[...]
		LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
			 Compliance De-emphasis: -6dB
[...]

Make use of this observation then and attempt to detect the inability to
negotiate the link speed automatically, and then handle it by hand.  Use
the Data Link Layer Link Active status flag as the primary indicator of
successful link speed negotiation, but given that the flag is optional
by hardware to implement (the ASM2824 does have it though), resort to
checking for the mandatory Link Bandwidth Management Status flag showing
that the link speed or width has been changed in an attempt to correct
unreliable link operation (the ASM2824 does set it too).

If these checks indicate that link may not operate correctly, then poll
the Data Link Layer Link Active status flag along with the Link Training
flag for the duration of 200ms to see if the link has stabilised, that
is either that the Data Link Layer Link Active status flag has been set
or that Link Training has been inactive during at least the second half
of the interval.

If that has indicated failure, restrict the target speed to 2.5GT/s,
request a link retrain and check again if the link has stabilised.  If
that does not work either, then restore the original speed setting and
claim defeat, otherwise we are done.

NB interestingly enough with the ASM2824 vs PI7C9X2G304 configuration
referred above asking the ASM2824 to retrain with a higher target link
speed once the 2.5GT/s speed has been negotiated makes the two devices
successfully negotiate 5.0GT/s.  Lifting the 2.5GT/s speed restriction
would however prevent our workaround from working with an OS that issues
a reset and that is unaware of the problem.  This is because the devices
would then try to negotiate a higher link speed from scratch and fail,
while the sticky property of the Target Link Speed setting will keep the
2.5GT/s speed restriction across a reset.

Keep the 2.5GT/s speed restriction then, conservatively, if functional
once applied.

Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 12:26:42 -05:00
qianfan Zhao
62649165cb lib: sparse: Make CHUNK_TYPE_RAW buffer aligned
CHUNK_TYPE_RAW buffer is not aligned, and flash sparse images by
fastboot will report "Misaligned operation" if DCACHE is enabled.

Flashing Sparse Image
CACHE: Misaligned operation at range [84000028, 84001028]
CACHE: Misaligned operation at range [84001034, 84002034]
CACHE: Misaligned operation at range [8401104c, 8401304c]

Fix it

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2022-01-14 12:26:30 -05:00
Tom Rini
9b72d934c2 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- mvebu: Move PCIe code from serdes to PCIe driver (Pali)
- mtd: nand: pxa3xx: use marvell, prefix for custom DT properties
  (Pierre)
- Add PCIe support for Iomega iConnect board (Tony)
- ddr: marvell: a38x: Misc improvements / fixes (Marek)
- tools: kwbimage: Load address fixes (Pali)
- mvebu: db-88f6720: Fix CONFIG_SPL_TEXT_BASE and remove wrong memory
  layout (Pali)
- mvebu: Replace hardcoded values 0x0030/0x4030 by proper calculation
  (Pali)
2022-01-14 10:43:14 -05:00
Pali Rohár
1dcbcc715e arm: mvebu: Replace hardcoded values 0x0030/0x4030 by proper calculation
These hardcoded values were calculated from CONFIG_SPL_TEXT_BASE macro. Now
this macro is configurable via Kconfig, so calculate values 0x0030/0x4030
at compile time via CONFIG_SPL_TEXT_BASE option. Values 0x0030/0x4030
represents offset of CONFIG_SPL_TEXT_BASE from address 0x40000000.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 11:39:16 +01:00
Pali Rohár
5435f6e3fd arm: mvebu: db-88f6720: Fix CONFIG_SPL_TEXT_BASE and remove wrong memory layout
Memory layout in the comment is from Armada XP platform which uses load
address 0x40004030. DB-88f6720 is Armada 375 platform which uses same load
address as Armada 38x which is 0x40000030.

Currently SPL support for Armada 375 is unfinished and does not work. There
is missing Serdes initialization and DDR3 training code. So nobody noticed
that CONFIG_SPL_* options are not correct.

Fix at least CONFIG_SPL_TEXT_BASE constant and remove incorrect comments
about memory layout. So it is not misleading.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 11:39:16 +01:00
Pali Rohár
32860b00bf tools: kwbimage: Fix mkimage/dumpimage -l argument
Do not check for kwbimage configuration file when just showing information
about existing kwbimage file.

The check for kwbimage configuration file is required only when creating
kwbimage, not when showing information about image or when extracting data
from image.

With this change, it is possible to call mkimage -l and dumpimage -l also
for existing kwbimage file.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 11:39:16 +01:00
Pali Rohár
1972c7e308 tools: kwbimage: Extract main data image without -p arg for dumpimage
When there is no -p argument for dumpimage tool specified, extract the main
data image from kwbimage file. This makes dumpimage consistent with other
image formats.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 11:39:16 +01:00
Pali Rohár
44691034e1 tools: kwbimage/kwboot: Check ext field for non-zero value
Despite the official specification, BootROM does not look at the lowest bit
of ext field but rather checks if ext field is non-zero.

Moreover original Marvell doimage tool puts into the mhdr->ext field the
number of extended headers, so basically it sets ext filed to non-zero
value if some extended header is present.

Fix U-Boot dumpimage and kwboot tools to parse correctly also kwbimage
files created by Marvell doimage tool, in the same way as the BootROM is
doing it when booting these images.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 11:39:16 +01:00
Pali Rohár
1a0e52f50a tools: kwbimage: Do not cast const pointers to non-const pointers
Avoid casting const to non-const.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 11:39:16 +01:00
Pali Rohár
1a8e6b63e2 tools: kwbimage: Dump kwbimage config file on '-p -1' option
To regenerate kwbimage from existing image, it is needed to have kwbimage
config file. Add a new option to generate kwbimage config file from
existing kwbimage when '-p 1' option is given.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 11:39:16 +01:00
Pali Rohár
c934c9a666 tools: kwbimage: Show binary image offset in mkimage -l, in addition to size
For debugging purposes it is good to know where the binary image would be
loaded and also it is needed to know if printed size is image size or the
size of header together with image.

Make it unambiguous by showing that printed size is not the size of the
whole header, but only the size of executable code, and print also the
executable offset of this binary image. Load/execute address is the offset
relative to the base address (either 0x40004000 or 0x40000000).

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 11:39:16 +01:00
Pali Rohár
fdcae26156 tools: kwbimage: Add missing check for maximal value for DATA_DELAY
Data delay is stored as 8-bit number in kwbimage structure. Ensure the
given value is at most 255.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 11:39:16 +01:00
Pali Rohár
18d85d6e8a arm: mvebu: Enable BootROM output on A38x
BootROMs on pre-A38x SoCs enabled its output on UART by default, but A38x'
BootROM has its output on UART disabled by default.

To enable BootROM output on A38x SoC, it is required to set DEBUG flag
(which only enables BootROM output and nothing more) in kwbimage. For UART
images this DEBUG flag is ignored by BootROM.

Enable kwbimage DEBUG flag for all A38x boards.

With this change BootROM prints the following (success) information on UART
before booting U-Boot kwbimage:

  BootROM - 1.73
  Booting from SPI flash

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 11:39:16 +01:00
Pali Rohár
bdf8c9f219 tools: kwbimage: Enforce 128-bit boundary alignment only for Sheeva CPU
This alignment is required only for platforms based on Sheeva CPU core
which are A370 and AXP. Now when U-Boot build system correctly propagates
LOAD_ADDRESS there is no need to have enabled 128-bit boundary alignment on
platforms which do not need it. Previously it was required because load
address was implicitly rounded to 128-bit boundary and U-Boot build system
expected it and misused it. Now with explicit setting of LOAD_ADDRESS there
is no guessing for load address anymore.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 11:39:16 +01:00
Pali Rohár
a2b1db41cf arm: mvebu: Correctly set LOAD_ADDRESS for U-Boot SPL binary in kwbimage
U-Boot SPL for mvebu platform is not compiled as position independent.
Therefore it is required to instruct BootROM to load U-Boot SPL at the
correct address. Loading of kwbimage binary code at specific address can be
now achieved by the new LOAD_ADDRESS token as part of BINARY command in
kwbimage config file.

Update mvebu Makefile to put value of $(CONFIG_SPL_TEXT_BASE) into
LOAD_ADDRESS token when generating kwbimage.cfg from kwbimage.cfg.in.

It is required to update regex for sed to find replacement tokens at any
position on a line in kwbimage config file and not only at the beginning of
the line. This is because LOAD_ADDRESS is specified at the end of line
containing the BINARY command.

It looks like all Armada boards set CONFIG_SPL_TEXT_BASE to value
0x40004030 or 0x40000030. Why this value? It is because main kwbimage
header is at address 0x40004030 or 0x40000000 and it is 32 bytes long.
After the main header there is the binary header, which consist of 1 byte
for type, 3 bytes for size, 1 byte for number of arguments, 3 reserved
bytes and then 4 bytes for each argument. After these arguments comes the
executable code.

So arguments start at address 0x40004028 or 0x40000028. Before commit
e6571f38c9 ("arm: mvebu: Remove dummy BIN header arguments for SPL
binary") there were two (dummy) arguments, which resulted in load address
of 0x40004030 or 0x40000030, always. After that commit (which removed dummy
arguments), load address stayed same due to the 128-bit alignment done by
mkimage.

This patch now reflects the dependency between $(CONFIG_SPL_TEXT_BASE),
load address and dummy kwbimage arguments, and allows the user to adjust
$(CONFIG_SPL_TEXT_BASE) config option to some other value.

For unsupported values, when mkimage/kwbimage cannot set chosen load address
as specified by $(CONFIG_SPL_TEXT_BASE), the build process now fails,
instead of silently generating non-working kwbimage.

Removal of this alignment between $(CONFIG_SPL_TEXT_BASE) and LOAD_ADDRESS
can only be done by compiling U-Boot SPL as position independent. But this
currently is not possible for 32-bit ARM version of U-Boot SPL.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 11:39:16 +01:00
Pali Rohár
29c6a9c763 arm: mvebu: Set CPU for U-Boot SPL binary in kwbimage
kwbimage needs to know CPU type, so set it in kwbimage config file.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 11:39:16 +01:00
Pali Rohár
78d997f98b tools: kwbimage: Check for maximal kwbimage header size
BootROM loads kwbimage header to L2-SRAM and BootROM reserve only 192 kB for it.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 11:39:16 +01:00
Pali Rohár
252e7c3a24 tools: kwbimage: Check the return value of image_headersz_v1()
Function image_headersz_v1() may return zero on fatal errors.
In this case the function already printed an error message.

Check the return value of image_headersz_v1() in kwbimage_generate(),
and exit on zero value with EXIT_FAILURE.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 11:39:16 +01:00
Pali Rohár
0aca27ea18 tools: kwbimage: Add support for specifying LOAD_ADDRESS for BINARY command
ARM executable code included in kwbimage binary header, which is not
position independent, needs to be loaded and executed by BootROM at the
correct fixed address.

Armada BootROMs load kwbimage header (in which the executable code is also
stored) at fixed address 0x40004000 or 0x40000000 which is mapped to
L2-SRAM (L2 Cache as SRAM). Address 0x40004000 is used on Armada platforms
with Sheeva CPU core (A370 and AXP) where BootROM uses MMU with 0x4000
bytes for MMU translation table. Address 0x40000000 is used on all other
platforms.

Thus the only way to specify load and execute address of this executable
code in binary kwbimage header is by filling dummy arguments into the
binary header, using the same mechanism we already have for achieving
128-bit boundary alignment on A370 and AXP SoCs.

Extend kwbimage config file parser to allow to specify load address as
part of BINARY command with syntax:

    BINARY path_to_binary arg1 arg2 ... argN LOAD_ADDRESS address

If the specified load address is invalid or cannot be used, mkimage will
throw fatal error and exit. This will prevent generating kwbimage with
invalid load address for non-position independent binary code.

If no load address is specified, kwbimage will not fill any the dummy
arguments, thus it will behave the same as before this change.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-14 11:39:16 +01:00