CONFIG_SYS_INIT_RAM_END was a misnomer as it suggests this might be
some end address; to make the meaning more clear we rename it into
CONFIG_SYS_INIT_RAM_SIZE
No other code changes are performed in this patch, only minor editing
of white space (due to the changed length) and the comments was done,
where noticed.
Note that the code for the PATI and cmi_mpc5xx board configurations
looks seriously broken. Last known maintainers on Cc:
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Denis Peter <d.peter@mpl.ch>
Cc: Martin Winistoerfer <martinwinistoerfer@gmx.ch>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Board support for the Guntermann & Drunck CATCenter Io.
Board support for the Guntermann & Drunck IoCon.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
SICRH has been misconfigured, i.e. TSEC2 clock + D[0:3] are GPIOs.
Fix this to be RGMII signals again.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
This patch adds CONFIG_SYS_FLASH_BANKS_SIZES define to make use of new
cfi_flash driver ability to detect flash chips that are bigger than a
corresponding address window (we have such situation on some revs of
a4m072).
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Initial support for Extreme Engineering Solutions XPedite5500 -
a P2020-based PMC/XMC single board computer.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add memory and I2C posts to the XPedite517x/520x/537x board families.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some U-Boot images for X-ES boards support multiple products in the same
family. For example, the XPedite5370, XPedite5371, and XPedite5372 are
similar enough that one U-Boot image can work on all 3 cards. To make it
clear that a U-Boot image can work on boards of the same family, rename
the boards with the least significant digit of 'x'.
While we're at it, change the board config file and make targets to be
lowercase.
Also change the default uImage and fdt filenames to "board.uImage" and
"board.dtb" to be more generic.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add board_flash_wp_on() to check a pca9557 gpio pin to see
if non-volatile memory write protection is enabled.
Previously, write protected NOR flashes would fail initialization which
resulted in a bootup error such as:
...
DTT: 53 C local / 64 C remote (adt7461@4c)
DTT: 54 C local (ds1621@48)
FLASH: Executed from FLASH1
POST memory PASSED
FLASH: ## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0 MB
## Unknown FLASH on Bank 2 - Size = 0x00000000 = 0 MB
*** failed ***
### ERROR ### Please RESET the board ###
With this patch, NOR flash initialization is skipped:
...
DTT: 53 C local / 64 C remote (adt7461@4c)
DTT: 54 C local (ds1621@48)
FLASH: Executed from FLASH1
POST memory PASSED
FLASH: Uninitialized - Write Protect On
L2: 1024 KB enabled
NAND: 1024 MiB
...
Note that flash related commands such as flinfo and saveenv will error
out when flash write protection is enabled.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Create a common checkboard() function to support all X-ES's Freescale
boards.
Also, add a get_board_derivative() function which reads hardware
strapping resistors to determine what model a board is. This allows one
U-Boot image to support multiple boards.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add a new 'pci enum' command which re-enumerates the PCI buses. This
command is enabled via the CONFIG_CMD_PCI_ENUM define and can be useful
in boards with FPGAs connected via PCI/PCIe, boards that support PCI
hot-plugging, or during PCI debug.
Also enable the 'pci enum' command for X-ES's Freescale-based boards.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
Common Freescale code for PCI initialization now exists, so migrate X-ES
boards to use it.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The recent change the env code added an additional 32 bytes into gd_t
and that causes to grow pass the previous CONFIG_SYS_GBL_DATA_SIZE size.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This board is broken and impossible to repair without deep knowledge or
availability of the hardware.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
The default values for 'addip' and 'norargs' changed per customer
request. Everything else cleaned up to fit into 80 symbol line.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Commit 0ad7f0950a [ppc4xx: cleanup
default environment for AMCC boards] broke the default env for
many PPC4xx boards. The '\0' character got removed at the end
of some environment commands like "update". This patch adds the
missing '\0' characters again.
Signed-off-by: Stefan Roese <sr@denx.de>
Until now, the Sequoia RAM-booting image disabled NOR flash support
as this image was mainly created for NAND-only boards. This patch
now enables NOR flash support for this RAM-booting version as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Add CONFIG_POST_UART to implement a board specific UART POST test.
This is done since lwmon5 needs to set POST_ALWAYS to run this
test on each reboot. And we don't want to change the default
behavious of this this.
Signed-off-by: Stefan Roese <sr@denx.de>
Update to use the recent, common FSL PCI initialization code.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
CC: sr@denx.de
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
800, 900, 1000, 1200MT/s data rate parameters are added for fixed sdram
setting. SPD based parameters and fixed parameters can be toggled by hwconfig.
To use fixed parameters,
hwconfig=fsl_ddr:sdram=fixed
To use SPD parameters,
hwconfig=fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
