Commit graph

18 commits

Author SHA1 Message Date
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
61b29b8268 dm: core: Require users of devres to include the header
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05 19:33:46 -07:00
Vignesh Raghavendra
658df8bd94 mtd: spi-nor-core: Add octal mode support
Add support for Octal flash devices. Octal flash devices use 8 IO lines
for data transfer. Currently only 1-1-8 Octal Read mode is supported.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-27 22:27:22 +05:30
Tom Rini
ac0f978afd First set of u-boot-atmel features for 2020.04 cycle
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Merge tag 'u-boot-atmel-2020.04-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel features for 2020.04 cycle

This feature set is a patch series from Tudor Ambarus which includes
parsing of the spi flash SFDP parser for SST flashes, and using those
tables to retrieve unique saved per device MAC address. This is then
used as base mac address on the SAMA5D2 Wireless SOM EK board.
2020-01-07 08:44:56 -05:00
Vignesh Raghavendra
cb56caacf8 mtd: spi-nor-core: Fix static checker warnings
Static checker warns 'ret' variable may be used uninitialized in
spi_nor_erase() and spi_nor_write() in case of zero length requests.
Fix these warnings by checking for zero length requests and returning
early.

Reported-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-12-27 17:47:26 +05:30
Tudor Ambarus
a11c081da3 mtd: spi: spi-nor-core: Add SST vendor specific SFDP parser
JESD216 allow vendors to define their own SFDP tables.

Add SST SFDP parser. The vendor table is allocated using resource-managed
kmalloc - the table will be freed on driver detach. It will be accessible
by getting the UCLASS_SPI_FLASH's private data.

The SST's SFDP table is particularly of interest because contains
pre-programmed globally unique EUI-48 and EUI-64 identifiers.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-12-17 09:49:05 +02:00
Vignesh Raghavendra
2a2174d3da mtd: spi-nor-core: Replace MTD_SPI_NOR_USE_4K_SECTORS with SPI_FLASH_USE_4K_SECTORS
U-Boot uses CONFIG_SPI_FLASH_USE_4K_SECTORS to enable 4K small sector
support. Use that instead of MTD_SPI_NOR_USE_4K_SECTORS.

Reported-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:48:32 +05:30
Vignesh Raghavendra
cc9118757f mtd: spi-nor-core: Use dev_err for reporting erase/write failures
Use dev_err() when reporting reason for erase/write failures so that
users can be made aware of the reason for failure.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:48:32 +05:30
Eugeniy Paltsev
e0cacdcc0a mtd: spi-nor: add missing SST26* flash IC protection ops
Commit c4e8862308 (mtd: spi: Switch to new SPI NOR framework)
performs switch from previous 'spi_flash' infrastructure without
proper testing/investigations which results in a regressions for
SST26 flash series.

Add missing SST26* flash IC protection ops which were introduced
previously by
Commit 3d4fed87a5 (mtd: sf: Add support of sst26wf* flash ICs
protection ops)

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16 08:09:22 +05:30
Weijie Gao
60e2bf4678 mtd: spi-nor: fix page program issue when using spi-mem driver
Some SPI controllers can't write nor->page_size bytes in a single step
because their TX FIFO is too small, but when that happens we should
make sure a WRITE_EN command before each write access and READ_SR command
after each write access is issued.

We should allow nor->write() to return a size that is smaller than the
requested write size to gracefully handle this case.

Also, the spi_nor_write_data() should return the actual number of bytes
that were written during the spi_mem_exec_op() operation.

This patch is a combination of two commits backported from kernel:

  commit 630d6bd8a3b4 ("mtd: spi-nor: Support controllers with limit ...")
  commit 3baa8ec88c2f ("mtd: devices: m25p80: Make sure WRITE_EN is ...")

Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Acked-by: Vignesh R <vigneshr@ti.com>
Tested-by: Shyam Saini <shyam.saini@amarulasolutions.com> # microzed
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-05-03 15:26:12 +05:30
Marek Vasut
f909ddb3e1 mtd: spi: Replace ad-hoc default implementation with spi_mem_op
Replace the ad-hoc erase operation implementation with a simple spi_mem_op
implementation of the same functionality. This is a minor optimization and
removal of the ad-hoc code.

This however also changes the behavior of the execution of the erase
opcode from two separate transfer requests to the SPI NOR driver to
one transfer request to the SPI NOR driver. The former was how U-Boot
behaved before the SPI NOR framework was imported and the later was
introduced by the SPI NOR framework. The former is more optimal, so
keep that.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Horatiu Vultur <horatiu.vultur@microchip.com>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Vignesh R <vigneshr@ti.com>
Tested-by: Ashish Kumar <Ashish.kumar@nxp.com>
2019-04-12 11:42:48 +05:30
Vignesh R
778572d7cb mtd: spi: Add lightweight SPI flash stack for SPL
Add a tiny SPI flash stack that just supports reading data/images from
SPI flash. This is useful for boards that have SPL size constraints and
would need to use SPI flash framework just to read images/data from
flash. There is approximately 1.5 to 2KB savings with this.

Based on prior work of reducing spi flash id table by
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
c4e8862308 mtd: spi: Switch to new SPI NOR framework
Switch spi_flash_* interfaces to call into new SPI NOR framework via MTD
layer. Fix up sf_dataflash to work in legacy way. And update sandbox to
use new interfaces/definitions

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
8c927809ea mtd: spi: spi-nor-core: Add back U-Boot specific features
For legacy reasons, we will have to keep around U-Boot specific
SPI_FLASH_BAR and SPI_TX_BYTE. Add them back to the new framework

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
0c6f187cdb mtd: spi: spi-nor-core: Add SFDP support
Sync Serial Flash Discoverable Parameters (SFDP) parsing support from
Linux. This allows auto detection and configuration of Flash parameters.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
61059bc55a mtd: spi: spi-nor-core: Add 4 Byte addressing support
Sync changes from Linux SPI NOR framework to add 4 byte addressing
support. This is required in order to support flashes like MT35x
that no longer support legacy Bank Address Register(BAR) way of accessing
>16MB region.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
492e65b29b mtd: spi: spi-nor-core: Add SPI MEM support
Many SPI controllers have special MMIO interfaces which provide
accelerated read/write access but require knowledge of flash parameters
to make use of it. Recent spi-mem layer provides a way to support such
controllers.
Therefore, add spi-mem support to spi-nor-core as a way to support SPI
controllers with MMIO interface. SPI MEM layer takes care of translating
spi_mem_ops to spi_xfer()s in case of legacy SPI controllers.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
7aeedac015 mtd: spi: Port SPI NOR framework from Linux
Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not
support 4 byte addressing opcodes, SFDP table parsing and different types of
quad mode enable sequences. Many newer flashes no longer support BANK
registers used by sf layer to a access >16MB of flash address space.
So, sync SPI NOR framework from Linux v4.19 that supports all the
above features. Start with basic sync up that brings in basic framework
subsequent commits will bring in more features.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30