When CONFIG_IMX6_THERMAL is defined print the CPU temperature grade info
along with the current temperature.
Before:
CPU: Temperature 42 C
After:
CPU: Automotive temperature grade (-40C to 125C) at 42C
CPU: Industrial temperature grade (-40C to 105C) at 42C
CPU: Extended Commercial temperature grade (-20C to 105C) at 42C
Cc: Stefan Roese <sr@denx.de>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Jon Nettleton <jon.nettleton@gmail.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Ye Li <b37916@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Cc: Peng Fan <b51431@freescale.com>
Tested-by: Nikolay Dimitrov <picmaster@mail.bg>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Display the max CPU frequency as well as the current running CPU frequency
if the max CPU frequency is available and differs from the current CPU
frequency.
Before:
CPU: Freescale i.MX6Q rev1.2 at 792 MHz
After - using an 800MHz IMX6DL (running at its max)
CPU: Freescale i.MX6DL rev1.1 at 792 MHz
After - using a 1GHz IMX6Q (not running at its max):
CPU: Freescale i.MX6Q rev1.2 996 MHz (running at 792 MHz)
Cc: Stefan Roese <sr@denx.de>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Jon Nettleton <jon.nettleton@gmail.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Ye Li <b37916@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Cc: Peng Fan <b51431@freescale.com>
Tested-by: Nikolay Dimitrov <picmaster@mail.bg>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Fix below warning
arch/arm/imx-common/cpu.c:29:14: warning: ‘get_reset_cause’ defined but
not used
static char *get_reset_cause(void)
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Boards such as imx6q_sabresd might not have mapmem.h as part of
their common library. This causes a build error if the DEK blob
command is enabled.
Fix: make explicit the include of mapmem.h
Signed-off-by: Ulises Cardenas <Ulises.Cardenas@freescale.com>
Reviewed-by: Ruchika Gupta <Ruchika.gupta@freescale.com>
1. Introduce a new structure `struct mxc_i2c_bus`, this structure will
used for non-DM and DM.
2. Remove `struct mxc_i2c_regs` structure, but use register offset to access
registers based on `base` entry of `struct mxc_i2c_bus`.
3. Remove most `#ifdef I2C_QUIRK_REG`. Using driver_data to contain platform
flags. A new flag is introduced, I2C_QUIRK_FLAG.
4. Most functions use `struct mxc_i2c_bus` as one of the parameters.
Make most functions common to DM and non-DM, try to avoid duplicated code.
5. Support DM, but pinctrl is not included. Pinmux setting is still set
by setup_i2c, but we do not need bus_i2c_init for DM.
6. struct i2c_parms and struct sram_data are removed.
7. Remove bus_i2c_read bus_i2c_write prototype in header file. The frist
paramter of bus_i2c_init is modified to i2c index. Add new prototype
i2c_idle_bus and force_bus_idle. Since bus_i2c_init is not good for
DM I2C and pinctrl is missed, we use a weak function for i2c_idle_bus.
Board file take the responsibility to implement this function, like this:
"
int i2c_idle_bus(struct mxc_i2c_bus *i2c_bus)
{
if (i2c_bus->index == 0)
force_bus_idle(i2c_pads_info0);
else if (i2c_bus->index == 1)
force_bus_idle(i2c_pads_info1);
else
xxxxxx
}
"
8. Introduce a weak function, enable_i2c_clk
9. Tested on an i.MX7 platform. Log info:
=> dm tree
Class Probed Name
----------------------------------------
root [ + ] root_driver
simple_bus [ ] |-- soc
simple_bus [ ] | |-- aips-bus@30000000
simple_bus [ ] | | |-- anatop@30360000
simple_bus [ ] | | `-- snvs@30370000
simple_bus [ ] | |-- aips-bus@30400000
simple_bus [ ] | `-- aips-bus@30800000
i2c [ ] | |-- i2c@30a20000
i2c [ ] | `-- i2c@30a40000
simple_bus [ ] `-- regulators
=> i2c dev 0
Setting bus to 0
=> i2c probe
Valid chip addresses: 08 50
=> i2c md 8 31
0031: 08 08 08 08 08 08 08 08 08 08 08 08 08 08 08 08
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Acked-by: Simon Glass <sjg@chromium.org>
In order to avoid code duplication, move the DDR3 initialization to the
common place under imx-common. Currently ROW_DIFF and COL_DIFF can be
chosen from the board file. The JEDEC timings are specified using a
common ddr3_jedec_timings structure.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
IMX_CONFIG is currently passed via the SYS_EXTRA_OPTIONS which is marked
as deprecated.
Add a new Kconfig file under arch/arm/imx-common and define the
IMX_CONFIG Kconfig in there.
Each board is supposed to provide a default value pointing to the
appropriate imximage.cfg file.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Freescale's SEC block has built-in Data Encryption
Key(DEK) Blob Protocol which provides a method for
protecting a DEK for non-secure memory storage.
SEC block protects data in a data structure called
a Secret Key Blob, which provides both confidentiality
and integrity protection.
Every time the blob encapsulation is executed,
a AES-256 key is randomly generated to encrypt the DEK.
This key is encrypted with the OTP Secret key
from SoC. The resulting blob consists of the encrypted
AES-256 key, the encrypted DEK, and a 16-bit MAC.
During decapsulation, the reverse process is performed
to get back the original DEK. A caveat to the blob
decapsulation process, is that the DEK is decrypted
in secure-memory and can only be read by FSL SEC HW.
The DEK is used to decrypt data during encrypted boot.
Commands added
--------------
dek_blob - encapsulating DEK as a cryptgraphic blob
Commands Syntax
---------------
dek_blob src dst len
Encapsulate and create blob of a len-bits DEK at
address src and store the result at address dst.
Signed-off-by: Raul Cardenas <Ulises.Cardenas@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Ulises Cardenas <ulises.cardenas@freescale.com>
Signed-off-by: Ulises Cardenas-B45798 <Ulises.Cardenas@freescale.com>
The malloc() calls are unnecessary, just allocate the stuff on stack.
While at it, reorder the code a little, so that only one variable is
used for the text, use snprintf() instead of sprintf() and use %01d
as a formatting string to avoid any possible overflows.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
- fix crash when sata device is not initialized
- remove disable_sata_clock() since it is not clear which clock for which
device should be disabled here
- call disable_sata_clock() for mx6 in preboot_os instead
Signed-off-by: Soeren Moch <smoch@web.de>
Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
Ideally, the Linux kernel should get the hardware in its most
untouched state. For the most part, U-Boot does not reset the various
subsystems it touches before boot, and usually Linux deals with it, but
on some boards (cm_fx6) the Linux kernel fails to detect the ssd
correctly if sata is used by U-Boot.
Power off sata on OS boot so that Linux will have a clean state to work
with.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Add imx6 thermal device to mx6 soc file. Read the cpu temperature
using this device to access onchip thermal sensor.
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Move MX5 specific set_chipselect_size function into generic i.MX part,
such that MX6 based boards are able to use this function as well.
While doing this the iomuxc gpr member needed to be consolidated between
MX5 and MX6.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Many boards use a minimal .cfg file in the SPL case.
Introduce spl_sd.cfg so that we can reuse it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
The bmode command forces the SoC to use a specific boot device
by writing its boot mode into SRC_GPR9, and notifying the SoC of
the change using SRC_GPR10[28] bit: if the bit is on, bootROM
uses the value in SRC_GPR9 instead of SRC_SMBR1 to determine
the boot device.
SPL on the other hand is oblivious to this distinction, so once
the bootROM loads SPL from the device configured in SRC_GPR10,
SPL will attempt to load U-Boot from the device configured in
SRC_SMBR1, which is not updated by the bootROM to the value in
SRC_GPR9.
The result is that the selected boot device is not used across all
the boot stages.
Update spl_boot_device() to look at gpr9 when necessary.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Heiko Schocher <hs@denx.de>
On mx6 sabreauto board, there are two USB ports:
0: OTG
1: HOST
The EHCI driver is enabled for this board, but the IOMUX and VBUS power
control is not implemented, which cause both USB port failed to work.
This patch fix the problem by adding the board support codes.
Since the power control uses the GPIO pin from port expander MAX7310,
the PCA953X driver is enabled for accessing the MAX7310.
The ID pin of OTG Port needs to configure the GPR1 bit 13 for selecting
its daisy chain. Add a new function "imx_iomux_set_gpr_register" to
handle GPR register setting.
Signed-off-by: Ye.Li <B37916@freescale.com>
Introduce a new configuration "CONFIG_MXC_GPT_HCLK". When it is set,
the GPT will select a high frequency clock as clock source.
Otherwise, the GPT will stay to use 32Khz OSC as clock source.
In the implementation, since only the GPT on i.MX6 series provide the
clock source option for 24Mhz OSC. For others (only i.MX5 and i.MX6
compile the driver), if the configuration is set, the perclk will be
selected as clock source.
MX6Q/D Rev 1.0 and MX6SL are special in the implementation, because they
don't have the 24Mhz OSC clock source option, so also select the perclk
for them. For MX6SL, we will set the OSC 24Mhz to perclk in CCM, so
eventually the clock comes from OSC 24Mhz.
Signed-off-by: Ye.Li <B37916@freescale.com>
Rename some defines containing FAT in their name to be filesystem generic:
MMCSD_MODE_FAT => MMCSD_MODE_FS
CONFIG_SPL_FAT_LOAD_ARGS_NAME => CONFIG_SPL_FS_LOAD_ARGS_NAME
CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME => CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION => CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@ti.com>
GPIOs should be requested before use. Without this, driver model will
not permit the GPIO to be used.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Declare displays[] and display_count in imx-common/video.h to
prevent "Should it be static?" messages when compiling board
files with "make C=1".
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
The MX6 DRAM controller can be configured to handle 4GiB of DRAM, but
only 3840 MiB of that can be really used. In case the controller is
configured to operate a 4GiB module, the imx_ddr_size() function will
correctly compute that there is 4GiB of DRAM in the system. Firstly,
the return value is 32-bit, so the function will effectively return
zero. Secondly, the MX6 cannot address the full 4GiB, but only 3840MiB
of all that. Thus, clamp the returned size to 3840MiB in such case.
Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
There is no need to keep iomuxc_base_regs structure as it serves the exact same
purpose of the iomuxc structure, which is to provide access to the GPR
registers.
The additional fields of iomuxc_base_regs are not used. Other advantage of
'iomuxc' is that it has a shorter name and the variable declarations can fit
into a single line.
So remove iomuxc_base_regs structure and use iomuxc instead.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
mx6solox is the newest member of the mx6 family.
Some of the new features on this variants are:
- Cortex M4 microcontroller (besides the CortexA9)
- Dual Gigabit Ethernet
Add the initial support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
THe mx25 arch does not have a sys_proto.h file.
Instead of creating a dummy file, the file
is not included for this SOC.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The IMX6QUAD/DUAL have SATA, but the IMX6SOLO/DL do not. Return
instead of configuring the SATA clock and GPR13 registers.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Allow imx_iomux_v3_setup_multiple_pads to take a multi-cpu pad_list
and add macros for declaring the pad_list that take into account the
SoC types supported using CONFIG_MX6QDL (supports both the MX6Q and MX6DL
iomux).
Cc: Stefan Roese <sr@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Andy Ng <andreas2025@gmail.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add comment block for the imx_ddr_size function and remove the extra unused
fields from struct esd_mmdc_regs which are also not common between IMX53 and
IMX6.
Cc: Stefan Roese <sr@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Andy Ng <andreas2025@gmail.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
Add a common spl.c file to support boot device functions needed for SPL
such as detecting the boot device.
Cc: Stefan Roese <sr@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Andy Ng <andreas2025@gmail.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
Because cmd_mkimage is used in various subdirectories,
it seems reasonable to define it in scripts/Makefile.lib.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
On mx6sl there is a LVE (Low Voltage Enable) bit in the IOMUXC_SW_PAD_CTL
register that can enable or disable low voltage on the pad.
LVE is bit 22 of IOMUXC_SW_PAD_CTL register, but in order to make the
calculation easier we can define it as a flag in bit 1, since this bit is unused.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Otavio Salvador <otavio@ossystems.com.br>
this function is used by several board together with board_video_skip
to detect if hdmi is plugged is order to select the display to use.
So move it in imx-common to share it.
Signed-off-by: Eric Bénard <eric@eukrea.com>
this function is shared by several boards and thus can be factorized
Signed-off-by: Eric Bénard <eric@eukrea.com>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
U-Boot uses the 'mkimage' tool to produce various image types,
not only uImage image type. Rename the invocation name from
UIMAGE to MKIMAGE.
The following command was used to do the replacement:
git grep 'quiet_cmd_mkimage.* = UIMAGE' | cut -d : -f 1 | \
xargs -i sed -i "s@\(quiet_cmd_mkimage\)\(.*\) = UIMAGE @\1\2 = MKIMAGE@" {}
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
