Commit graph

6 commits

Author SHA1 Message Date
Simon Glass
8c103c33fb dm: dts: Convert driver model tags to use new schema
Now that Linux has accepted these tags, move the device tree files in
U-Boot over to use them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-14 09:43:26 -07:00
Geert Uytterhoeven
68083b897b renesas: Fix RPC-IF compatible values
The compatible values used for device nodes representing Renesas Reduced
Pin Count Interfaces were based on preliminary versions of the Device
Tree Bindings.

Correct them in both DTSi files and drivers, to match the final DT
Bindings.

Note that there are no DT bindings for RPC-IF on RZ/A1 yet, hence the
most logical SoC-specific value is used, without specifying a
family-specific value.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-02 13:25:01 +02:00
Geert Uytterhoeven
e17205d067 ARM: dts: rmobile: Fix RPC-IF device node names
According to the Generic Names Recommendation in the Devicetree
Specification Release v0.3, and the DT Bindings for the Renesas Reduced
Pin Count Interface, the node name for a Renesas RPC-IF device should be
"spi".  Especially on R-Car Gen3 and RZ/G2, the node name matters, as
the node is enabled by passing a DT fragment from TF-A to U-Boot, and
from U-Boot to subsequent software.

Fix this by renaming the device nodes from "rpc" to "spi".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-02 13:25:01 +02:00
Lad Prabhakar
67704d6dfb ARM: dts: renesas: Remove leading 0x from rpc node
Remove the leading "0x" from rpc node to fix the below dtc warning:

Warning (simple_bus_reg): Node /soc/rpc@0xee200000 simple-bus unit
address format error, expected "ee200000"

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-01-18 13:29:12 +01:00
Marek Vasut
be1e9dc080 ARM: renesas: Enable R8A66597 USB host on GR Peach
Enable USB host support on GR Peach board.

To use USB host on GR Peach, it might be necessary to solder JP3 header
onto the board first and then short it. Shorting JP3 is mandatory to let
the U5 regulator to supply VBUS to the CN3 USB port.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
2019-08-22 18:23:37 +02:00
Chris Brandt
ba932bc846 ARM: dts: renesas: Add RZ/A1 GR-Peach board
Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach,
which is a cheap development platform with RZ/A1H SoC. The
DTs are imported from Linux 5.0.11, commit d5a2675b207d .

Currently supported are UART, ethernet and RPC SPI. The board
can be booted from RPC SPI by writing the u-boot.bin binary
to the beginning of the SPI NOR, e.g. using the "sf" command.
The board can also be booted via JTAG by setting text base to
0x20020000, loading u-boot.bin there via JTAG and executing it
from that address.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07 05:41:32 +02:00