Commit graph

79927 commits

Author SHA1 Message Date
Michal Simek
532ad5f841 microblaze: Change stack protection address to new stack address
SLR low address is still setup to 0 that's why only high limit should be
updated. STACK_SIZE macro is present and could be possible used for
low address alignment but it is not done by this patch.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c00cb843df848703b760a65934ed3ce31fafcf19.1655299267.git.michal.simek@amd.com
2022-06-24 14:15:00 +02:00
Michal Simek
1918c4166e microblaze: Separate code end substraction
Follow up patch will convert symbol handling that's why it is necessary to
separate logic around symbols to special instruction. It adds 4B for new
instruction but it is worth to do it to have code ready for for full
relocation.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/030863fa9a9c1ca0a9b082fe498522da09189fbc.1655299267.git.michal.simek@amd.com
2022-06-24 14:15:00 +02:00
Michal Simek
10fd6d64c7 microblaze: Enable REMAKE_ELF
Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
 -O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
89e81e6c32 mips: Move endianness selection to arch/Kconfig
This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
d896e790cb microblaze: Fix typo in exception.c
Trivial fix.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c4ede6dc738c5bd7c518f3bb2c9410b15c102e20.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
65a4da947e microblaze: Remove CONFIG_TEXT_BASE from code
Use symbol instead macro to find where U-Boot starts.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d5d4c201bee6171e85b47783d916387d84db0456.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
aa0799eb67 microblaze: Fix early stack allocation
CONFIG_SYS_INIT_SP_OFFSET macro place stack to TEXT_BASE - SYS_MALLOC_F_LEN
but there is no reason to do it now because board_init_f_alloc_reserve()
returns exact location where stack should be. That's why stack location is
calculated at run time and there is no need to hardcode it via macro. This
change will help with placing U-Boot to any address.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e9aee69646e022fd8a96cbee2d2a07ab81fb6e05.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
16a18471bb microblaze: Fix stack protection behavior
When U-Boot starts stack protection can be already enabled that's why setup
the lowest possible SLR value which is address 0. And the highest possible
stack in front of U-Boot. That's why you should never load U-Boot to the
beginning of DDR. There must be some space reserved. Code is using this
location for early malloc space, early global data and stack.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/86b9748bad12142659804d6381bc6bbf20be44f1.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
7cf236cf1f microblaze: Switch absolute branches to relative
There is no reason to use absolute branches and use just relative. This
change helps with moving binary to different location and start it from
there.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/83a5103b85c1c2220cd3ab4d5365169c6660e40a.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
4c9e2d6434 tools: relocate-rela: Read rela start/end directly from ELF
There is no need to pass section information via parameters.
Let's read text base and rela start/end directly from elf.
It will help with reading other information from ELF for others
architecture. Input to relocate-rela is u-boot binary and u-boot ELF.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ab7ae14a6e058722e8c608089729e98edf20a08d.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
d8b0444b56 tools: relocate-rela: Use global variables
Declare rela_start/end and text_base as global variables. It will help with
using these variables for ELF decoding.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7485b163e92f8f3f754c35f7c88c3314f2212efd.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
b956637b68 Makefile: Fix description for relocate-rela parameters
Numbers in comment are shifter which is visible from command which calls
them. Also relocate-rela usage is describing them.
"Usage: %s <bin file> <text base> <rela start> <rela end>"

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bb0287b9071eb33eea0cf914a7128c2603684377.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
fe9d049e13 tools: relocate-rela: Open binary u-boot file later
There is no value to open u-boot binary file so early. Better to check all
values first and then open binary file.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9c2b4ebadbe83497db28af02f6af2623793ffdb6.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
686c2bbb44 arm64: zynqmp: Fix tps544/u3007 node description
u3007 is removed in zynqmp-m-a2197-02-revA board and on
zynqmp-m-a2197-03-revA it was renamed to v3022 at address 0x18.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f477796bcca6fce09168699a0498d792f4a54acf.1655287013.git.michal.simek@amd.com
2022-06-24 14:14:34 +02:00
Michal Simek
5f5979f430 arm64: zynqmp: Update tps53681 i2c address
TI manual (https://www.ti.com/lit/gpn/TPS53681) is saying that i2c address
is 7bit where c0h is 1100000 which is 0x60.

This will fix issues reported by make dtbs that 0xc0 is above 7bit regular
i2c address range.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2f50c1cd258f6b05deb2a6a9af7fa92952f3f8cb.1655287013.git.michal.simek@amd.com
2022-06-24 14:14:33 +02:00
Michal Simek
0b0d433b6c arm64: zynqmp: Fix i2c addresses for vck190 SC
si570 is normally at 0x5d address and address is not aligned with address
in node.
8T49N240 can't be at 0xd8 that's why it is shifter by one bit.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4fa86fffa9cb8abe633fbc5a9c55bea249b5edfb.1655287013.git.michal.simek@amd.com
2022-06-24 14:14:33 +02:00
Ashok Reddy Soma
123462e5e5 pinctrl: zynqmp: Add support for output-enable and bias-high-impedance
Add support to handle 'output-enable' and 'bias-high-impedance'
configurations. DT property output-enable brings out the pins from
tri-state, whereas bias-high-impedance changes the pins state to
tri-state.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1a02cd41d183d397ebce23c497178281c7286692.1655286745.git.michal.simek@amd.com
2022-06-24 14:14:29 +02:00
Michal Simek
b611f7faf9 arm64: zynqmp: Enable DP for kv260-revA board
DP is enabled for revB and should be enabled for kv260-revA too. Changes in
other boards were done by commit 8b82a3a7fe ("arm64: zynqmp: Enable DP
driver for SOMs").

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4e273bce3a8acf4495b67b702b1704acec8d9ccb.1654779436.git.michal.simek@amd.com
2022-06-24 14:14:25 +02:00
Stefan Herbrechtsmeier
ff5d9065ed xilinx: zynqmp: Do not use 0 as spl bss start address
Do not use 0 as address for memory because of the special meaning for
pointers (null pointer). Change the spl bss start address to the second
page.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220607074314.27125-1-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:11:06 +02:00
Michal Simek
baba22addd arm64: zynqmp: Add support for kr260 revA/B boards
Board is using kv260 design for couple of parts defined by spec like i2c
eeproms, ina260, uart, etc.

Board has 4 gems. One gem connected via PS SGMII(GT), another PS RGMII(MIO)
and 2 via EMIO. First two shares the same MIO lines for PHYs. PL based one
have separate EMIO lines via PL.

Also two USB 3.0 with usb hubs are present. USB phys and USB hubs should
have separate reset line. The first usb0 hub also has USB-SD controller
(usb2244) connected to port 0.

To test compatibility with k26 you can run:
fdtoverlay -o /tmp/output.dtb -i arch/arm/dts/zynqmp-sm-k26-revA.dtb \
arch/arm/dts/zynqmp-sck-kr-g-revA.dtbo

Also add support for kr260-revB board. Based on FRU it is revision B
but schematics can be label as revA03.
Changes in revB are:
- SFP light
- GEM2/3 TX_CLK fixes
- PMOD/RPI connector fixes
- Replace si5332 with oscilators

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/dac2ee1826e73b89c8cc1e430354eb43d291f675.1652870941.git.michal.simek@amd.com
2022-06-24 14:11:05 +02:00
Michal Simek
ad55d99e3c serial: Setup serial base and freq for zynq/zynqmp
Setup default values for debug console, base address and frequency.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ce93efd3ed67aa6390810ce0b79e0d00e7c36b4b.1652871485.git.michal.simek@amd.com
2022-06-24 14:11:05 +02:00
Michal Simek
254f0c766d arm64: zynqmp: Add debug messages to bl2_plat_get_bl31_params()
It is useful to get information about BL type and entry address that's why
add some debug messages.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fb023b618a009009a0b564c24223cadc10ced5b3.1652871741.git.michal.simek@amd.com
2022-06-24 14:11:05 +02:00
Ashok Reddy Soma
2eeceb4842 arm64: versal: Add support to load an app at EL1
Add support to switch to EL1 and load an EL1 app from U-Boot which is
executing at EL2 or EL3 in aarch64 mode.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220506055345.1921-1-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:11:05 +02:00
T Karthik Reddy
a110caa206 xilinx: Add CONFIG_DM_ETH_PHY config
Enable CONFIG_DM_ETH_PHY to utilize shared MDIO bus support on all xilinx
platforms.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/965981eb324d13a98aad8bd88eb8b50bc5147a7e.1652181968.git.michal.simek@amd.com
2022-06-24 14:11:05 +02:00
T Karthik Reddy
8faeb023e9 net: xilinx: axi_emaclite: Use shared MDIO bus support for axi emaclite driver
CONFIG_DM_ETH_PHY enables support to utilize generic ethernet phy
framework. Though if ethernet PHY node is in other ethernet node, it
will use shared MDIO to access the PHY of other ethernet. Move ethernet
print info statement from plat function to probe function, as phyaddr is
not enumerated when CONFIG_DM_ETH_PHY is enabled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/93e11ccca56b6e52b2dcc283d08d5042537f828f.1652181968.git.michal.simek@amd.com
2022-06-24 14:11:05 +02:00
T Karthik Reddy
935e3625ce net: xilinx: axi_emac: Use shared MDIO bus support for axi emac driver
CONFIG_DM_ETH_PHY enables support to utilize generic ethernet phy
framework. Though if ethernet PHY node is in other ethernet node, it
will use shared MDIO to access the PHY of other ethernet. Move ethernet
print info statement from plat function to probe function, as phyaddr is
not enumerated when CONFIG_DM_ETH_PHY is enabled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/ecfec78234233fefdc172c141c207b2d78ef70c5.1652181968.git.michal.simek@amd.com
2022-06-24 14:11:05 +02:00
Tom Rini
c18e5fb055 dtoc: Update test_src_scan.py for new tegra compatibles
This test was written to match up with the list of compatibles in
drivers/i2c/tegra_i2c.c so adding another one requires the test to be
updated to match.

Fixes: 0d2105ae5e ("arm: tegra: Update some DT compatibles")
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-14 13:59:23 -04:00
Tom Rini
c1d9020cc7 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-tegra
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-14 12:59:12 -04:00
Marcel Ziswiler
8f27bf114e board: apalis_t30/tk1/colibri_t20/t30: integrate mac address via dt
Use device tree to set MAC address of the Ethernet chip.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2022-06-13 15:31:15 -07:00
Peter Robinson
0d2105ae5e arm: tegra: Update some DT compatibles
Some of the DT compatibles have changed upstream so add new DT compatibles
to ensure things continue to keep working if the device trees are
updated.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2022-06-13 15:31:10 -07:00
Peter Robinson
b5cf255f73 pci: tegra: Update error prints with new lines
Add new lines to make errorr messages easier to read.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2022-06-13 15:31:00 -07:00
Peter Robinson
5b060e465e ARM: tegra: XUSB padctl: Add new lines for errors
Add new lines for error messages to make them easier to read.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2022-06-13 15:31:00 -07:00
Tom Rini
92a8bc6b41 Pull request for efi-2022-07-rc5
UEFI:
 
 * Ignore OsIndications if CONFIG_EFI_IGNORE_OSINDICATIONS=y
 * Correct UEFI default binary name
 * Let efidebug create boot options without file path
 * Support booting with a boot option with shortened device only device path
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Merge tag 'efi-2022-07-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-07-rc5

UEFI:

* Ignore OsIndications if CONFIG_EFI_IGNORE_OSINDICATIONS=y
* Correct UEFI default binary name
* Let efidebug create boot options without file path
* Support booting with a boot option with shortened device only device path
2022-06-13 09:33:37 -04:00
Heinrich Schuchardt
72fa9cd59e efi_loader: create boot options without file path
Allow the efidebug command to create boot options without file path, e.g.

    efidebug boot add -b 0001 'short dev only' host 0:1 ''
    efidebug boot add -B 0002 'long dev only' host 0:1 ''

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-06-12 13:02:34 +02:00
Heinrich Schuchardt
178667b34b efi_loader: allow booting from short dev only DP
Allow booting from a short form device-path without file path, e.g.

    /HD(1,GPT,5ef79931-a1aa-4c70-9d67-611e8f69eafd,0x800,0x1000)

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-06-12 09:17:54 +02:00
Heinrich Schuchardt
3a0654ecd0 efi_loader: correctly identify binary name
Only on the sandbox the default EFI binary name (e.g. BOOTX64.EFI) must
match the host architecture.

In all other cases we must use the target architecture.

Use #elif where appropriate.

Reported-by: Vagrant Cascadian <vagrant@reproducible-builds.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-12 09:17:54 +02:00
Sughosh Ganu
556a12654a EFI: FMP: Use a common GetImageInfo function for FIT and raw images
The GetImageInfo function definitions for the FIT images and raw
images are the same. Use a common function for the both the Firmware
Management Protocol(FMP) instances for raw and FIT images.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-12 09:17:54 +02:00
Sughosh Ganu
119fafdefb EFI: Do not consider OsIndications variable if CONFIG_EFI_IGNORE_OSINDICATIONS is enabled
The EFI_IGNORE_OSINDICATIONS config symbol was introduced as a
mechanism to have capsule updates work even on platforms where the
SetVariable runtime service was not supported. The current logic
requires the OsIndications variable to have been set to a 64 bit value
even when the EFI_IGNORE_OSINDICATIONS config is enabled. Return an
error code on not being able to read the variable only when
EFI_IGNORE_OSINDICATIONS is not enabled.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-12 09:17:54 +02:00
Tom Rini
57bd363de7 Merge https://source.denx.de/u-boot/custodians/u-boot-usb
- MediaTek XHCI bugfix, add  USB251xB/xBi driver
2022-06-08 08:25:30 -04:00
Marek Vasut
02544db9a7 misc: Port USB251xB/xBi Hi-Speed Hub Controller Driver from Linux
This patch adds a driver for configuration of the Microchip USB251xB/xBi
USB 2.0 hub controller series with USB 2.0 upstream connectivity, SMBus
configuration interface and two to four USB 2.0 downstream ports.

This is ported from Linux as of Linux kernel commit
5c2b9c61ae5d8 ("usb: usb251xb: add boost-up property support")

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
2022-06-07 16:14:20 +02:00
Tom Rini
6530de23e9 Merge https://source.denx.de/u-boot/custodians/u-boot-watchdog
- Fix SPL build with watchdog disabled in asm files (Pali)
2022-06-07 08:17:24 -04:00
Tom Rini
d9ad48464c Xilinx changes for v2022.07-rc4-v2
- Fix revision name (remove spaces)
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Merge tag 'xilinx-for-v2022.07-rc4-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2022.07-rc4-v2

- Fix revision name (remove spaces)
2022-06-07 08:17:08 -04:00
Chunfeng Yun
fe8e8af36c usb: xhci-mtk: disable all ports when disable host controller
This is used to avoid the ports status of IPPC being brought in kernel
stage, it may cause ports error especially when the xhci controller is
a component of dual-role controller.

Reported-by: Yun-Chien Yu <yun-chien.yu@mediatek.com>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2022-06-07 09:55:57 +02:00
Pali Rohár
06ceff70bf watchdog: Fix SPL build with watchdog disabled in asm files
Allow to compile assembler files in SPL build which calls WATCHDOG_RESET
function when watchdog is disabled in SPL and enabled in U-Boot proper.

This issue was fixed in past by commit 7fbd42f5af ("watchdog: Handle SPL
build with watchdog disabled") for C source files, but not for assembler
source files.

Currently the only assembler source file which calls WATCHDOG_RESET is
arch/powerpc/lib/ticks.S, so this patch affects and fixes powerpc SPL
builds.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-06-07 08:45:35 +02:00
Tom Rini
8f527342db Prepare v2022.07-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 10:25:13 -04:00
Camelia Groza
380e32b171 configs: fsl: add missing SYS_FMAN_FW_ADDR defines
Two defconfigs were missed when transitioning the SYS_FMAN_FW_ADDR
symbol to Kconfig. CONFIG_SYS_FMAN_FW_ADDR is currently initialized to
0 by default on these builds, which prevents the firmware from loading.

Add the correct symbols to these defconfigs.

Fixes: a97a071d10 ("configs: fsl: migrate FMAN/QE specific defines to Kconfig")
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
2022-06-06 10:20:09 -04:00
Patrick Delaunay
660d74278f doc: update mail author for st-dt.rst
Update author email address with the one dedicated to
upstream activities.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-06 10:20:04 -04:00
Michal Simek
93216276f5 xilinx: fru: Replace spaces with \0 in detected revision
Also fix board revision field where spaces are used instead of \0.
The same change was done for board name by commit 530560b6f8 ("xilinx:
fru: Replace spaces with \0 in detected name").

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com
2022-06-06 09:32:26 +02:00
Tom Rini
0f259fe79d Pull request for efi-2022-07-rc4-4
UEFI:
 
 * Fix the implementation of the firmware management protocol
 * Fix the unit tests for signed update capsules
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Merge tag 'efi-2022-07-rc4-4' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-07-rc4-4

UEFI:

* Fix the implementation of the firmware management protocol
* Fix the unit tests for signed update capsules
2022-06-04 09:38:56 -04:00
Vincent Stehlé
8645aefc8b efi: test/py: authenticate fit capsules
Add support for the authentication of UEFI capsules containing FIT images.

The authentication code is moved out of the function handling raw images
into a new function efi_firmware_capsule_authenticate(). The special case
for the FMP header coming from edk2 tools is preserved. There is no
functional change for capsules containing raw images.

The python test for signed capsules with raw images is renamed with no
functional change and a new test is added for signed capsules containing
FIT images.

This can be tested with sandbox64_defconfig or sandbox_flattree_defconfig,
plus CONFIG_EFI_CAPSULE_AUTHENTICATE=y.

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-06-04 08:43:55 +02:00