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2 commits

Author SHA1 Message Date
Pavel Machek
51fb455f82 socfpga: fix clock manager register definition 
Structure defining clock manager hardware was wrong, leading to
wrong registers being accessed and hang in MMC init.

This fixes structure to match hardware.

Signed-off-by: Pavel Machek <pavel@denx.de>
 2014-08-29 15:50:50 -04:00
Chin Liang See
ddfeb0aaf4 socfpga: Adding Clock Manager driver 
Clock Manager driver will be called to reconfigure all the
clocks setting based on user input. The input are passed to
Preloader through handoff files

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
 2014-04-07 10:41:50 +02:00