Commit graph

16 commits

Author SHA1 Message Date
Johan Jonker
35e9e8aebf arm: dts: rockchip: rk3288: move io-domains nodes
In order to better compare the Linux rk3288.dtsi version
with the U-Boot version move the io-domains nodes.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: John Keeping <john@metanate.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # chromebook-jerry
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21 15:16:00 +08:00
Johan Jonker
6554464951 arm: dts: rockchip: rk3288: partial sync from Linux
Partial sync of rk3288.dtsi from Linux version 5.18

Changed:
  only properties and functions that are not yet included
  swap some clocks positions
  fix some irq numbers
  style and sort nodes

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:48 +08:00
Johan Jonker
52a0c68994 arm: dts: rockchip: move all rk3288 u-boot specific properties in separate dtsi files
In order to sync rk3288.dtsi from Linux it needed to
move all u-boot specific properties in separate dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Kever Yang
68907a0a58 rockchip: rk3288-veyron: Migrate "u-boot, boot0" to "u-boot, spl-boot-order"
"u-boot,spl-boot-order" is more flexible and other rockchip SoCs
has convert to use it, migrate to use the new dts property.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-29 10:25:27 +08:00
Neil Armstrong
ffd4c7c2ec dts: switch spi-flash to jedec, spi-nor compatible
There is no reason not to use the Linux "jedec,spi-nor" binding in U-Boot
dts files. This compatible has been added in sf_probe, let use it.

This patch switches to jedec,spi-nor when spi-flash is used in the DTS
and DTSI files, and removed spi-flash when jedec,spi-nor is already
present.

The x86 dts are switched in a separate commit since it depends on a change
in fdtdec.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Evgeniy Paltsev <paltsev@synopsys.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Patrick Delaunay <Patrick.delaunay@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-04-12 10:54:27 +05:30
Simon Glass
2d0c01b8f0 sound: rockchip: Add sound support for jerry
Jerry uses a max98090 audio codec and the internal SoC I2S peripheral.
Enable sound support and add the required device-tree pieces.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:10 +01:00
Kever Yang
feb64f9d51 rockchip: dts: fix unnecessary '-cells' warning
Fix warning below:
unnecessary #address-cells/#size-cells without "ranges" or child "reg"
property

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-08-29 20:44:50 +02:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Simon Glass
aede3acc9c rockchip: Move jerry SDRAM settings into its own .dts file
The SDRAM settings are not common across all veyron models. Move the
current settings into Jerry's file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:31 -07:00
Kever Yang
612a2a0af4 dts: rk3288: remove node in dmc which not need anymore
Since we implement the dram capacity auto detect, we don't
need to set the channel number and sdram-channel in dts.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
2016-10-30 13:29:06 -06:00
Sandy Patterson
2918d96728 rockchip: rockchip, sdram-channel 0xff fix remaining dts
Add an extra byte so that this data is not byteswapped.

Signed-off-by: Sandy Patterson <apatterson@sightlogix.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-08-05 17:56:07 -06:00
Simon Glass
dae594f210 rockchip: spl: Support full-speed CPU in SPL
Add a feature which speeds up the CPU to full speed in SPL to minimise
boot time. This is only supported for certain boards (at present only
jerry).

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:37 -07:00
Simon Glass
4f14d135f9 rockchip: jerry: Fix the SDRAM timing
There is a minor error in the SDRAM timing. It does not seem to affect
anything so far. Fix it just in case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:37 -07:00
Simon Glass
f4adc9a504 rockchip: jerry: Disable pmic-int-1 setup to avoid a hang
This hangs when activated (by probing the PMIC). Disable it for now until we
understand the root cause.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
79d020ee74 rockchip: Use pwrseq for MMC start-up on jerry
This is defined in the device tree in Linux. Copy over the settings so that
this can be used instead of hard-coding the reset line.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
e2e947ff6b rockchip: Add basic support for jerry
This builds and displays an SPL message, but does not function beyond that.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-02 21:28:24 -06:00