Commit graph

7 commits

Author SHA1 Message Date
Stefan Roese
738815c0cc ppc4xx: Coding style cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-02 11:44:46 +02:00
Grzegorz Bernacki
2db6478406 Program EPLD to force full duplex mode for PHY.
EPLD forces modes of PHY operation. By default full duplex is turned off.
This fix turns it on.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-10-02 11:30:37 +02:00
Stefan Roese
2a49fc17d0 ppc4xx: AMCC Luan uses the new boardspecific DDR2 controller setup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16 10:01:38 +02:00
Stefan Roese
466fff1a7b ppc4xx: Add pci_pre_init() for 405 boards
This patch removes the CFG_PCI_PRE_INIT option completely, since
it's not needed anymore with the patch from Matthias Fuchs with
the "weak" pci_pre_init() implementation.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-25 15:57:39 +02:00
Stefan Roese
00cdb4ce5e [PATCH] Update AMCC Luan 440SP eval board support
The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.

This patch also enables the cache in FLASH for the startup
phase of U-Boot (while running from FLASH). After relocating to
SDRAM the cache is disabled again. This will speed up the boot
process, especially the SDRAM setup, since there are some loops
for memory testing (auto calibration).

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-08 10:13:16 +01:00
Wolfgang Denk
d87080b721 GCC-4.x fixes: clean up global data pointer initialization for all boards. 2006-03-31 18:32:53 +02:00
Stefan Roese
6e7fb6eaa5 Add support for AMCC 440SP, add support for AMCC Luan 440SP eval board.
Patch by John Otken, 23 Nov 2005
2005-11-29 18:18:21 +01:00