Commit graph

34452 commits

Author SHA1 Message Date
Shengzhou Liu
a07bdad749 fsl/errata: move fsl_errata.h to common directory
move arch/powerpc/include/asm/fsl_errata.h to include/fsl_errata.h
to make it public for both ARM and POWER SoCs.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
[York Sun: fix soc.h path in fsl_errata.h]
Reviewed-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:28 -08:00
Shengzhou Liu
0c028a0328 arm: ls102x: add get_svr and IS_SVR_REV helper
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:28 -08:00
Shaohui Xie
1aaf3f9ae4 freescale: fman: make sure phy-handle property is big endian
When creating phy-handle property, an unsigned int value is created by
fdt_create_phandle, and memcpy is used to get the value, since DTS is
big endian, the value cannot be used directly on little endian SoCs,
it should be converted by cpu_to_fdt32.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:28 -08:00
York Sun
3901978d42 armv8/ls2080ardb: Update DDR settings for four chip-select case
When 4 chip-selects are used, vref should use range 1 and CDT uses 80 ohm,
and 2T timing is enabled.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:28 -08:00
York Sun
c4243ac9e2 armv8/ls2080aqds: Update DDR settings for four chip-select case
When 4 chip-selects are used, vref should use range 1 and CDT uses 80 ohm,
and 2T timing is enabled.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:28 -08:00
York Sun
6c6e006a20 driver/ddr/fsl: Update timing config for heavy load
In case four chip-selects are all active, the turnaround times need to
increase to avoid overlapping under heavy load.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:27 -08:00
York Sun
7cc079989d driver/ddr/fsl: Update workaround for A008511 for vref range
The workaround requires different setting for range 1 vs 2.
Also adjust timeout value for waiting for controller to be idle.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:27 -08:00
York Sun
8a51429e00 driver/ddr/fsl: Update MR5 RTT park
For four chip-selects enabled case, RTT is parked on all of them.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:27 -08:00
York Sun
0fb7197436 driver/ddr/fsl: Update DDR4 MR6 for Vref range
MR6 bit 6 is set accrodingly for range 1 or 2, per JEDEC spec.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:27 -08:00
York Sun
19601dd99c driver/ddr/fsl: Update DDR4 RTT values
DDR4 has different RTT value and code according to JEDEC spec. Update
the macros and options .

Signed-off-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:27 -08:00
Stephen Warren
653447b407 part: fix "part list ... -bootable varname" to use hex
Unfortunately U-Boot assumes that almost all numbers are in hex, including
partition numbers passed to e.g. "load". So, the command "part list mmc 0
-bootable devplist" should use hex when writing partition numbers into
$devplist, so they'll be correctly interpreted.

Change-Id: I9a70b19749643876baadb45efbc3decaef8bfee2
Fixes: 0798d6fd41 ("part: Add support for list filtering on bootable partitions")
Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
2015-12-13 20:22:01 -05:00
Peter Robinson
69bf2d2faf tools: env: include compiler.h
With gcc 5.2 and later we get a bunch of "error: unknown type name" for
'uint8_t', 'uint32_t' and friends.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2015-12-13 20:22:00 -05:00
angelo@sysam.it
6463fd8f95 m68k: add private libgcc
Add private libgcc

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2015-12-13 20:22:00 -05:00
Sjoerd Simons
f4a8a1757b rockchip: firefly: Use tiny-printf
Switch to using tiny-printf for the firefly SPL, this reduces the SPL by
around 1800 bytes bringing it back under the 32k limit for both gcc 4.9
and gcc 5.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
2015-12-13 17:07:31 -07:00
Sjoerd Simons
fc011f6402 mmc: mmc: Don't use sprintf when using tiny-printf
There is no sprintf implementation in tiny-printf, so don't try to use
it when tiny-printf if used.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
2015-12-13 17:07:31 -07:00
Sjoerd Simons
e4c5383e4d lib: split out strtoxxxx functions out of vsprintf.c
To allow the various string to number conversion functions to be used
when using tiny-printf,split them out into their own file which gets
build regardless of what printf implementation is used.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
2015-12-13 17:07:30 -07:00
Sjoerd Simons
2b22a99c65 lib: Split panic functions out of vsprintf.c
To allow panic and panic_str to still be used when using tiny-printf,
split them out into their own file which gets build regardless of what
printf implementation is used.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
2015-12-13 17:07:30 -07:00
Sjoerd Simons
962a43cc96 lib/tiny-printf.c: Implement vprintf
Implement both printf and vprintf for a bit more flexibility, e.g.
allows the panic() function to work with tiny-printf.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
2015-12-13 17:07:30 -07:00
Sjoerd Simons
4363de63a8 spl: use panic_str instead of panic
For a simple static string, use panic_str() which prevents calling
printf needlessly.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-12-13 17:07:30 -07:00
Jeffy Chen
717f8845ac rockchip: doc: add imagename
We now using imagename to select rockchip's spl hdr & spl size.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-12-13 17:07:30 -07:00
Jeffy Chen
7bf274b9ca rockchip: mkimage: use imagename to select spl hdr & spl size
Our chips may have different spl size and spl header, so
use imagename(passed by "mkimage -n") to select them now.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-12-13 17:07:29 -07:00
Jeffy Chen
5cc5b901e6 Revert "rockchip: Add max spl size & spl header configs"
This reverts commit 10b4615f9d7e177ec7fe644fbb2616e0e0956f6e

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-12-13 17:07:06 -07:00
Nishanth Menon
8405b8d98a common: cli_hush: Fix up simple typo
Correct the spelling for character..

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-12-12 15:56:10 -05:00
Egli, Samuel
9d5108d8be siemens,am33x: remove ddr3 delay workaround
Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
2015-12-12 15:56:10 -05:00
Egli, Samuel
69b918b65d am33xx,ddr3: fix ddr3 sdram configuration
This patch fixes the DDR3 initialization procedure in
order to comply with DDR3 standard. A 500 us delay is specified
between the DDR3 reset and clock enable signal. Until now,
this delay was not respected. Some DDR3 chips don't bother
but the bigger the RAM becomes the more likely it seems that
this delay is needed. We observed that DRAM > 256 MB from
the manufacturer Samsung have an issue when the specification
is not respected.

Changes:

1) Add a 1 ms wait for L3 timeout error trigger

2) Don't delay DDR3 initialization
Bit 31 of emif_sdram_ref_ctrl shouldn't be set because his
suppresses the initialization of DDR3

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Reviewed-by: James Doublesin <doublesin@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
2015-12-12 15:56:09 -05:00
Miao Yan
b3b522f247 VxWorks: fixup MAC address for VxWorks
VxWorks 7 kernels retrieve 'local-mac-addr' from dtb and use
that for NIC MAC address. As a result, when booting the same
kernel image on multiple boards, there will be address
conflicts.

So fixup MAC address when booting VxWorks 7 kernels

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-12-12 15:56:08 -05:00
Kamil Lulko
665624149a stm32: Convert serial driver to DM
Signed-off-by: Kamil Lulko <kamil.lulko@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-12-12 15:56:08 -05:00
Tom Rini
5076c64a08 Merge branch 'master' of git://git.denx.de/u-boot-spi 2015-12-11 15:07:44 -05:00
Michal Simek
76de51a6da spi: xilinx: Add new compatible strings
Add xlnx,xps-spi-2.00.a/b which is compatible string
listed in the Linux kernel.
Remove origin one which has no real background.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:24 +05:30
Jagan Teki
fe94b48de2 mailmap: Update Jagan Teki's name and email address
Used quite different name's and e-mail address, all of
them mapped to standard name and e-mail address.

Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:24 +05:30
Jagan Teki
cba65a77c4 sf: Rename sf_ops.c to spi-flash.c
Since all spi-flash core operations are moved into
sf_ops.c then it's better to renamed as spi-flash.c

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:24 +05:30
Jagan Teki
339fd6dca5 sf: Use static for file-scope functions
Used static for file-scope functions in sf_probe.c

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:24 +05:30
Jagan Teki
bfdb07eb4b sf: sf_probe: Remove spi_slave pointer argument
Since spi_slave is a spi pointer in spi_flash{} then assign
spi_slave{} pointer to flash->spi and remove spi_slave
pointer argument to
- spi_flash_probe_slave
- spi_flash_scan

Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:24 +05:30
Jagan Teki
b6a2c436e0 sf: ops: Fix missing break on spansion read_bar
For assigning read_bar commands in spansion case, break
is missing this patch add that break.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:24 +05:30
Jagan Teki
aae00f8bab sf: Remove unneeded SST_BP and SST_WP
SST parts added on sf_params.c supports both SST_WR which consits
of both BP and WP and there is a spi controller ich which supports
only BP so the relevent _write hook set based on "slave->op_mode_tx"
hence there is no respective change required from flash side hance
removed these.

Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:24 +05:30
Jagan Teki
615879ac1a sf: Remove unneeded header includes
Removed unneeded header includes in sf_ops and sf_probe

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:24 +05:30
Jagan Teki
6f9d670d8e sf: Flash power up read-only based on idcode0
Using macro's for flash power up read-only access code
leads wrong behaviour hence use idcode0 for runtime
detection, hence the flash which require this functionality
gets detected at runtime.

Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:24 +05:30
Jagan Teki
cb37518516 sf: Use simple name for register access functions
Most of the register access function are static,
so used simple name to represent each.

Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:23 +05:30
Jagan Teki
fc335d63b0 sf: Fix Makefile
This patch removes unneeded ifdef and fixed accordingly.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:23 +05:30
Jagan Teki
6fa40e796c sf: Use static for file-scope functions
Use static for file-scope functions and removed
them from header files.

Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:23 +05:30
Jagan Teki
0edae52f08 sf: probe: Code cleanup
- Move bar read code below the bar write hance both
  at once place, hence it easy for #ifdef macro only
  once and readable.
- Move read_cmd_array at top

Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:23 +05:30
Jagan Teki
1e90d9fd31 sf: Move read_id code to sf_ops
read_id code is related to spi_flash stuff
hence moved to sf_ops.

Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:23 +05:30
Jagan Teki
3847c0c180 sf: Move spi_flash_scan code to sf_ops
Intension is that sf_ops should deals all spi_flash
related stuff and sf_probe (which should renamed future)
should be an interface layer for spi_flash versus spi drivers.

sf_ops => spi_flash interface
sf_probe => interface layer vs spi_flash(sf_probe) to spi drivers

Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:23 +05:30
Jagan Teki
3a1adb621b sf: spi_flash_validate_params => spi_flash_scan
Rename spi_flash_validate_params to spi_flash_scan
as this code not only deals with params setup but
also configure all spi_flash attributes.

And also moved all flash related code into
spi_flash_scan for future functionality addition.

Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:23 +05:30
Michal Simek
8e4920e53e spi: Kconfig: Fix correct target name for ZynqMP
ZynqMP is using different symbol.
Use correct one.

Reviewed-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-12-11 22:12:23 +05:30
Michal Simek
23ef5aea84 spi: zynq_spi: Add cadence compatible string
Extend compatible list table for cdns,spi-r1p6 compatible string.

Reviewed-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-12-11 22:12:23 +05:30
Peng Fan
53cc647dc6 imx: mx7dsabresd: Add QSPI support
Support qspi flashes for mx7dsabresd
1. introduce pin mux settings
2. enable qspi clock
3. introduce related macro definitions

Default QSPI is not enabled, since we need hardware rework to use QSPI,
see SPF-28590, page 9:
"
QSPI signals are muxed with EPDC_D[7:0]
When using QSPI: de-populate R388-R391, R396-R399
populate R392-R395, R299, R300
"

After hardware rework, define CONFIG_FSL_QSPI in mx7dsabresd.h. qspi
flashes can be deteced and read/erase/write. Log info:
"
=> sf probe
SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB
=> sf read 0x80000000 0 0x4000000
device 0 whole chip
SF: 67108864 bytes @ 0x0 Read: OK
=> sf erase 0 0x4000000
SF: 67108864 bytes @ 0x0 Erased: OK
=> sf write 0x80000000 0 0x4000000
device 0 whole chip
SF: 67108864 bytes @ 0x0 Written: OK
"

Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Adrian Alonso <aalonso@freescale.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-12-11 22:12:23 +05:30
Jagan Teki
cd337da21e spi: ti_qspi: Fix SPI_3WIRE checking using mode
SPI_3WIRE is spi mode not spi flags, so this patch fixed
the spi-3wire checking throgh mode instead of flags.

Cc: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:23 +05:30
Jagan Teki
379b49d82e spi: Get spi-3wire from dts
spi-3wire is used when SI/SO signals shared so get
the same from dts node and assign to mode on slave
plat->mode.

Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:23 +05:30
Tom Rini
f7a5f025ba Merge git://git.denx.de/u-boot-dm 2015-12-11 10:29:28 -05:00