Commit graph

557 commits

Author SHA1 Message Date
Faiz Abbas
cf00825596 spl: mmc: Fix spl_mmc_get_uboot_raw_sector() implementation
The call to spl_mmc_get_uboot_raw_sector() completely ignores and
overwrites the raw_sect value passed from the caller of spl_mmc_load().

Fix this by passing raw_sect to the function and returning the same
value in the default case.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09 08:33:16 +08:00
Tom Rini
0b23b0d9f9 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- Libre Computer ALL-H3-IT/ALL-H5-CC board (Chen-Yu Tsai)
- Allwinner R40 Ethernet, usb phy enablement (Andre Przywara)
- Sunxi auto load from 128KB MMC offset (Andre Przywara)
- Orange Pi Win Ethernet phy enablement (Jernej Skrabec)
2020-01-26 12:05:11 -05:00
Andre Przywara
671d64fe35 sunxi: move CONFIG_SYS_SPI_U_BOOT_OFFS out of defconfig
For Allwinner SoCs the CONFIG_SYS_SPI_U_BOOT_OFFS value is not really a
board choice: The boot ROM only loads the SPL from offset 0 of the SPI
NOR flash, and loads at most 32KB. This is a similar situation as on MMC,
so consequently we create our "joint" image (SPL + U-Boot proper) with
that 32KB offset during the build.

So define the value of this symbol to be 32KB by default for every
Allwinner SoC. This removes the definition of this symbol from the
_defconfig files, and avoids every board to define this over and over
again.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-24 23:06:56 +05:30
Simon Glass
29a4a9f105 common: Move hang() to the same header as panic()
At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Migrate a few more files]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-24 23:06:49 +05:30
Simon Glass
e7f0ec09a0 image: Rename load_addr, save_addr, save_size
These global variables are quite short and generic. In fact the same name
is more often used locally for struct members and function arguments.

Add a image_ prefix to make them easier to distinguish.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-24 23:06:49 +05:30
Klaus H. Sorensen
602ce1d106 spl_fit.c: enable loading compressed u-boot from fit image
Allow reading compressed content from fit image, even if
CONFIG_SPL_OS_BOOT is not set.

This allow booting compressed 2nd stage u-boot from fit image.

Additionally, do not print warning message if compression node is not
found, since it simply implies the content is uncompressed.

Signed-off-by: Klaus H. Sorensen <khso@prevas.dk>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-01-22 17:47:57 -05:00
Simon Glass
db41d65a97 common: Move hang() to the same header as panic()
At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Migrate a few more files]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-17 17:53:40 -05:00
Simon Glass
bb872dd930 image: Rename load_addr, save_addr, save_size
These global variables are quite short and generic. In fact the same name
is more often used locally for struct members and function arguments.

Add a image_ prefix to make them easier to distinguish.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 14:02:35 -05:00
Tom Rini
994bb86fc9 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Clearfog: Fix SD booting (Baruch)
- Misc updates to MMC handling in SPL to support booting from
  main data partition (vs hardware boot partition) on MVEBU (Baruch)
2020-01-16 12:52:07 -05:00
Tom Rini
92329e2413 Xilinx/FPGA changes for v2020.04
ARM64:
 - Add INIT_SPL_RELATIVE dependency
 
 SPL:
 - FIT image fix
 - Enable customization of bl2_plat_get_bl31_params()
 
 Pytest:
 - Add test for octal/hex conversions
 
 Microblaze:
 - Fix manual relocation for one SPI instance
 
 Nand:
 - Convert zynq/zynqmp drivers to DM
 
 Xilinx:
 - Enable boot script location via Kconfig
 - Support OF_SEPARATE in board FDT selection
 - Remove low level uart setup it is done later by code
 - Add support for DEVICE_TREE variable passing for SPL
 
 Zynq:
 - Enable jtag boot mode via distro boot
 - Removing unused baseaddresses from hardware.h
 - DT fixups
 
 ZynqMP:
 - Fix emmc boot sequence
 - Simplify spl logic around bss and board_init_r()
 - Support psu_post_config_data() calling
 - Tune mini-nand DTS
 - Fix psu wiring for a2197 boards
 - Add runtime MMC device boot order filling in spl
 - Clear ATF handoff handling with custom bl2_plat_get_bl31_params()
 - Add support u-boot.its generation
 - Use single image configuration for all platforms
 - Enable PANIC_HANG via Kconfig
 - DT fixups
 - Firmware fixes
 - Add support for zcu208 and zcu1285
 
 Versal:
 - Fix emmc boot sequence
 - Enable board_late_init() by default
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Merge tag 'xilinx-for-v2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx/FPGA changes for v2020.04

ARM64:
- Add INIT_SPL_RELATIVE dependency

SPL:
- FIT image fix
- Enable customization of bl2_plat_get_bl31_params()

Pytest:
- Add test for octal/hex conversions

Microblaze:
- Fix manual relocation for one SPI instance

Nand:
- Convert zynq/zynqmp drivers to DM

Xilinx:
- Enable boot script location via Kconfig
- Support OF_SEPARATE in board FDT selection
- Remove low level uart setup it is done later by code
- Add support for DEVICE_TREE variable passing for SPL

Zynq:
- Enable jtag boot mode via distro boot
- Removing unused baseaddresses from hardware.h
- DT fixups

ZynqMP:
- Fix emmc boot sequence
- Simplify spl logic around bss and board_init_r()
- Support psu_post_config_data() calling
- Tune mini-nand DTS
- Fix psu wiring for a2197 boards
- Add runtime MMC device boot order filling in spl
- Clear ATF handoff handling with custom bl2_plat_get_bl31_params()
- Add support u-boot.its generation
- Use single image configuration for all platforms
- Enable PANIC_HANG via Kconfig
- DT fixups
- Firmware fixes
- Add support for zcu208 and zcu1285

Versal:
- Fix emmc boot sequence
- Enable board_late_init() by default
2020-01-16 09:45:40 -05:00
Baruch Siach
e42afd8416 spl: mmc: support uboot image offset on main partition
On Armada 38x platforms the ROM code loads SPL from offset 0 of eMMC
hardware boot partitions. When there are no boot partitions (i.e. SD
card) the ROM skips the first sector that usually contains the (logical)
partition table. Since the generated .kwb image contains the main U-Boot
image in a fixed location (0x140 sectors by default), we end up with the
main U-Boot image in offset of 1 sector. The current workaround is to
manually set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x141 to
compensate for that.

This patch uses the run-time detected boot partition to determine the
right offset of the main U-Boot partition. The generated .kwb image is
now compatible with both eMMC boot partition, and SD card main data
partition.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2020-01-16 10:58:52 +01:00
Vignesh Raghavendra
74326a320a Kconfig: Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMA
Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMA. This allows to use
macros such as CONFIG_IS_ENABLED() that allow conditional compilation of
code for SPL and U-Boot.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-15 19:50:27 -05:00
Giulio Benetti
1054344fa4 spl: fix entry_point equal to load_addr
At the moment entry_point is set to image_get_load(header) that sets it
to "load address" instead of "entry point", assuming entry_point is
equal to load_addr, but it's not true. Then load_addr is set to
"entry_point - header_size", but this is wrong too since load_addr is
not an entry point.

So use image_get_ep() for entry_point assignment and image_get_load()
for load_addr assignment.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:53:59 +01:00
Michal Simek
5c03c990d1 spl: atf: Enable option to rewrite bl2_plat_get_bl31_params()
Xilinx ZynqMP platform is passing information to ATF in private format and
ATF bl31 parameters are not used. That's why enable option to rewrite this
function by platform specific implementation.

The patch also move and update kernel-doc format with missing parameters.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:54 +01:00
Michal Simek
935568eecc spl: atf: Add missing ndepth initialization
ndepth needs to be initialized before it is used in fdt_next_node().
Uninitialized value is causing that node is found and depth increase but
won't pass condition below because initial state wasn't setup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:53 +01:00
Tom Rini
ce022f2857 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2020-01-08 15:23:49 -05:00
Jean-Jacques Hiblot
152781d464 spl: fit: Allow the board to tell if more images must be loaded from FIT
spl_fit_get_image_name() is used to get the names of the images that the
SPL must load from the FIT. It relies on the content of a property present
in the FIT. The list of images is thus statically defined in the FIT.
With this scheme, it quickly becomes hard to manage combinations of more
than a handful of images.
To address this problem, give the board driver code the opportunity to
add to the list of images. The images from the FIT property are loaded
first, and then the board_get_fit_loadable() is called to get more image
names.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07 11:13:25 -05:00
Jean-Jacques Hiblot
c1648d056e spl: fit: constify the output parameter of spl_fit_get_image_name()
There is no need for it to be non-constant. Making it constant, allows to
return constant string without warning.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07 11:12:47 -05:00
Jean-Jacques Hiblot
19141d6983 spl: fit: be more verbose when an error occurs when applying the overlays
There are many ways the overlay application can fail.
2 of them are probably the most common:
- the application itself failed. Usually this is comes from an unresolved
  reference
- DTBO not available in FIT (could be because of a typo)

In both case it is good to be more explicit about the error and at least
show which overlay is failing.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07 11:12:47 -05:00
Jean-Jacques Hiblot
24bf44cf88 spl: fit: Do not fail immediately if an overlay is not available
If one overlay that must be applied cannot be found in the FIT, the current
implementation stops applying the overlays. Let's make it skip only the
failing overlay instead.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07 11:12:47 -05:00
Jean-Jacques Hiblot
ea376ebc9b spl: fit: allocate a temporary buffer to load the overlays
If the node describing an overlay does not specify a load address, it will
be loaded at the address previously used.
Fixing it by allocating a temporary buffer that will be used as a
default load address. By default, the size of the buffer is 64kB which
should be plenty for most use cases.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07 11:12:47 -05:00
Jean-Jacques Hiblot
99329be2c5 spl: fit: Make room in the FDT before applying overlays
Make room in the FDT before applying the overlay, otherwise it may fail if
the overlay is big. As the exact added size is not known in advance, just
add the size of the overlay.
Move after the end of the application of the overlays, the resize  of the
FDT for the injection of the details on the loadables.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07 11:12:47 -05:00
Michal Simek
9d13b87254 spl: fit: Add support for applying DT overlay
doc/uImage.FIT/overlay-fdt-boot.txt is describing how to create FIT
image with DT overlays in it.
Add support for this feature to SPL.

Here is the ZynqMP fragment where dtb points to full DT and dtbo is
overlay which should be applied on the top of dtb.
config {
        description = "ATF with full u-boot overlay";
        firmware = "atf";
        loadables = "uboot";
        fdt = "dtb", "dtbo";
};

The whole feature depends on OF_LIBFDT_OVERLAY which is adding +4kB code
and 0 for platforms which are not enabling this feature.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07 11:12:47 -05:00
Jean-Jacques Hiblot
6b8b98d54d spl: fit: don't load the firmware twice
When u-boot.img is a FIT image generated automatically by mkimage, the
configuration node has the following structure:
conf-1 {
   description = "k3-am654-base-board";
   firmware = "firmware-1";
   loadables = "firmware-1";
   fdt = "fdt-1";
};

The firmware is referenced twice. Once by the 'firmware' property and
once by the 'loadables' property. Currently this result in the firmware
being loaded twice. This is not a big problem but has an impact on the
boot time.
Fixing it by not loading a loadable image if it is also the firmware image.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andreas Dannenberg <dannenberg@ti.com>
2020-01-07 11:12:47 -05:00
Ley Foon Tan
5c9c71b660 spl: Allow cache drivers to be used in SPL
Add an option for building cache drivers in SPL.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Alison Wang
5d168adf2b configs: Enable SPL_FSL_PBL for some LayerScape platforms
In commit <db4080d56dec>, SPL_FSL_PBL is removed from the configs of
some LayerScape platforms. Actually, SPL_FSL_PBL is needed for SD/NAND
boot on LS1021A/LS1043A/LS1046A to create boot binary having SPL binary
in PBI format concatenated with u-boot binary. SPL_FRAMEWORK is used on
these platforms too.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-12-26 16:00:20 +05:30
Simon Glass
e82c624d7c spl: Add methods to find the position/size of next phase
Binman supports writing the position and size of U-Boot proper and SPL
into the previous phase of U-Boot. This allows the next phase to be easily
located and loaded.

Add functions to return these useful values, along with symbols to allow
TPL to load SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:28 +08:00
Lukas Auer
0e1233ce90 spl: opensbi: wait for ack from secondary harts before entering OpenSBI
At the start, OpenSBI relocates itself to its link address. If the link
address ranges of U-Boot SPL and OpenSBI overlap, the relocation can
lead to code corruption if a hart is still running U-Boot SPL during
relocation. To avoid this problem, the main hart is specified as the
preferred boot hart to perform the relocation. This fixes the code
corruption problems based on the assumption that since the main hart
schedules the secondary harts to enter OpenSBI, it will be the last to
enter OpenSBI. However it was reported that this assumption is not
always correct.

To make sure the assumption always holds true, wait for all secondary
harts to acknowledge the call-function request before entering OpenSBI
on the main hart.

Reported-by: Rick Chen <rick@andestech.com>
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-12-10 08:23:10 +08:00
Lukas Auer
90ae281437 riscv: add option to wait for ack from secondary harts in smp functions
Add a wait option to smp_call_function() to wait for the secondary harts
to acknowledge the call-function request. The request is considered to
be acknowledged once each secondary hart has cleared the corresponding
IPI.

As part of the call-function request, the secondary harts invalidate the
instruction cache after clearing the IPI. This adds a delay between
acknowledgment (clear IPI) and fulfillment (call function) of the
request. We want to use the acknowledgment to be able to judge when the
request has been completed. Remove the delay by clearing the IPI after
cache invalidation and just before calling the function from the
request.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-12-10 08:23:10 +08:00
Lukas Auer
b86f6d1e64 spl: opensbi: specify main hart as preferred boot hart
OpenSBI uses a relocation lottery to determine the hart to relocate
OpenSBI to its link address. In the U-Boot SPL boot flow, the main hart
schedules the secondary harts to enter OpenSBI before doing so itself.
One of the secondary harts will therefore always be the winner of the
relocation lottery. This is problematic if the link address ranges of
OpenSBI and U-Boot SPL overlap. OpenSBI will be relocated and therefore
overwrite U-Boot SPL while some harts may still run it, leading to code
corruption.

Avoid this problem by specifying the main hart as the preferred boot
hart to perform the OpenSBI relocation. The main hart will be the last
hart to enter OpenSBI, relocation can therefore occur safely.

The boot hart field was added to version 2 of the OpenSBI FW_DYNAMIC
info structure. The header file include/opensbi.h is synchronized with
include/sbi/fw_dynamic.h from the OpenSBI project to update the info
structure. The header file is recent as of commit
7a13beb21326 ("firmware: Add preferred boot HART field in struct
fw_dynamic_info").

Reported-by: Rick Chen <rick@andestech.com>
Suggested-by: Anup Patel <Anup.Patel@wdc.com>
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-12-10 08:23:10 +08:00
Rick Chen
31dae22faa spl: cache: Allow cache drivers in SPL
When ax25-ae350 try to enable v5l2 cache
driver in SPL configuration, it need this
option for cache support in SPL.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
2019-12-10 08:23:10 +08:00
Tom Rini
edbb8e0918 Revert "spl: fix entry_point equal to load_addr"
Due to the (seemingly bogus) assumption of a default
CONFIG_SYS_UBOOT_START value we will revert this change for now and
evaluate it again for the next release along with changes to
CONFIG_SYS_UBOOT_START.

This reverts commit d3e97b53c1.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-06 09:56:03 -05:00
Giulio Benetti
d3e97b53c1 spl: fix entry_point equal to load_addr
At the moment entry_point is set to image_get_load(header) that sets it
to "load address" instead of "entry point", assuming entry_point is
equal to load_addr, but it's not true. Then load_addr is set to
"entry_point - header_size", but this is wrong too since load_addr is
not an entry point.

So use image_get_ep() for entry_point assignment and image_get_load()
for load_addr assignment.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2019-12-05 10:28:39 -05:00
Lukasz Majewski
d4d65e1125 spl: Introduce SPL_DM_GPIO Kconfig define
This define indicates if DM_GPIO shall be supported in SPL. This allows
proper operation of DM converted GPIO drivers in SPL, which use
boards.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-12-05 10:28:38 -05:00
Lokesh Vutla
095764e369 spl: ymodem: Fix loading of fit image
spl ymodem driver always assumes that 1 BUF_SIZE is read in one stream.
This might not be true when image is not padded to BUF_SIZE and the last
sector that gets loaded will be < BUF_SIZE. Drop this assumption and use
the actual size that is loaded.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-12-03 08:44:14 -05:00
Thomas Hebb
32f2ca2a7e cosmetic: Fix spelling and whitespace errors
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2019-12-03 08:43:23 -05:00
Simon Glass
c30b7adbca common: Move interrupt functions into a new header
These functions do not use driver model but are fairly widely used in
U-Boot. But it is not clear that they will use driver model anytime soon,
so we don't want to label them as 'legacy'.

Move them to a new irq_func.h header file. Avoid the name 'irq.h' since it
is widely used in U-Boot already.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:25:00 -05:00
Simon Glass
1eb69ae498 common: Move ARM cache operations out of common.h
These functions are CPU-related and do not use driver model. Move them to
cpu_func.h

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:24:58 -05:00
Simon Glass
9edefc2776 common: Move some cache and MMU functions out of common.h
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.

Move them over.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:55 -05:00
Simon Glass
b03e0510d7 common: Move serial functions out of common.h
These functions belong in serial.h so move them over.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:11 -05:00
Simon Glass
c660444159 spl: bootcount: Move code out of header file
It is not good practice to write code in a header file. If it is included
multiple times then the code can cause duplicate functions.

Move the bootcount_store() and bootcount_load() functions into SPL.

Note: bootcount is a bit strange in that it uses driver model but does not
define proper drivers. This should be fixed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:08 -05:00
Simon Glass
3db7110857 crc32: Use the crc.h header for crc functions
Drop inclusion of crc.h in common.h and use the correct header directly
instead.

With this we can drop the conflicting definition in fw_env.h and rely on
the crc.h header, which is already included.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:08 -05:00
Heiko Stuebner
22b7b86005 spl: separate SPL_FRAMEWORK config for spl and tpl
Right now enabling SPL_FRAMEWORK will also enable it for the TPL in all
cases, making the TPL bigger. There may be cases where the TPL is really
size constrained due to its underlying ram size.

Therefore introduce a new TPL_FRAMEWORK option and make the relevant
conditionals check for both. The default is set to "y if SPL_FRAMEWORK"
to mimic the previous behaviour where the TPL would always get the
SPL framework if it was enabled in SPL.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17 17:22:53 +08:00
Tom Rini
086e391bc4 Merge tag 'u-boot-rockchip-20191110' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Add support for rockchip pmic rk805,rk809, rk816, rk817
- Add rk3399 board Leez support
- Fix bug in rk3328 ram driver
- Adapt SPL to support ATF bl31 with entry at 0x40000
- Fix the u8 type comparision with '-1'.
- Fix checkpatch warning for multi blank line and review signature.
2019-11-11 14:19:32 -05:00
Joseph Chen
474197812d common: spl: atf: support booting bl32 image
Trusted-Firmware can also initialize a secure payload to use as a trusted
execution environment. In general for the arm64 case this is provided as
separate image and uboot is supposed to also place it in a predetermined
location in memory and add the necessary parameters to the ATF boot params.

So add the possibility to get this tee payload from the provided FIT image
and setup things as necessary.

Tested on a Rockchip PX30 with mainline TF-A, mainline OP-Tee (with pending
PX30 support) and mainline 5.4-rc1 Linux kernel.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10 20:40:20 +08:00
Simon Goldschmidt
d024e992b3 spl: fix SPI config dependencies
As SPL_SPI_FLASH_SUPPORT cannot work without SPL_SPI_SUPPORT, fix
dependencies to prevent enabling SPI flash support without basic SPI
support.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-11-07 18:01:13 -05:00
Tom Rini
73b6e6ad25 u-boot-imx-20191104
-------------------
 
 - i.MX NAND: nandbcb support for MX6UL / i.MX7
 - i.MX8: support for HAB
 - Convert to DM (opos6ul, mccmon6)
 - Toradex i.MX6ull colibri
 - sync DTS with kernel
 
 Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/606853416
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Merge tag 'u-boot-imx-20191104' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20191104
-------------------

- i.MX NAND: nandbcb support for MX6UL / i.MX7
- i.MX8: support for HAB
- Convert to DM (opos6ul, mccmon6)
- Toradex i.MX6ull colibri
- sync DTS with kernel

Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/606853416
2019-11-04 12:57:41 -05:00
Lukasz Majewski
a4a16c9181 spl: nor: Provide falcon boot support for NOR memories
This commit adds falcon boot support (by also copying args necessary for
booting) to the SPL NOR memory driver.

After this change it is possible to use the falcon boot in the same way
as on NAND memories. The necessary configs (i.e. CONFIG_CMD_SPL_NOR_OFS)
are now defined in Kconfig.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-11-03 17:04:16 +01:00
Simon Glass
c52b5e8e2c spl: Add a size check for TPL
We have the ability to enforce a maximum size for SPL but not yet for TPL.
Add a new option for this.

Document the size check macro while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-03 07:20:27 +08:00
Tom Rini
bb1bb4bb5d Fix for patman with email addresses containing commas
Bootstage improvements for TPL, SPL
 Various sandbox and dm improvements and fixes
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Merge tag 'dm-pull-29oct19' of git://git.denx.de/u-boot-dm

- Fix for patman with email addresses containing commas
- Bootstage improvements for TPL, SPL
- Various sandbox and dm improvements and fixes
2019-11-01 09:34:35 -04:00