Commit graph

4 commits

Author SHA1 Message Date
Nishanth Menon
4361220dae ARM: K2G: DDR3: Fix up priv ID for MPU
For ECC enabled DDR, we use EDMA to reset all memory values to 0. For
K2E/L/H/K the priv ID of 8 was indicative of ARM, but that is not the
case for K2G, where it is 1.

Unfortunately, ddr3 code had hard coded the privID and had missed
identification previously. Fix the same, else unforeseen behavior can
be expected in our reset of DDR contents to 0 for ECC enablement.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-03 13:21:10 -05:00
Lokesh Vutla
e1ae357d4b board: k2g: Enable ECC byte lane
Enable ECC byte lane for k2g-evm

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-01 20:05:07 -04:00
Vitaly Andrianov
235dd6e8d1 ARM: k2g: Add ddr3 info
Add ddr3 related info

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-10-22 14:22:18 -04:00
Masahiro Yamada
39a723452f ARM: keystone: move SoC sources to mach-keystone
Move
arch/arm/cpu/armv7/keystone/* -> arch/arm/mach-keystone/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
2015-02-21 08:23:52 -05:00
Renamed from arch/arm/cpu/armv7/keystone/ddr3.c (Browse further)