Commit graph

4 commits

Author SHA1 Message Date
Christophe Leroy
4b6a5388da board: cssi: Refactor EEPROM read
On cmpc885 board, the ethernet addresses are stored in an
EEPROM that is accessed through SPI.

A 3 bytes command is sent to the chip then the content
gets read. At the time being a single block access is
performed, ignoring the first 3 bytes read.

Reword the SPI transfer to first send 3 bytes then
receive the content of the EEPROM so that there don't be
3 dummy bytes at the beginning of the buffer.

And move the function into common.c so that it can be
reused by the board that will be added in a future patch.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-04-28 17:52:23 +02:00
Christophe Leroy
3155b0af4e board: cssi: Create dedicated file for common sources
In preparation of the new cssi board called cmpcpro which
we be introduce in a future patch, move common
functions into a dedicated file in a common directory.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-04-28 17:52:23 +02:00
Christophe Leroy
6a8c36b936 board: cssi: Add MIAE & VGoIP devices
This adds support for the MIAE and VGoIP devices.
Those devices have the same CPU board that the MCR3000_2G board.

The devices are very modular, they are provided with
interchangeable front and back panels.

Linux kernel is shipped with a device tree which contains all
possible setups, and U-boot eliminates unrelated nodes based on
detected hardware.

This patch was originally written by Charles Frey who's
email address is not valid anymore as he left the company.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
2023-02-11 08:47:58 +01:00
Christophe Leroy
dac3c6f625 board: cssi: Add new board MCR3000_2G
This adds a new board from CS GROUP. The board is called
MCR3000_2G, and has a CPU board called CMPC885.

That CPU board is shared with another equipment that will
be added in a later patch.

That board stores Ethernet MAC addresses in an EEPROM which
is accessed using SPI bus.

This patch was originally written by Charles Frey who's
email address is not valid anymore as he left the company.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
2023-02-11 08:47:58 +01:00