Commit graph

12 commits

Author SHA1 Message Date
Eugene OBrien
d2f6800662 ppc4xx: Update AMCC Bamboo 440EP support
Changed storage type of cfg_simulate_spd_eeprom to const
Changed storage type of gpio_tab to stack storage
(Cannot access global data declarations in .bss until afer code relocation)

Improved SDRAM tests to catch problems where data is not uniquely addressable
(e.g. incorrectly programmed SDRAM row or columns)

Added CONFIG_PROG_SDRAM_TLB to support Bamboo SIMM/DIMM modules
Fixed AM29LV320DT (OpCode Flash) sector map

Signed-off-by: Eugene OBrien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-31 10:24:56 +02:00
Stefan Roese
8f085e324a Merge with git://www.denx.de/git/u-boot.git 2007-07-16 13:28:47 +02:00
Stefan Roese
8848ec858f ppc4xx: Code cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16 10:02:12 +02:00
Wolfgang Denk
239f05ee4d Update CHANGELOG, minor coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-07-12 01:45:34 +02:00
Wolfgang Denk
bf6a9ca9b2 Merge with /home/hs/Atronic/u-boot 2007-07-09 23:41:45 +02:00
Heiko Schocher
a5d71e290f [PCS440EP] get rid of CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG
Signed-off-by: Heiko Schocher <hs@denx.de>
2007-06-25 19:11:37 +02:00
Wolfgang Denk
1636d1c852 Coding stylke cleanup; rebuild CHANGELOG 2007-06-22 23:59:00 +02:00
Heiko Schocher
566a494f59 [PCS440EP] upgrade the PCS440EP board:
- Show on the Status LEDs, some States of the board.
                - Get the MAC addresses from the EEProm
                - use PREBOOT
                - use the CF on the board.
                - check the U-Boot image in the Flash with a SHA1
                  checksum.
                - use dynamic TLB entries generation for the SDRAM

Signed-off-by: Heiko Schocher <hs@denx.de>
2007-06-22 19:11:54 +02:00
Stefan Roese
dbca208518 [ppc4xx] Extend program_tlb() with virtual & physical addresses
Now program_tlb() allows to program a TLB (or multiple) with
different virtual and physical addresses. With this change, now one
physical region (e.g. SDRAM) can be mapped 2 times, once with caches
diabled and once with caches enabled.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-14 11:14:32 +02:00
Stefan Roese
d2d432760d ppc4xx: 44x DDR driver code cleanup and small fix for Bamboo
Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 15:09:50 +02:00
Stefan Roese
e2ebe69681 [PATCH] Fix AMCC 44x SPD SDRAM init code to support 2 DIMM's
This patch fixes a problem that occurs when 2 DIMM's are
used. This problem was first spotted and fixed by Gerald Jackson
<gerald.jackson@reaonixsecurity.com> but this patch fixes the
problem in a little more clever way.

This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.

As this feature is new to the "old" 44x SPD DDR driver, it
has to be enabled via the CONFIG_PROG_SDRAM_TLB define.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-07 16:39:36 +01:00
Stefan Roese
36d830c983 [PATCH] PPC4xx: Split 4xx SPD SDRAM init routines into 2 files
Since the existing 4xx SPD SDRAM initialization routines for the
405 SDRAM controller and the 440 DDR controller don't have much in
common this patch splits both drivers into different files.

This is in preparation for the 440 DDR2 controller support (440SP/e).

Signed-off-by: Stefan Roese <sr@denx.de>
2007-02-20 10:35:42 +01:00
Renamed from cpu/ppc4xx/spd_sdram.c (Browse further)