Commit graph

56456 commits

Author SHA1 Message Date
Manivannan Sadhasivam
362d00dfff hikey: Allow environment to store in eMMC and increase bootdelay
Current Hikey configuration allows us to store u-boot environment on uSD
card. But this will be useless if uSD card is not inserted, hence use
the onboard eMMC memory for storing environment at Boot1 partition.
While we are at it, let's increase the boot delay to 10s also.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-19 08:55:43 -05:00
Igor Opaniuk
7374b15522 test: let use gdbserver for all sandbox targets
Enable usage of gdbserver for all sandbox targets (sandbox,
sandbox_flattree etc.).

Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-02-19 08:55:43 -05:00
Philippe Reynes
4ebcb16b51 bcm963158: use TARGET_BCM963158 instead of ARCH_BCM63158
We use TARGET_BCM63158 in the Kconfig instead of ARCH_BCM63158,
so we could add other board that use a bcm63158.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-02-19 08:55:43 -05:00
Michal Simek
1e7883f632 dtbo: Fix dtbo generation rules
Take the first prerequisite (dts overlay file) instead of standard
input.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-19 08:55:43 -05:00
Tien Fong Chee
e48485f5e4 fs: fat: Reduce default max clustersize 64KiB from malloc pool
Release cluster block immediately when no longer use would help to reduce
64KiB memory allocated to the memory pool.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-02-19 08:55:43 -05:00
Tien Fong Chee
8537874a65 fs: fat: dynamically allocate memory for temporary buffer
Drop the statically allocated get_contents_vfatname_block and
dynamically allocate a buffer only if required. This saves
64KiB of memory.

Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-02-19 08:55:43 -05:00
Simon Goldschmidt
dae5c2dcdc spl: implement CRC check on U-Boot uImage
SPL currently does not check uImage CRCs when loading U-Boot.

This patch adds checking the uImage CRC when SPL loads U-Boot. It does
this by reusing the existing config option SPL_CRC32_SUPPORT to allow
leaving out the CRC check on boards where the additional code size or
boot time is a problem (adding the CRC check currently adds ~1.4 kByte
to flash).

The SPL_CRC32_SUPPORT config option now gets enabled by default if SPL
support for legacy images is enabled to check the CRC on all boards
that don't actively take countermeasures.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-02-19 08:55:43 -05:00
Bin Liu
8502fe84a4 configs: am57xx_evm: define CONFIG_SPL_LOAD_FIT_ADDRESS for SPL-DFU
Define CONFIG_SPL_LOAD_FIT_ADDRESS to enable SPL-DFU for am57x platform.

Signed-off-by: Bin Liu <b-liu@ti.com>
2019-02-19 08:55:43 -05:00
Roman Kapl
44ac80e7e9 cmd: date: Do not overwrite arguments
Arguments are const and belong to the caller. Calling date in a hush
loop will yield different results from the second invocation.

Signed-off-by: Roman Kapl <rka@sysgo.com>
2019-02-19 08:55:43 -05:00
Kurban Mallachiev
957f51e863 elf: fix cache flushing in 'bootelf -p' command
Currently there are two problems in 'bootelf -p' (load elf by segments)
command:
- bss section is not flushed, so booted elf can have non zero values
  in bss;
- at least on ARM there are 'CACHE: Misaligned operation at
  range...' warnings

Use p_memsz instead of p_filesz during cache flushing for elf segment.
p_filesz doesn't include zero initialized memory (e.g. bss section),
which also should be flushed.

Align these cache flushes to line boundaries.

Signed-off-by: Kurban Mallachiev <mallachiev@ispras.ru>
2019-02-19 08:55:43 -05:00
Hannes Schmelzer
eaba7df704 board/BuR/brxre1: convert do DM
This commit converts the brxre1 board to DM,
for this we have todo following things:

- add a devicetree-file for this board
- drop all obsolete settings from board header-file
- use dm_i2c_xxx calls for read/write to the resetcontroller
- request gpios before operate them

Serues-cc: trini@konsulko.com
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-02-19 08:55:43 -05:00
Heinrich Schuchardt
90037d4c73 dm: scsi: report correct device number
Before the patch scsi would report the same device number for all SCSI
devices, e.g.

  Device 0: (1:0) Vendor: ATA Prod.: Crucial_CT128M55 Rev: MU01
            Type: Hard Disk
            Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)
  Device 0: (1:0) Vendor: ATA Prod.:  Rev:
            Type: Hard Disk
            Capacity: not available

With the patch the same device number is reported as is used in
scsi_read():

  Device 0: (1:0) Vendor: ATA Prod.: Crucial_CT128M55 Rev: MU01
            Type: Hard Disk
            Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)
  Device 1: (1:0) Vendor: ATA Prod.:  Rev:
            Type: Hard Disk
            Capacity: not available

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-02-19 08:55:43 -05:00
Heinrich Schuchardt
c7cd4afb92 tpm: simplify: tpm_set_global_lock()
When in pack_byte_string() memcpy() is called for size 0 the source buffer
address has no relevance. So we can use NULL here.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-02-19 08:55:43 -05:00
Peng Ma
b0d4a85475 configs: ls1021a: enable sata configs for all ls1021a defconfigs
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls1021a
defconfigs that missing one of them or more.
enable CONFIG_DM_MMC for some defconfigs to support CONFIG_BLK
Support sata for all ls1021a defconfigs

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:44 +05:30
Peng Ma
281ffa5386 configs: ls1012afrwy: enable sata configs for all ls1012afrwy defconfigs
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls1012afrwy
and ls1012afrwy defconfigs that missing one of them or more.
Support sata for all ls1012afrwy defconfigs

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:44 +05:30
Peng Ma
a4707ddae6 configs: ls208xa: enable sata configs for all ls208xa defconfigs
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls208xardb
and ls208xaqds defconfigs that missing one of them or more.
enable CONFIG_DM_MMC for some defconfigs to support CONFIG_BLK
Support sata for all ls208xa defconfigs

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:44 +05:30
Peng Ma
d1a6896ac4 configs: ls1088a: enable sata configs for all ls1088a defconfigs
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls1088ardb
and ls1088aqds defconfigs that missing one of them or more.
Support sata for all ls1088a defconfigs

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:44 +05:30
Peng Ma
5e1806d3bb configs: ls1046a: enable sata configs for all ls1046a defconfigs
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls1046ardb
and ls1046aqds defconfigs that missing one of them or more.
enable CONFIG_DM_MMC for some defconfigs to support CONFIG_BLK
Support sata for all ls1046a defconfigs

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:44 +05:30
Peng Ma
0833d954ce configs: ls1043aqds: enable sata configs for all ls1043aqds defconfigs
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls1043aqds
defconfigs that missing one of them or more.
Support sata for all ls1043aqds defconfigs

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:44 +05:30
Peng Ma
f11e492aea armv8: ls1043a: move SCSI_AHCI and SCSI to arm/Kconfig
remove SCSI and SCSI_AHCI configs for ls1043ardb due to no sata interface
support.
this changed is to fixed the ls1043ardb compile warning as fallows:

===================== WARNING ======================
This board does not use CONFIG_DM_SCSI. Please update
the storage controller to use CONFIG_DM_SCSI before the
v2019.07 release. Failure to update by the deadline may
result in board removal.See doc/driver-model/MIGRATION.txt
for more info.
====================================================

Signed-off-by: Peng Ma <peng.ma@nxp.com>
[PK: reword the patch subject]
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:44 +05:30
Rajesh Bhagat
5c08d96f3a armv8: layerscape: move CONFIG_LAYERSCAPE to Kconfig
Moves CONFIG_LAYERSCAPE for all NXP Layerscape platforms.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:44 +05:30
Rajesh Bhagat
bbf5b25282 armv8: layerscape: move TZASC and TZPC configs to Kconfig
Moves FSL_TZASC_400 and FSL_TZPC_BP147 configs to Kconfig
for LS1088A and LS2088A platforms.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:44 +05:30
Zhao Qiang
a860806005 QE: ls1043a: modify CONFIG_SYS_QE_FW_ADDR to (512*4A00) in SD Card
Due to the new layout of Layerscape series, move the QE
firmware to address (512*4A00) in SD Card.

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:44 +05:30
Wen He
eb967b96c2 armv8: ls1043ardb: Add the nand_bootcmd definition
nand_bootcmd doest not exist, it should be support
for nand auto boot up.

Signed-off-by: Wen He <wen.he_1@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:44 +05:30
Pankaj Bansal
1eba723c72 lx2160aqds : Add support for LX2160AQDS platform
LX2160AQDS is a development board that supports LX2160A
family SoCs. This patch add base support for this board.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
[PK: Sqaush patch for "secure boot defconfig" & add maintainer]
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:44 +05:30
Priyanka Jain
edc975b8aa board/lx2160a: Add init_func_vid() definition
Add init_func_vid() which calls adjust_vdd()
This ensures adjust_vdd() is called via
init_sequence_f[]

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:44 +05:30
Udit Agarwal
19e97e4ff7 armv8: lx2160: Add secure boot target and enable distro boot.
Adds esbc validate command for verification of MC and DPC
firmware, along with secure boot defconfig.

Also enable distro boot.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Peng Ma <peng.ma@nxp.com>
[PK: squash "enable DM support for SATA patch" & add maintainer]
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:44 +05:30
Priyanka Jain
3e1a9b5c77 board/lx2160ardb: Add distro boot support
Add u-boot enviroments to support distro boot which scan
boot.scr from external storage devices
(e.g. SD/USB/SCSI disk) and execute autoboot script

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:44 +05:30
Meenakshi Aggarwal
938e35e58f lx2160: Enable support of EMC2305
Enable support for FAN controller EMC2305 for
LX2160A RDB board.

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[PK: enable EMC2305 for lx2160rdb]
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:44 +05:30
Meenakshi Aggarwal
e088e587ed armv8: emc2305: add support for fan controller
Add support for fan controller emc2305.

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:43 +05:30
Priyanka Jain
58c3e62040 armv8: lx2160ardb : Add support for LX2160ARDB platform
LX2160ARDB is an evaluation board that supports LX2160A
family SoCs. This patch add base support for this board.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
[PK: Sqaush patches from Yinbo Zhu, Peng Ma, Chuanhua Han
and re-arrange defconfig]
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:43 +05:30
Pankaj Bansal
2e53759dc6 armv8: fsl-layerscape: reorder rgmii dpmacs' enablement
some dpmacs in armv8a based freescale layerscape SOCs can be
configured via both serdes(sgmii, xfi, xlaui etc) bits and via
EC*_PMUX(rgmii) bits in RCW.
e.g. dpmac 17 and 18 in LX2160A can be configured as SGMII from
serdes bits and as RGMII via EC1_PMUX/EC2_PMUX bits
Now if a dpmac is enabled by serdes bits then it takes precedence
over EC*_PMUX bits. i.e. in LX2160A if we select serdes protocol
that configures dpmac17 as SGMII and set the EC1_PMUX as RGMII,
then the dpmac is SGMII and not RGMII.

Therefore, move the fsl_rgmii_init after fsl_serdes_init. in
fsl_rgmii_init function of SOC, we will check if the dpmac is enabled
or not? if it is (fsl_serdes_init has already enabled the dpmac), then
don't enable it.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:43 +05:30
Priyanka Jain
8c4875395b armv8, lx2160a: Initialize ethernet array in serdes_init
Add code to initial ethernet interface arrays
with corresponding dpmac-id values in serdes_init function
for LX2160A.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:43 +05:30
Priyanka Jain
50dcbd1ff8 drivers/ddr/fsl: Update fsl_ddr_board_options as weak function
fsl_ddr_board_options is generally defined in board
board's ddr.c, but some boards like lx2160ardb board
does not need this function.
Defining fsl_ddr_board_options as weak function to
resolve compilation errors for such boards.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
[PK: Fix checkpatch warnings]
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:43 +05:30
Meenakshi Aggarwal
b3b7706b2f arch: arm: lib: Flush L3 after relocation to DDR
Flush L3 cache after uboot relocated to DDR.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Udit Kumar <udit.kumar@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:43 +05:30
Priyanka Jain
fc615be4a6 armv8: lx2160a: Update CONFIG_SYS_FSL_PEBUF_BASE
As per hardware documentation,
CONFIG_SYS_FSL_PEBUF_BASE for lx2160a is 0x1c00000000

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19 10:26:43 +05:30
Tom Rini
b78a9e2212 Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Misc Gen5 fixes
- stratix10 bugfix
- dwmmc bugfix
2019-02-18 22:12:59 -05:00
Tom Rini
f14de0014c Prepare v2019.04-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-02-18 21:36:39 -05:00
Jean-Jacques Hiblot
3c5aa6cacc configs: Enable CONFIG_BLK in am57xx_evm and am57xx_hs_evm
Enable CONFIG_DM_SCSI and CONFIG_BLK.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-02-18 15:53:09 -05:00
Jean-Jacques Hiblot
fb2cedb262 configs: k2g_evm: Enable CONFIG_BLK
CONFIG_BLK can be safely enabled as DM_MMC and DM_USB are already enabled.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Vignesh R <vigneshr@ti.com>
2019-02-18 15:53:09 -05:00
Alexander Graf
7590f907da efi_loader: Swap roles with Heinrich
Heinrich is going to take over maintainership of the efi_loader tree
going forward.

To ensure that I will still receive review mails at least, add me as
reviewer with a stable email address.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-02-18 15:53:09 -05:00
Alexander Graf
3157bbfa18 rpi: Make Matthias maintainer
Matthias Brugger agreed to take over maintainership from me for the
Raspberry Pi tree. Add him to the MAINTAINERS file instead.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-02-18 15:53:09 -05:00
Hannes Schmelzer
d3a78cb7ea board/BuR/brppt1: fix ethernet support on brppt1 boards
The commit 1bac199e8c ("configs: Resync with savedefconfig")
did remove ethernet driver from following boards defconfig:

- brppt1_mmc
- brppt1_nand
- brppt1_spi

With this commit we add ethernet and responsible phy support again.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-02-18 15:53:09 -05:00
Tom Rini
beff8e34b2 Pull request for EFI sub-system in U-Boot v2019.04-rc2
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Merge tag 'efi-2019-04-rc2' of https://github.com/xypron2/u-boot

The patches fix multiple errors. Mentionable are:
- EFI unit tests (bootefi selftest) can run on i386.
- `make tests` executes the Unicode unit tests.

The LoadImage patch is preparing for further rework to be delivered
in v2019.07.
2019-02-18 15:48:01 -05:00
Ang, Chee Hong
5097ba6177 ARM: socfpga: stratix10: Return valid error code from FPGA driver
This patch prevent the Stratix 10 FPGA driver incorrectly return the
transaction ID as the mailbox error code. It should always return the
actual mailbox error code from SDM firmware.

Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
2019-02-18 13:00:54 +01:00
Ley Foon Tan
7997599e2d mmc: dwmmc: Poll for iDMAC TX/RX interrupt
Poll for iDMAC TX/RX interrupt before disable DMA.
This to prevent disable DMA before data is transfer
completed.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-02-18 13:00:54 +01:00
Simon Goldschmidt
473f55676a arm: socfpga: gen5: remove hacked ETH RST handling
The 'dwmac_socfpga' ETH driver can now get the MACs out of reset
via the socfpga reset driver and can set PHY mode via syscon.

This means we can now remove the ad-hoc code to do this from
arch/arm/mach-socfpga.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-02-18 13:00:53 +01:00
Simon Goldschmidt
6fb1eb1b76 arm: socfpga: gen5 enable designware_socfpga
Enable the socfpga specific designware ethernet driver by default for
socfpga by implying it when enabling CONFIG_ETH_DESIGNWARE for a
MACH_SOCFPGA config.

This is required to remove the hacky reset and phy mode handling in
arch/arm/mach-socfpga.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-02-18 13:00:53 +01:00
Simon Goldschmidt
4f1267cea1 net: designware: socfpga: adapt to Gen5
This driver was written for Arria10, but it applies to Gen5, too.

The main difference is that Gen5 has 2 MACs (Arria10 has 3) and the
syscon bits are encoded in the same register, thus an offset is needed.

This offset is already read from the devicetree, but for Arria10 it is
always 0, which is probably why it has been ignored. By using this
offset when writing the phy mode into the syscon regiter, we can use
this driver to set the phy mode for both of the MACs on Gen5.

Since the PHY mode bits in sysmgr are the same even for Stratix10,
let's drop the detection of the sub-mach by checking compatible
version and just use the same code for all FPGAs.

To work correctly, this driver depends on SYSCON and REGMAP, so select
those via Kconfig when it is enabeld.

Tested on socfpga_socrates (where the 2nd MAC is connected, so a shift
offset is required).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-02-18 13:00:53 +01:00
Chen-Yu Tsai
da95ed58c4 sunxi: Add Bananapi M2+ H5 board
As the H5 is pin compatible with the H3, vendors tend to upgrade their
existing H3 products with an H5 SoC swap. This is the case with the
Bananapi M2+ H5.

Add the following to support it:

  - device tree file: synced from Linux v5.0-rc1,
  - defconfig: copy of bananapi_m2_plus_h3_defconfig with only SoC
	       family and default device tree file name changed
  - MAINTAINERS entry

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-02-18 14:46:53 +05:30