Commit graph

12 commits

Author SHA1 Message Date
Peng Fan
ed6ba46e3b misc: imx8ulp: Update fuse driver
- According to S400 API, the fuse bank 25 (Testconfig2) is able to
access. Add it into driver's mapping table.
- According to FSB words list, the reserved 48 words are ahead of
the bank 5 and bank 6. Fix the wrong position.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:43 +02:00
Ye Li
203412f66d misc: S400_API: Update S400 API for buffer dump
Add ahab_dump_buffer API to dump AHAB buffer for debug purpose

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:57 +02:00
Clement Faure
a55ca506c9 misc: S400_API: add ahab_release_caam
Add ahab_release_caam() function to the S400 API.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Ye Li
043d11a459 misc: imx8ulp: Add OEM SRK Hash fuse support
Since latest S400 firmware has supported to read OEM SRK Hash, add
it to the driver's table

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Peng Fan
4b9423e6f2 imx8ulp: move struct mu_type to common header
Move struct mu_type to common header to make it reusable by upower and
S400

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:51 +02:00
Ye Li
d24c7d54f0 driver: misc: imx8ulp: Add fuse driver for imx8ulp
This driver uses FSB to read some fuses, but not support program fuse.
It only works in SPL (secure mode), u-boot needs traps to ATF to
read them.

Some fuses can read from S400 API and others are from FSB.
Also support program some fuses via S400 API

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09 14:46:51 +02:00
Ye Li
ba472a209b arm: imx8ulp: release and configure XRDC at early phase
Since S400 will set the memory of SPL image to R/X. We can't write
to any data in SPL image.

1. Set the parameters save/restore only for u-boot, not for SPL. to
   avoid write data.
2. Not use MU DM driver but directly call MU API to send release XRDC
   to S400 at early phase.
3. Configure the SPL image memory of SRAM2 to writable (R/W/X)

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:51 +02:00
Ye Li
26b53212b8 drivers: misc: s400_api: Update API for fuse read and write
Add API to support fuse read and write

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09 14:46:51 +02:00
Ye Li
7aeaf4d9a6 drivers: misc: imx8ulp: Update S400 API for release RDC
The RDC API is updated to add a field for XRDC or TRDC

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09 14:46:51 +02:00
Ye Li
6306f75d8e drivers: misc: imx8ulp: Add S400 API for image authentication
Add S400 API for image authentication

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:51 +02:00
Ye Li
a6ffde5ea5 drivers: misc: s400_api: Update S400_SUCCESS_IND to 0xd6
According to latest S400 API doc, the the success indicate value is
changed to 0xd6. So update the driver codes.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:51 +02:00
Ye Li
0c00d03aca driver: misc: Add MU and S400 API to communicate with Sentinel
Add MU driver and S400 API. Need enable MISC driver to work

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09 14:46:50 +02:00