Commit graph

23863 commits

Author SHA1 Message Date
Mateusz Zalega
41c2d60b3a ums: always initialize mmc before ums_disk_init()
In cases when MMC hadn't been initialized before, ie. by the user or other
subsystem, it was still uninitialized while UMS media capacity check,
leading to broken ums command.

UMS has to initialize resources it uses.

Tested on Samsung Goni.

Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
Tested-by: Mateusz Zalega <m.zalega@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2014-05-05 08:21:47 +02:00
Mateusz Zalega
b7d4259af2 dfu: mmc: change offset base handling
Previously offsets handled by dfu_fill_entity_mmc(), defined in boards'
CONFIG_DFU_ALT were treated as hexadecimal regardless of their prefix,
which sometimes led to confusion. This patch forces usage of explicit
numerical base prefixes.

Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Tom Rini <trini@ti.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2014-05-05 08:20:56 +02:00
Mateusz Zalega
711b931f90 dfu: mmc: raw data write fix
When user attempted to perform a raw write using DFU (vide
dfu_fill_entity_mmc) with MMC interface not initialized before,
get_mmc_blk_size() reported invalid (zero) block size - it wasn't
possible to write ie. a new u-boot image.

This commit fixes that by initializing MMC device before use in
dfu_fill_entity_mmc().

While fixing initialization sequence, I had to change about half of
dfu_fill_entity_mmc's body, so I refactored it on the way to make it,
IMHO, considerably more comprehensible.

Being left as dead code, get_mmc_blk_size() was removed.

Tested on Samsung Goni.

Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Tom Rini <trini@ti.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2014-05-05 08:00:28 +02:00
Mateusz Zalega
75504e9592 usb: dfu: fix boards wo USB cable detection
Former usb_cable_connected() patch broke compilation of boards which do
not support this feature.

I've renamed usb_cable_connected() to g_dnl_usb_cable_connected() and added
its default implementation to gadget downloader driver code. There's
only one driver of this kind and it's unlikely there'll be another, so
there's no point in keeping it in /common.

Previously this function was declared in usb.h. I've moved it, since
it's more appropriate to keep it in g_dnl.h - usb.h seems to be intended
for USB host implementation.

Existing code, confronted with default -EOPNOTSUPP return value,
continues as if the cable was connected.

CONFIG_USB_CABLE_CHECK was removed.

Change-Id: Ib9198621adee2811b391c64512f14646cefd0369
Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
2014-05-05 08:00:28 +02:00
Mateusz Zalega
6b423b752b part: header fix
Implementation made use of types defined in common.h, even though it
wasn't #included. It worked in circumstances when .c files included
every needed header (all).

Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
Cc: Tom Rini <trini@ti.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2014-05-05 08:00:28 +02:00
Mateusz Zalega
07a2d42cd4 mmc: mmc header fix
Structure definition used type block_dev_desc_t, defined in part.h, which
wasn't included in mmc.h. It worked only in circumstances when common.h,
or another header using part.h was incuded in implementation files.

Change-Id: I5b203928b689887e3e78beb00a378955e0553eb7
Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2014-05-05 08:00:28 +02:00
Stephen Warren
2fc5dab2ed usb: gadget: allow ci_udc to build with new gadget framework
Allow ci_udc.o to be built when using the new(?) USB gadget framework,
as enabled by CONFIG_USB_GADGET.

Note that this duplicates the Makefile entry for ci_udc.o, since it's
also included inside #ifdef CONFIG_USB_ETHER. I'm not sure what that
define means; perhaps an old style of Ethernet-specific USB gadget
implementation?

I wonder if the line that this patch adds shouldn't be outside all of
the ifdefs, so it stands on its own, similar to how e.g. epautoconf.o
is shared between the two?

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-05-01 12:44:24 +02:00
Stephen Warren
a022c1e13c usb: ums: use only 1 buffer for CI_UDC
ci_udc.c allocates only a single buffer for each endpoint, which
ci_ep_alloc_request() returns as a hard-coded value rather than
dynamically allocating. Consequently, storage_common.c must limit
itself to using a single buffer at a time. Add a special case
to the definition of FSG_NUM_BUFFERS for this.

Another option would be to fix ci_ep_alloc_request() to dynamically
allocate the buffers like some/all(?) other device mode drivers do.
However, I don't think that ci_ep_queue() supports queueing up
multiple buffers either yet, and I'm not familiar enough with the
controller yet to implement that. As such, any attempt to use multiple
buffers simply results in data corruption and other errors.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-04-30 10:30:58 +02:00
Stephen Warren
fcf2ede190 usb: ci_udc: support variants with hostpc register
Tegra's USB controller appears to be a variant of the ChipIdea
controller; perhaps derived from it, or simply a different version of
the IP core to what U-Boot supports today.

In this variant, at least the following difference are present:
- Some registers are moved about.
- Setup transaction completion is reported in a separate 'epsetupstat'
  register, rather than in 'epstat' (which still exists, perhaps for
  other transaction types).
- USB connection speed is reported in a separate 'hostpc1_devlc'
  register, rather than 'portsc'.
- The registers used by ci_udc.c begin at offset 0x130 from the USB
  register base, rather than offset 0x140. However, this is handled
  by the associated EHCI controller driver, since the register address
  is stored in controller.ctrl->hcor.

Introduce define CONFIG_CI_UDC_HAS_HOSTPC to indicate which variant of
the controller should be supported. The "HAS_HOSTPC" part of this name
mirrors the similar "has_hostpc" field used by the Linux EHCI controller
core to represent the presence/absence of the hostpc1_devlc register.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-04-30 10:30:57 +02:00
Stephen Warren
0c51dc6db9 usb: ci_udc: make PHY initialization conditional
usb_gadget_register_driver() currently unconditionally programs PORTSC
to select a ULPI PHY. This is incorrect on at least the Tegra boards I
am testing with, which use a UTMI PHY for the OTG ports. Make the PHY
selection code conditional upon the specific EHCI controller that is in
use.

Ideally, I believe that the PHY initialization code should be part of
ehci_hcd_init() in the relevant EHCI controller driver, or some board-
specific function that ehci_hcd_init() calls.

For MX6, I'm not sure this PHY initialization code is correct even before
this patch, since ehci-mx6's ehci_hcd_init() already configures PORTSC to
a board-specific value, and it seems likely that the code in ci_udc.c is
incorrectly undoing this. Perhaps this is not an issue if the PHY
selection register bits aren't implemented on this instance of the MX6
USB controller?

ehci-mxs.c doens't appear to touch PORTSC, so this code is likely still
required there.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-04-30 10:30:57 +02:00
Stephen Warren
8aac6e9c53 usb: ci_udc: set ep->req.actual after transfer
At least drivers/usb/gadget/storage_common.c expects that ep->req.actual
contain the number of bytes actually transferred. (At least in practice,
I observed it failing to work correctly unless this was the case).

However, ci_udc.c modifies ep->req.length instead. I assume that .length
 is supposed to represent the allocated buffer size, whereas .actual is
supposed to represent the actual number of bytes transferred. In the OUT
transaction case, this may happen simply because the host sends a smaller
 packet than the max possible size, which is quite legal. In the IN case,
transferring fewer bytes than requested could presumably happen as an
error.

Modify handle_ep_complete() to write to .actual rather than modifying
.length.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-04-30 10:30:57 +02:00
Stephen Warren
f5c03006dd usb: ci_udc: Support larger packets
ci_ep_queue() currently only fills in the page0/page1 fields in the
queue item. If the buffer is larger than 4KiB (unaligned) or 8KiB
(page-aligned), then this prevents the HW from knowing where to write
the balance of the data.

Fix this by initializing all 5 pageN pointers, which allows up to
16KiB (potentially non-page-aligned) buffers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-04-30 10:30:57 +02:00
Lukasz Majewski
672ad18c27 dfu:fix: Replace wrong return value with proper one
This patch remove always false (since we tested ret = 0) ternary operator
with ret value returned.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
2014-04-30 10:30:57 +02:00
andrey.konovalov@linaro.org
e6e493f341 exynos: usb: Fix data abort on boards w/o vbus-gpio node in the DT
Commit 4a271cb1b4 doesn't take into account that fdtdec_setup_gpio()
returns success when the gpio passed to it is FDT_GPIO_NONE (no
gpio node found in the fdtdec_decode_gpio() call). This results in
calling gpio_direction_output() on invalid gpio. For this reason
executing "usb start" command on Arndale causes data abort in the
ehci-exynos driver.

Add the fdt_gpio_isvalid() check to fix that problem.

Signed-off-by: Andrey Konovalov <andrey.konovalov@linaro.org>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Marek Vasut <marex@denx.de>
2014-04-30 10:30:57 +02:00
Rob Herring
078d7302ac usb: musb: fill in usb_gadget_unregister_driver
Add missing missing disconnect and unbind calls to the musb gadget driver's
usb_gadget_unregister_driver function. Otherwise, any gadget drivers fail
to uninitialize and run a 2nd time.

Signed-off-by: Rob Herring <robh@kernel.org>
2014-04-30 10:30:57 +02:00
Rob Herring
52d45012ff usb: handle NULL table in usb_gadget_get_string
Allow a NULL table to be passed to usb_gadget_get_string for cases
when a string table may not be populated.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Tom Rini <trini@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
2014-04-30 10:30:57 +02:00
Przemyslaw Marczak
fd2a89b20b usb:gadget:f_thor: fix write to filesystem by add dfu_flush()
Since dfu read/write operations needs to be flushed manually,
writing to filesystem on MMC by thor was broken. MMC raw write
actually is working fine because current dfu_flush() function
writes filesystem only. This commit adds dfu_flush() to f_thor
and now filesystem write is working.

This change was tested on Trats2 board.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
2014-04-30 10:30:57 +02:00
Przemyslaw Marczak
adfc17bf09 usb:gadget:f_thor: code cleanup in function download_tail()
In thor's download_tail() function, dfu_get_entity() is called
before each dfu_write() call and the returned entity pointers
are the same. So dfu_get_entity() can be called just once and
this patch changes this.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
2014-04-30 10:30:57 +02:00
Adrian Cox
08a98b89df usb: Fix USB keyboard polling via control endpoint
USB keyboard polling failed for some keyboards on PowerPC 5020.
This was caused by requesting only 4 bytes of data from keyboards that
produce an 8 byte HID report.

Signed-off-by: Adrian Cox <adrian@humboldt.co.uk>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Marek Vasut <marex@denx.de>
2014-04-30 10:30:57 +02:00
Adrian Cox
ea42777567 usb: Add endian support macros to interrupt transfers in the EHCI driver.
Update the EHCI driver to support interrupt transfers on PowerPC.

Signed-off-by: Adrian Cox <adrian@humboldt.co.uk>
2014-04-30 10:30:56 +02:00
Nobuhiro Iwamatsu
ede4d5e387 usb: ehci: rmobile: Add support ehci host driver of rmobile SoCs
The rmobile SoC has usb host controller.
This supports USB controllers listed in the R8A7790, R8A7791 and R8A7740.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2014-04-30 10:30:56 +02:00
Shaveta Leekha
a405764c1e drivers/i2c/fsl_i2c: modify i2c_read to handle multi-byte write
Most of the I2C slaves support accesses in the typical style
that is : read/write series of bytes at particular address offset.
These transactions look like:"
(1) START:Address:Tx:Offset:RESTART:Address[0..4]:Tx/Rx:data[0..n]:STOP"

However there are certain devices which support accesses in
terms of the transactions as follows:
(2) "START:Address:Tx:Txdata[0..n1]:Clock_stretching:
        RESTART:Address:Rx:data[0..n2]"
Here Txdata is typically a command and some associated data,
similarly Rxdata could be command status plus some data received
as a response to the command sent.

Type (1) transactions are currently supportd in the
i2c driver using i2c_read and i2c_write APIs. I2C EEPROMs,
RTC, etc fall in this category.

To handle type (2) along with type (1) transactions,
i2c_read() function has been modified.

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
2014-04-29 07:10:58 +02:00
York Sun
dec1861be9 driver/mxc_i2c: Move static data structure to global_data
This driver needs a data structure in SRAM before SDRAM is available.
This is not alway the case using .data section. Moving this data
structure to global_data guarantees it is writable.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Troy Kisky <troy.kisky@boundarydevices.com>
2014-04-29 07:10:27 +02:00
Tom Rini
8854070784 Merge branch 'master' of git://www.denx.de/git/u-boot-arc 2014-04-25 15:08:43 -04:00
Tom Rini
5fcb084932 Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2014-04-25 15:06:51 -04:00
Tom Rini
b71bf4add6 Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2014-04-25 14:57:58 -04:00
Tom Rini
080d897585 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2014-04-25 14:53:51 -04:00
Alexey Brodkin
0cdd762027 axs101: bump DDR size from 256 to 512 Mb
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2014-04-25 18:00:23 +04:00
Alexey Brodkin
6bfa44206e axs101: increase EEPROM page write delay from 32 to 64 msec
With 32 milliseconds delay on some boards EEMPROM got written inconsistently.
With 64 msec all of our existig boards show properly written EEPROM.

Cc: Tom Rini <trini@ti.com>

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2014-04-25 18:00:16 +04:00
Matthias Fuchs
e634c9dc7a ppc4xx: add support for new PMC440 revision with cleanup
This patch adds support for the new PMC440 hardware revision 1.4.
The board now uses Micrel KSZ9031 phys.

Add missing i2c initialization before reading bootstrap eeprom.

Fix a couple of coding style issues.

Make local functions static.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2014-04-24 13:15:53 +02:00
Heiko Schocher
eaf8c986d3 mpc83xx: add ids8313 support
add support for the ids8313 board.

CPU:   e300c3, MPC8313, Rev: 2.1 at 396 MHz, CSB: 132 MHz
I2C:   ready
SPI:   ready
DRAM:  128 MiB (DDR2, 32-bit, ECC off, 264 MHz)
Flash: 8 MiB
NAND:  128 MiB
Net:   TSEC0, TSEC1 [PRIME]

public key on NOR flash start

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2014-04-23 19:07:54 -05:00
Heiko Schocher
99509695db mpc8313, bootcount: mpc8313 has no qe muram
mpc831x has no muram, so muram cannot be used for bootcounter
function.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2014-04-23 19:07:45 -05:00
Heiko Schocher
e7e9090108 powerpc, ids8247: create vendor board dir ids
create vendor board directory ids and move ids8247 board to it.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2014-04-23 19:07:16 -05:00
Tom Rini
adcdeacc3e Merge branch 'master' of git://git.denx.de/u-boot-mips 2014-04-23 11:07:11 -04:00
Masahiro Yamada
794d5f5540 Revert "build: Use filechk rules to create and update u-boot.lds"
This reverts commit a8b993eb81.

Commit a8b993eb claims it fixes u-boot.lds rule by replacing
$(call if_changed) with $(call filechk).

But the problem had already been fixed by commit 395e60cd
a few days before commit a8b993eb was posted.

There is no reason to apply commit a8b993eb. What is worse is
$(call filechk) is too strong to fix the problem and looks weird.

Date of the two patches:

[1] commit 395e60cdc2
    Author:     Masahiro Yamada <yamada.m@jp.panasonic.com>
    AuthorDate: Wed Apr 9 20:10:43 2014 +0900
    Commit:     Tom Rini <trini@ti.com>
    CommitDate: Fri Apr 11 10:08:42 2014 -0400
replaces $(call if_changed) -> $(call if_changed_dep)

[2] commit a8b993eb81
    Author:     Jon Loeliger <jon.loeliger@oracle.com>
    AuthorDate: Tue Apr 15 16:09:37 2014 -0500
    Commit:     Tom Rini <trini@ti.com>
    CommitDate: Fri Apr 18 16:14:16 2014 -0400
replaces $(call if_changed) -> $(call filechk)

A conflict must have happened when applying [2], but somehow it was
applied, sadly.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Jon Loeliger <jon.loeliger@oracle.com>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
2014-04-23 08:44:42 -04:00
Zhao Qiang
08ad9b068a ar8031: modify the config func of ar8031 to ar8021_config
ar8031 has the same config steps with ar8021, so change its
config func to ar8021_config instead of genphy_config.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:53 -07:00
Shaohui Xie
b6036993eb powerpc/T4QDS: add two stage boot of nand/sd
Add support of 2 stage NAND/SD boot loader using SPL framework.
PBL initialise the internal SRAM and copy SPL, this further
initialise DDR using SPD and environment and copy u-boot from
NAND/SD to DDR, finally SPL transfer control to u-boot.
NOR uses CS1 instead of CS2 when NAND boot, fix it.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:53 -07:00
Shaohui Xie
cb753850e8 powerpc/t4240: updated RCW and PBI for rev2.0
Updated the RCW for rev2.0 which uses new frequency settings as below:

Clock Configuration:
CPU0:1666.667 MHz, CPU1:1666.667 MHz, CPU2:1666.667 MHz, CPU3:1666.667 MHz,
CPU4:1666.667 MHz, CPU5:1666.667 MHz, CPU6:1666.667 MHz, CPU7:1666.667 MHz,
CPU8:1666.667 MHz, CPU9:1666.667 MHz, CPU10:1666.667 MHz, CPU11:1666.667MHz,
CCB:733.333 MHz,
DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:183.333 MHz
FMAN1: 733.333 MHz
FMAN2: 733.333 MHz
QMAN:  366.667 MHz
PME:   533.333 MHz

Remove workaround of IFC bus speed and SERDES A-006031 of rev1.0.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:53 -07:00
Prabhakar Kushwaha
b33bd8cd4b powerpc/mpc85xx:Update FM1 clock select and shift for B4420
B4420 is a personality of B4860.
It should have same FM1_CLK_SEK and FM1_CLK_SHIFT as B4860

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:53 -07:00
Shengzhou Liu
ef531c7357 board/t2080rdb: some update for t2080rdb
- update readme.
- add CONFIG_SYS_CORTINA_FW_IN_* for loading Cortina PHY CS4315
  ucode from NOR/NAND/SPI/SD/REMOTE.
- update cpld vbank with SW3[5:7]=000 as default vbank0 instead of
  previous SW3[5:7]=111 as default vbank.
- fix CONFIG_SYS_I2C_EEPROM_ADDR_LEN to 2.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:52 -07:00
Shengzhou Liu
4d66668300 board/t208xrdb: Add support of 2-stage NAND/SPI/SD boot
Add support of 2-stage NAND/SPI/SD boot loader using SPL framework.
PBL initializes the internal CPC-SRAM and copy SPL(160K) to it,
SPL further initializes DDR using SPD and environment and copy
u-boot(768K) from SPI/SD/NAND to DDR, finally SPL transfers control
to u-boot.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:52 -07:00
Shengzhou Liu
b19e288f47 board/t208xqds: Add support of 2-stage NAND/SPI/SD boot
Add support of 2-stage NAND/SPI/SD boot loader using SPL framework.
PBL initializes the internal CPC-SRAM and copy SPL(160K) to it,
SPL further initializes DDR using SPD and environment and copy
u-boot(768 KB) from SPI/SD/NAND to DDR, finally SPL transfers
control to u-boot.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
[York Sun: fix boards.cfg for T2081QDS_SDCARD and _SPIFLASH]
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:52 -07:00
Nikhil Badola
d1c561cd54 powerpc/mpc85xx: Add Differential SYSCLK config support T1040
Adds support for clock sourcing from sysclk(100MHz) for usb
on T104xRDB and T1040QDS. This requires changing reference divisor
and multiplication factor to derive usb clock from sysclk.

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:52 -07:00
vijay rai
0c12a1592c powerpc/85xx: Enhance get_sys_info() to check clocking mode
T1040 and it's variants provide "Single Oscillator Source" Reference Clock Mode.

In this mode, single onboard oscillator(DIFF_SYSCLK) can provide the reference clock
(100MHz) to the following PLLs:
• Platform PLL
• Core PLLs
• USB PLL
• DDR PLL, etc

The cfg_eng_use0 of porsr1 register identifies whether the SYSCLK (single-ended) or
DIFF_SYSCLK (differential) is selected as the clock input to the chip.

get_sys_info has been enhanced to add the diff_sysclk so that the
various drivers can be made aware of ths diff sysclk configuration and
act accordingly.

Other changes:
-single_src to ddr_refclk_sel, as it is use for checking ddr reference clock
-Removed the print of single_src from get_sys_info as this will be
-printed whenever somebody calls get_sys_info which is not appropriate.
-Add print of single_src in checkcpu as it is called only once during initialization

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Vijay Rai <vijay.rai@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:52 -07:00
Shaohui Xie
b0615f0bd2 powerpc/t1040rdb: added a break in switch case
There should be a break for case PHY_INTERFACE_MODE_SGMII, otherwise it
will fall into case PHY_INTERFACE_MODE_RGMII.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:52 -07:00
Haijun.Zhang
e2c9bc5ea6 Powerpc/mpc8536DS: Increase SPI/SD uboot Image size to 768K
u-boot binary size for Freescale mpc8536DS platforms is 512KB.
This has been reached to upper limit of the platforms and causig
linker error. So increase the u-boot binary size to 768KB.

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:51 -07:00
Prabhakar Kushwaha
9307cbaba9 powerpc/mpc85xx:Update MONITOR_LEN for 768KB u-boot size
U-boot binary size has been increased from 512KB to 768KB.

So update CONFIG_SYS_MONITOR_LEN to reflect the same.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:51 -07:00
Prabhakar Kushwaha
0938b6094e powerpc/mpc85xx:Avoid fix address of bootpg section
It is not necessary for bootpg to be present at text + 512KB.
With increase of u-boot size (768KB), bootpg section's address
cannot be fixed.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:51 -07:00
Prabhakar Kushwaha
18c0144542 board/t104xrdb: Add support of NAND, SD, SPI boot for T104xRDB
Add support of 2 stage NAND, SD, SPI boot loader using SPL framework.
here, PBL initialise the internal SRAM and copy SPL(160KB). This further
initialise DDR using SPD and environment and copy u-boot(768 KB) from NAND to DDR.
Finally SPL transer control to u-boot.

Initialise/create followings required for SPL framework
      - Add spl.c which defines board_init_f, board_init_r
      - update tlb and ddr accordingly

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:51 -07:00
Prabhakar Kushwaha
c5dfe6ec58 board/b4qds:Add support of 2 stage NAND boot-loader
Add support of 2 stage NAND boot loader using SPL framework.
here, PBL initialise the internal SRAM and copy SPL(160KB). This further
initialise DDR using SPD and environment and copy u-boot(768 KB) from NAND to DDR.
Finally SPL transer control to u-boot.

Initialise/create followings required for SPL framework
  - Add spl.c which defines board_init_f, board_init_r
  - update tlb and ddr accordingly

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:51 -07:00