To disabled a clock in clock tree initialization for a mux of STM32MP15,
the selected clock source index is set with the latest possible index for
the number of bit used. Today this valid configuration cause a error
in U-Boot messages, for example with CLK_ETH_DISABLED, when this clock
is not needed for the used ETH PHY without crystal:
no parents defined for clk id 123
This patch change the level of this message to avoid this trace for
valid clock tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Handle the input clock of RCC USB_PHY_48, provided by USBPHYC
and named "ck_usbo_48m".
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add a directory in drivers/clk to regroup the clock drivers for all
STM32 Soc with CONFIG_ARCH_STM32 (MCUs with cortex M) or
CONFIG_ARCH_STM32MP (MPUs with cortex A).
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Acked-by: Sean Anderson <seanga2@gmail.com>
Change-Id: I955af307963f732167396f0157a30cf2fc91f150
2022-06-17 14:11:43 +02:00
Renamed from drivers/clk/clk_stm32mp1.c (Browse further)