Adds to support JH7110 TRNG driver which is based on linux kernel's
jh7110-trng.c. This can support to generate 256-bit random numbers and
128-bit but this makes 256-bit default for convenience.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The Zkr ISA extension (ratified Nov 2021) introduced the seed CSR. It
provides an interface to a physical entropy source.
A RNG driver based on the seed CSR is provided. It depends on
mseccfg.sseed being set in the SBI firmware.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
For some Amlogic SOC's, mechanism to obtain random number
has been changed. For example, S4 now uses status bit waiting algo.
Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231012075828.22685-2-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
The ARMv8.5 architecture extension defines architectural RNDR/RNDRRS
system registers, that provide 64 bits worth of randomness on every
read. Since it's an extension, and implementing it is optional, there is
a field in the ID_AA64ISAR0_EL1 ID register to query the availability
of those registers.
Add a UCLASS_RNG driver that returns entropy via repeated reads from
those system registers, if the extension is implemented.
The driver always binds, but checks the availability in the probe()
routine.
This helps systems which suffer from low boot entropy, since U-Boot can
provide entropy via the generic UEFI entropy gathering protocol to the OS,
at an early stage.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
STM32 RNG configuration should best fit the requirements of the
platform. Therefore, put a platform-specific RNG configuration
field in the platform data. Default RNG configuration for STM32MP13
is the NIST certified configuration [1].
While there, fix and the RNG init sequence to support all RNG
versions.
[1] https://csrc.nist.gov/projects/cryptographic-module-validation-program/entropy-validations/certificate/53
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Seed errors can occur when using the hardware RNG. Implement the
sequences to handle them. This avoids irrecoverable RNG state.
Try to conceal seed errors when possible. If, despite the error
concealing tries, a seed error is still present, then return an error.
A clock error does not compromise the hardware block and data can
still be read from RNG_DR. Just warn that the RNG clock is too slow
and clear RNG_SR.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In order to ensure a good RNG quality and compatibility with
certified RNG configuration, add RNG clock frequency restraint.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
RNG clock error detection is now enabled if the "clock-error-detect"
property is set in the device tree.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Rename the RNG driver as it is usable by other STM32 platforms
than the STM32MP1x ones. Rename CONFIG_RNG_STM32MP1 to
CONFIG_RNG_STM32
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This adds support for the TRNG found in the RK3588 SoC to the
rockchip_rng driver so that it can be used for things such as
seeding randomness to Linux.
Changes in V3:
- Moved notes from commit to cover letter.
- Added Reviewed-By tag.
Changes in V2:
- Modified Kconfig to note that the Rockchip RNG driver supports all
versions of the hardware (v1, v2, and the trng in the rk3588).
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Changes optee_rng driver to register itself has a OP-TEE service so
that a device is bound for the driver when OP-TEE enumerates the
PTA RNG service.
Cc: Sughosh Ganu <sughosh.ganu@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The TPM device has a builtin random number generator(RNG)
functionality. Expose the RNG functions of the TPM device to the
driver model so that they can be used by the EFI_RNG_PROTOCOL if the
protocol is installed.
Also change the function arguments and return type of the random
number functions to comply with the driver model api.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
New IP adds a conditional reset that impact the clock
error management. It is now linked to a new compatible.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Adds random number generator driver using Arm SMCCC TRNG interface to
get entropy bytes from secure monitor. The driver registers as an
Arm SMCCC feature driver to allow PSCI driver to bind a device for
when secure monitor exposes RNG support from Arm SMCCC TRNG interface.
Cc: Sughosh Ganu <sughosh.ganu@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Add driver for OP-TEE based Random Number Generator on ARM SoCs
where hardware entropy sources are not accessible to normal world
and the RNG service is provided by a HWRNG Trusted Application (TA).
This driver is based on the linux driver: char/hw_random/optee-rng.c
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This adds a helper function for clk_get_by_name in cases where the clock is
optional. Hopefully this helps point driver writers in the right direction.
Also convert some existing users.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20220115205247.566210-2-seanga2@gmail.com
default n/no doesn't need to be specified. It is default option anyway.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[trini: Rework FSP_USE_UPD portion]
Signed-off-by: Tom Rini <trini@konsulko.com>
Define LOG_CATEGORY for all uclass to allow filtering with
log command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
On the RPi4 armv7 build we have the situationt that we use physical
addresses of 64 bit, while the virtual addresses are 32 bit.
Remap the base address in this scenario via map_physmem().
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
In 8a8d24bd Simon dropped data from all the various _platdata calls
but it seems this wasn't caught for the RNG200 driver from when it
was posted to merged. This fixes that issue.
Fixes: 537f0018 (rng: Add iProc RNG200 driver)
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
We find the iProc RNG200 in the Raspberry Pi 4. Add it to all it's
config so that it can be used.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
[mb: drop rpi_4_32b_defconfig]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Add support for random number generator RNG200.
This is for example found on RPi4.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
[mb: adapt to new struct driver memebers]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
This name is far too long. Rename it to remove the 'data' bits. This makes
it consistent with the platdata->plat rename.
Signed-off-by: Simon Glass <sjg@chromium.org>
We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).
Rename some of the latter variables to end with 'plat' for consistency.
Signed-off-by: Simon Glass <sjg@chromium.org>
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.
Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for the hardware pseudo random number generator found in Qualcomm SoC-s.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
This fixes HWRNG support on Amlogic GXL, GXM, G12A, G12B & SM1
based boards dues to the lack of the core clock in the device tree.
It was reported breaking EFI boot in the Linux EFI stub, because the
EFI_RNG_PROTOCOL didn't check for the RNG device presence before
installing itself.
The Linux amlogic,meson-rng.yaml doesn't mandate the core clock,
this the clock should be ignores if not present.
Nevertheless, the clock should be present and this should be fixed
on the Linux meson-gxl.dtsi & meson-g12-common.dtsi then synced
with U-Boot.
The change has been tested on a Khadas VIM3, which uses the common
meson-g12-common.dtsi like the Odroid-C4 & Odroid-N2 in Scott's
report, along with the RNG cmd.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Scott K Logan <logans@cottsay.net>
Fixes: bc40eb278b ("drivers/rng: add Amlogic hardware RNG driver")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Scott K Logan <logans@cottsay.net>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The logging system provides flexible filtering and enhanced output.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.
Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a driver for the rng device found on rockchip platforms.
Support rng module of crypto v1 and crypto v2.
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for the hardware random number generator of Amlogic SOCs.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
For all sandbox systems with DM_RNG we enable RNG_SANDBOX. So we can simply
set the default to yes.
All rng drivers depend on DM_RNG. Use a single 'if' instead of individual
dependencies. Now 'make menuconfig' shows the individual drivers neatly
indented under the DM_RNG entry.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
We should not assign a value that is overwritten before use.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
drivers/rng/sandbox_rng.c requires rand() to be defined but configuration
option CONFIG_CONFIG_LIB_RAND selected in drivers/rng/Kconfig does not
exist.
test/lib/test_aes.c requires rand() to be defined.
Fix the selection criteria for choice "Pseudo-random library support type".
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add a sandbox driver for random number generation. Mostly aimed at
providing a unit test for rng uclass.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a driver for the rng device found on stm32mp1 platforms. The
driver provides a routine for reading the random number seed from the
hardware device.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
Remove a superfluous blank line
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add a uclass for reading a random number seed from a random number
generator device.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
