Commit graph

21 commits

Author SHA1 Message Date
Masahiro Yamada
fc671ed4e3 ARM: uniphier: set DRAM_SPARSE flag for LD21 boards
Commit 04cd4e7215 ("ARM: uniphier: remove DRAM base address from
board parameters") accidentally unset the DRAM_SPARSE flag, and
changed the physical map of the DRAM channels.  Revive the original
behavior.

Fixes: 04cd4e7215 ("ARM: uniphier: remove DRAM base address from board parameters")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Shunji Sato <sato.shunji@socionext.com>
2017-03-14 04:15:24 +09:00
Masahiro Yamada
dd38374d2f ARM: uniphier: remove dram_nr_ch from board parameters
This parameter is redundant because we can know the number of
channels by checking if dram_ch[2].size is zero.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
04cd4e7215 ARM: uniphier: remove DRAM base address from board parameters
The base address of each DRAM channel can be calculated from other
parameters, so does not need hard-coding.  What we need is the size
of each DRAM channel and DRAM_SPARSE flag to decide the start address
of DRAM channel 1.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
52159d27ff ARM: dts: uniphier: sync DT with latest Linux
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-18 14:06:46 +09:00
Masahiro Yamada
f6bbec3d5c ARM: uniphier: introduce flags to adjust DRAM timing for LD20/LD21
Unfortunately, this SoC needs per-board adjustment between clock
and address/command lines.  This flag will be passed to the DRAM
init function and used for compensating the difference of DRAM
timing parameters.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-17 01:29:44 +09:00
Masahiro Yamada
ef70eb54aa ARM: uniphier: fix DRAM size of LD21 SoC package
The channel 0 DRAM size of LD21 is half of that of LD20.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-17 01:28:45 +09:00
Masahiro Yamada
be44a4679f ARM: uniphier: add PH1-LD21 board data
This has the same silicon die as PH1-LD20, but includes DRAM chips
in its package.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-24 00:24:58 +09:00
Masahiro Yamada
a74c28a0f2 ARM: uniphier: introduce flags to uniphier_board_data structure
I need to add more board attributes, so the "flags" member will be
handier than separate boolean ones.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-24 00:24:55 +09:00
Masahiro Yamada
667dbcd01d ARM: uniphier: add PH1-LD11 SoC support
This is a low-cost ARMv8 SoC from Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-26 00:37:13 +09:00
Masahiro Yamada
9d0c2ceb35 ARM: uniphier: add PH1-LD20 SoC support
This is the first ARMv8 SoC from Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24 09:54:08 +09:00
Masahiro Yamada
5b66006646 ARM: uniphier: rename function names ph1_* to uniphier_*
Eliminate the "ph1"_ prefixes from function names because "uniphier_"
describes the SoC familiy better.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-01 00:59:47 +09:00
Masahiro Yamada
ea65c98050 ARM: uniphier: drop PH1- prefix from CONFIG options and file names
The current CONFIG names like "CONFIG_ARCH_UNIPHIER_PH1_PRO4" is too
long.  It would not hurt to drop "PH1_" because "UNIPHIER_" already
well specifies the SoC family.  Also, rename files for consistency.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24 01:42:13 +09:00
Masahiro Yamada
4021b4381d ARM: uniphier: add a field to specify DDR3+
Add a field to distinguish DDR3+ from (standard) DDR3.  It also
allows to delete CONFIG_DDR_STANDARD (this is not a software
configuration, but a board attribute).

Default DDR3 spec for each SoC:

  PH1-LD4, PH1-sLD8: DDR3+
  Others: DDR3

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
46abfcc99e ARM: uniphier: rework struct uniphier_board_data
This commit reworks "struct uniphier_board_data" with an array of
DRAM channel data in it.  It will allow further cleanups by means of
"for" statements that iterate over the DDR channels.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
3f23111722 ARM: uniphier: add support for PH1-Pro4 Ace and Sanji boards
Initial commit for PH1-Pro4 Ace and Sanji boards.

Note:
There are two variants for the Ace board in terms of the amount of
DDR memory; 1GB or 2GB.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 17:07:46 +09:00
Masahiro Yamada
107b3fb484 ARM: uniphier: move headers out of include/mach directory
These headers are only included locally in arch/arm/mach-uniphier/.
There is no reason to export them by putting in the mach/ directory.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13 01:54:53 +09:00
Masahiro Yamada
89c05fa51f ARM: uniphier: split ProXstream2 board data and change DDR frequency
The DDR3 memory chips on ProXstream2 boards support up to 2133 MHz,
while only up to 1866MHz on PH1-LD6b boards.

Split the board data structure and change the DDR frequency of
ProXstream2 boards to 2133 MHz.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23 00:08:41 +09:00
Masahiro Yamada
6ba60fafda ARM: uniphier: call uniphier_get_board_param() without FDT blob
Move "gd->fdt_blob" from the caller to the callee so that this
function can be used more easily.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23 00:08:40 +09:00
Masahiro Yamada
019df879a9 ARM: uniphier: add ProXstream2 and PH1-LD6b support
The DDR SDRAM initialization code has not been mainlined yet, but
U-Boot proper should work.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:59:33 +09:00
Masahiro Yamada
28f40d4a4d ARM: uniphier: add PH1-Pro5 support
The DDR SDRAM initialization code has not been mainlined yet, but
U-Boot proper should work.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:59:28 +09:00
Masahiro Yamada
323d1f9d5b ARM: uniphier: allow to enable multiple SoCs
Before this commit, the Kconfig menu in mach-uniphier only allowed us
to choose one SoC to be compiled.  Each SoC has its own defconfig file
for the build-test coverage.  Consequently, some defconfig files are
duplicated with only the difference in CONFIG_DEFAULT_DEVICE_TREE and
CONFIG_{SOC_NAME}=y.

Now, most of board-specific parameters have been moved to device trees,
so it makes sense to include init code of multiple SoCs into a single
image as long as the SoCs have similar architecture.  In fact, some
SoCs of UniPhier family are very similar:
 - PH1-LD4 and PH1-sLD8
 - PH1-LD6b and ProXstream2 (will be added in the upcoming commit)

This commit will be helpful to merge some defconfig files for better
maintainability.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:58:38 +09:00