Commit graph

9 commits

Author SHA1 Message Date
Kever Yang
f0768491db rockchip: rk3328: move sdram driver to driver/ram
Since we have CONFIG_RAM framwork and its driver folder, move the driver
into it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-01 00:33:31 +02:00
Kever Yang
e1f6881367 rockchip: rk3328: fix syscon id table
syscon id table need a dummy member as NULL ending, or else system
will panic while try to match a compatible in this table as a list.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-08 11:44:51 +02:00
Kever Yang
975e4abad2 rockchip: correct the bank0 ram size
The bank0 ram size should be the DRAM size minus reserved size,
the DRAM size may be 1GB, 2GB, 4GB, we can not hard code it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Added DECLARE_GLOBAL_DATA_PTR for RK3328, RK3368 and RK3399:
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:45 +02:00
Kever Yang
39648e6167 rockchip: rk3328: add sdram driver in U-Boot
Add sdram driver in U-Boot for get the correct sdram size from
sys_reg, so that U-Boot can co-work with Rockchip loader or SPL
to get different dram capability and then tell the kernel.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:44 +02:00
Kever Yang
be8da534e2 rockchip: rk3328: correct mem_region
According to rk3328 TRM:
0~0xff000000 is ddr space;
0xff000000~0xffffffff is device space.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:44 +02:00
Simon Glass
a821c4af79 dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.

In the end we will have:

   1. dev_read_addr...()    - works on devices, supports flat/live tree
   2. devfdt_get_addr...()  - current functions, flat tree only
   3. of_get_address() etc. - new functions, live tree only

All drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.

Note this involves changing some dead code - the imx_lpi2c.c file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:01 -06:00
Kever Yang
625ec503cb rockchip: rk3328: add evb-rk3328 support
evb-rk3328 is an evb from Rockchip based on rk3328 SoC:
- 2 USB2.0 Host port;
- 1 USB3.0 Host port;
- 1 HDMI port;
- 2 10/100M eth port;
- 2GB ddr;
- 16GB eMMC;
- UART to USB debug port;

Signed-off-by: William Zhang <william.zhang@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-03-16 16:03:46 -06:00
Kever Yang
41793000d7 rockchip: rk3328: add clock driver
Add rk3328 clock driver and cru structure definition.

Signed-off-by: William Zhang <william.zhang@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2017-03-16 16:03:46 -06:00
Kever Yang
85a3cfb80a rockchip: rk3328: add soc basic support
RK3328 is a SoC from Rockchip with quad-core Cortex-A53 CPU.
It supports two USB2.0 EHCI ports. Other interfaces are very
much like RK3288, the DRAM are 32bit width address and support
address from 0 to 4GB-16MB range.

Signed-off-by: William Zhang <william.zhang@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Add empty arch/arm/mach-rockchip/rk3328/Kconfig to avoid build error:
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-03-16 16:03:46 -06:00