Commit graph

3 commits

Author SHA1 Message Date
Kumar Gala
4d5723da57 powerpc/85xx: Rework P2020DS pci_init_board to use common FSL PCIe code
Remove duplicated code in P2020DS board and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
002741ae86 ppc/85xx: Clean up use of LAWAR defines
On 85xx platforms we shouldn't be using any LAWAR_* defines
but using the LAW_* ones provided by fsl-law.h.  Rename any such
uses and limit the LAWAR_ to the 83xx platform as the only user so
we will get compile errors in the future.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:58 -05:00
Srikanth Srinivasan
feb7838f97 85xx: Add P2020DS support
The patch adds support for P2020DS reference platform.
DDR3 interface uses hard-coded initialization rather than SPD
for now and was tested at 667Mhz. Some PIXIS register
definitions and associated code sections need to be fixed.
TSEC1/2/3, NOR flash, MAC/SYS ID EEPROM, PCIE1/2/3 are all
tested under u-boot.

Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Travis Wheatley <Travis.Wheatley@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:16:25 -05:00