Commit graph

56 commits

Author SHA1 Message Date
Hou Zhiqiang
dccef2ec01 ls1046ardb: Add support power initialization
Add the chip power supply voltage initialization on LS1046ARDB.
Add function power_init_board(), and it will initialize the
PMIC and call the chip power initialization function.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18 09:29:13 -08:00
Prabhakar Kushwaha
9e0bb4c1d9 arm: layerscape: Enable UUID & GPT partition for NXP's ARM SoC
Enable UUID and GPT partition support for NXP's ARM based SoCs
i.e. LS1012A, LS1021A, LS1043A, LS1046A and LS2080A.

Also enable DOS partition for LS1012AFRDM boards.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18 09:27:43 -08:00
jerry.huang@nxp.com
97205eeab4 fsl/usb: enable usb feature for ls1046ardb
Enable usb feature for ls1046ardb

Signed-off-by: Changming Huang <jerry.huang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18 09:23:24 -08:00
Lokesh Vutla
8435179271 common: Add DISPLAY_BOARDINFO
Create a Kconfig entry for DISPLAY_BOARDINFO and make it be the default
in certain architectures.  Migrate all config files.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-12 08:20:17 -04:00
Lokesh Vutla
19a9747535 common/Kconfig: Add DISPLAY_CPUINFO
Create a Kconfig entry for DISPLAY_CPUINFO and make it be the default
in certain architectures.  Migrate all config files.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-12 08:04:34 -04:00
Mingkai Hu
dd02936f81 armv8: ls1046ardb: Add LS1046ARDB board support
LS1046ARDB Specification:
-------------------------
Memory subsystem:
 * 8GByte DDR4 SDRAM (64bit bus)
 * 512 Mbyte NAND flash
 * Two 64 Mbyte high-speed SPI flash
 * SD connector to interface with the SD memory card
 * On-board 4G eMMC

Ethernet:
 * Two XFI 10G ports
 * Two SGMII ports
 * Two RGMII ports

PCIe:
 * PCIe1 (SerDes2 Lane0) to miniPCIe slot
 * PCIe2 (SerDes2 Lane1) to x2 PCIe slot
 * PCIe3 (SerDes2 Lane2) to x4 PCIe slot

SATA:
 * SerDes2 Lane3 to SATA port

USB 3.0: one super speed USB 3.0 type A port
	 one Micro-AB port

UART: supports two UARTs up to 115200 bps for console

Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:11:00 -07:00