Parameter order is not correct based on zynqmp_mmio_write() declaration.
Fixes: be52372ff1 ("arm64: zynqmp: Use zynqmp_mmio_read/write functions")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Delay required for clock propagation is tighly coupled with initialization
done in psu_init(). That's why call it also for u-boot proper with
CONFIG_ZYNQMP_PSU_INIT_ENABLED enabled.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
board_early_init_f() is the right location where debug uart can be
configurated (after MIO initialization).
The patch is taking this call from SPL to also make it available for U-Boot
proper.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ZynqMP mini configurations works without PMU firmware that's why there is
no reason to enable the driver and check if it was probed properly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Multi boot register can be used for using different boot images and design
better boot strategy. Let EL3 SPL or U-Boot to read it and print it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
DEVICE_TREE variable is not exported from dts/Makefile that's why it is
necessary to setup directly before use.
Fixes: 312f2c5b14 ("arm: xilinx: Use device tree which can be passed on cmd line")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
DEVICE_TREE variable has been added by commit 6ab6b2afa0
("dts: re-write dts/Makefile more simply with Kbuild")
where DT can be specified on command line. If it is not then
CONFIG_DEFAULT_DEVICE_TREE is used to ensure backward compatibility.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Names have to match device tree file names. Also add missing one.
Fixes: 50d9283347 ("arm64: zynqmp: Sync names for SC with Versal")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no reason to do serial initialization. Uart driver does it already
based on DT. Good effect is that it is clear which interface is console.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
MIO34 is connected to POWER_KILL signal. When MIO configuration is done in
psu_init() and this pin is assigned to PMU but PMU configuration is not
loaded yet. PMU gpio output is high that means board is powered off
immediately.
The patch is fixing this sequence that MIO34 stays assing to ps gpio IP.
PMU config is loaded in SPL and then pin assigned to PMU through
psu_post_config_data().
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Currently "script_offset_f" env variable is hardcoded, this variable
specifies from which offset of the flash boot.scr should be read/write.
As flashes are of different sizes having a fixed offset makes it
difficult to load other images into the flash which may overwrite the
boot script or cannot utilize the full memory. This current fix
creates a new config "CONFIG_BOOT_SCRIPT_OFFSET" which holds the
offset address, overwrites the "script_offset_f" variable.
Also removed existing variable with default values, as the default
values are held by CONFIG_BOOT_SCRIPT_OFFSET
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Emmc boot devcie is mounted to mmc@ff160000 controller on zynqmp.
Detect mmc alias at run time for setting up proper boot_targets
sequence instead of setting boot_targets manually.
Removed setting "modeboot" variable as it not longer need as we
switched to distro boot.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
A number of board function belong in init.h with the others. Move them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.
Move them over.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Remove macros which use PM_SIP_SVC offset and convert invoke_smc() to
xilinx_pm_request() which do calculation with PM_SIP_SVC already.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Probe ZynqMP firmware driver on the board initialization phase and
ensure that firmware is in place to continue execution. The probing is
done on board_init so it can be used for both SPL and U-Boot proper.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Use the new function from firmware version to get the firmware version.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
New firmware header to place firmware specific macro and function
declarations. The patch also moves the macros defining PM operations as
well as some helper macros.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Similar SCs but different wiring.
- dc_i2c is connected to X-PRC cards that's why label is required to have
an option to hook up some devices.
- Exactly identify i2c devices on x-prc boards.
In case of missing i2c connection devices won't be accessible.
- USB 0 should be device mode with super speed.
- USB 1 should be host mode.
- Fix i2c mux reset pin entry - commented, not verified.
- Fix i2c1 eeprom compatible string - it is an ST 128Kbit device.
Need to use atmel fallback.
- Fix si570 I2C slave address and add corresponding part numbers.
- Enable AMS for system monitoring.
- phy reset property should be commented because it will throw a
warning dump when called from context that can sleep.
No support for phys property (zynqmp phy driver) with SGMII.
Add is-internal-pcspma property required by uboot.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Add zu48dr and zu49dr to the list of zynqmp devices. The zu48dr and zu49dr
are the new RFSoC silicons with id values of 0x7b and 0x7e.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds new jtag distro boot command to look for bootscript file in
DDR and execute it first incase of jtag bootmode.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch is setting up the initrd_high to as high as possible by leaving
max stack size for u-boot so that bigger rootfs can also be loaded by
u-boot for booting kernel.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Move env_set_hex() over to the new header file along with env_set_addr()
which uses it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
xilinx_zynqmp_mini configuration is throwing build error:
readlink: missing operand
Try 'readlink --help' for more information.
because CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE is not defined at all and
Makefile pass ifneq condition. Add SPL_BUILD dependency which is also
reflected in Kconfig.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The board was added without adding a MAINTAINERS entry.
Fixes:
$ ./tools/genboardscfg.py -f
WARNING: no status info for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0'
WARNING: no maintainers for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0'
$
Reported-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Avnet UltraZed-EV Starter Kit is composed by the UltraZed-EV SoM and the
only publicly-available compatible carrier card. The SoM is based on the EV
version of the Xilinx ZynqMP SoC+FPGA.
The psu_init_gpl.c file has been generated from the board definition files
at [0] using Vivado 2018.3 and then minimized by
tools/zynqmp_psu_init_minimize.sh. Manually removed serdes init code since
it is not mentioned in device tree and fixed a checkpatch error.
[0] 3686c9ff7d/ultrazed_7ev_cc/1.1
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fixes sparse warnings when building zynqmp defconfigs:
./board/xilinx/zynqmp/xil_io.h:12:6: warning: symbol 'Xil_Out32' was not declared. Should it be static?
./board/xilinx/zynqmp/xil_io.h:17:5: warning: symbol 'Xil_In32' was not declared. Should it be static?
./board/xilinx/zynqmp/xil_io.h:22:6: warning: symbol 'usleep' was not declared. Should it be static?
Also add __maybe_unused to usleep() since it is not used by minimized
psu_init_gpl.c files, so it would warn as "defined but not used".
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Optionally allow U-Boot to load a configuration object into the Power
Management Unit (PMU) firmware on Xilinx ZynqMP.
The configuration object is required by the PMU FW to enable most SoC
peripherals. So far the only way to boot using U-Boot SPL was to hard-code
the configuration object in the PMU firmware. Allow a different boot
process, where the PMU FW is equal for any ZynqMP chip and its
configuration is passed at runtime by U-Boot SPL.
All the code for Inter-processor communication with the PMU is isolated in
a new file (pmu_ipc.c). The code is inspired by the same feature as
implemented in the Xilinx First Stage Bootloader (FSBL) and Arm Trusted
Firmware:
* fb647e6b4c/lib/sw_apps/zynqmp_fsbl/src/xfsbl_misc_drivers.c (L295)
* c48d02bade/plat/xilinx/zynqmp/pm_service/pm_api_sys.c (L357)
SPL logs on the console before loading the configuration object:
U-Boot SPL 2019.07-rc1-00511-gaec224515c87 (May 15 2019 - 08:43:41 +0200)
Loading PMUFW cfg obj (2008 bytes)
EL Level: EL3
...
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch tries to implement a generic watchdog_reset() function that
can be used by all boards that want to service the watchdog device in
U-Boot. This watchdog servicing is enabled via CONFIG_WATCHDOG.
Without this approach, new boards or platforms needed to implement a
board specific version of this functionality, mostly copy'ing the same
code over and over again into their board or platforms code base.
With this new generic function, the scattered other functions are now
removed to be replaced by the generic one. The new version also enables
the configuration of the watchdog timeout via the DT "timeout-sec"
property (if enabled via CONFIG_OF_CONTROL).
This patch also adds a new flag to the GD flags, to flag that the
watchdog is ready to use and adds the pointer to the watchdog device
to the GD. This enables us to remove the global "watchdog_dev"
variable, which was prone to cause problems because of its potentially
very early use in watchdog_reset(), even before the BSS is cleared.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: "Marek Behún" <marek.behun@nic.cz>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Maxim Sloyko <maxims@google.com>
Cc: Erik van Luijk <evanluijk@interact.nl>
Cc: Ryder Lee <ryder.lee@mediatek.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: "Álvaro Fernández Rojas" <noltari@gmail.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
This patch adds "zu39dr" to the list of zynqmp devices
The zu39DR is the new RFSoC silicon with id value of 0x66.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Changed the return type of reset_reason() to int from u32, because
zynqmp_mmio_read/write() returns signed value on error.
Replaced readl and writel functions with zynqmp_mmio_read &
zynqmp_mmio_write functions to access RESET_REASON(CRL_APB) registers.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch moves all instances of static "watchdog_dev" declarations to
the "data" section. This may be needed, as the BSS may not be cleared
in the early U-Boot phase, where watchdog_reset() is already beeing
called. This may result in incorrect pointer access, as the check to
"!watchdog_dev" in watchdog_reset() may not be true and the function
may continue to run.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: "Marek Behún" <marek.behun@nic.cz>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
distro boot expects that fdtfile name is setup for alternative DTB.
Create this file based on the first platform compatible string.
This should ensure that one rootfs can store multiple DTBs for different
boards.
Reflect structure which is used in Linux kernel. It means dtbs are
strored in xilinx folder.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Zynq and ZynqMP are sharing similar code and there is no reason to do
code duplication. Move zynq_board_read_rom_ethaddr() to common file for
easier conversion to DM.
Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy
which is only one Zynq board which is using this feature.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patches renames sd nodes in dts to be in line with
kernel. This patch also modifies the references for the same
in code.
It checks mmc first to have no time penalty for new DT node names based
on left-to-right expression evaluation.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
For testing purpose use zcu102 which has SD at controller 1 and this can
be used for testing this mini configuration.
U-Boot 2018.11-00279-gdc482e7ee092 (Nov 30 2018 - 10:22:56 +0100)
Model: ZynqMP MINI EMMC1
Board: Xilinx ZynqMP
DRAM: 512 MiB
EL Level: EL3
MMC: sdhci@ff170000: 0
In: dcc
Out: dcc
Err: dcc
ZynqMP>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
For testing purpose use zcu100 which has SD at controller 0 and this can
be used for testing this mini configuration.
U-Boot 2018.11-00281-gc5d48466e76e (Nov 30 2018 - 10:41:05 +0100)
Model: ZynqMP MINI EMMC0
Board: Xilinx ZynqMP
DRAM: 512 MiB
EL Level: EL3
MMC: sdhci@ff160000: 0
In: dcc
Out: dcc
Err: dcc
ZynqMP>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
If only usb ethernet gadget is enabled it can start automatically.
If more gagdets are enabled usb ethernet gadget can be bind by
"bind /amba/usb1@ff9e0000/dwc3@fe300000 usb_ether" (on zcu100)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This configuration is useful when you want to run small u-boot and
perform DDR memory test to make sure that DDR is properly configured.
It is use for board bringup because alternative u-boot memory tests is
quite good.
Configuration is running out of OCM.
As is done for others mini configurations 0x80 bytes for variables is
enough and only default variables are stored there.
Alternative memtest is enabled and also 2GB of DDR via DTS files.
Configuration is enabling ZYNQMP_PSU_INIT_ENABLED and include psu_init()
from zcu102 for testing purpose.
In case of size issue this can be moved to SPL configuration as is done
for mini_qspi configuration but it is not a problem now.
Log:
U-Boot 2018.11-00268-gbd58b8ba8915 (Nov 29 2018 - 15:33:35 +0100)
Model: ZynqMP MINI
Board: Xilinx ZynqMP
DRAM: WARNING: Initializing TCM overwrites TCM content
2 GiB
EL Level: EL3
In: dcc
Out: dcc
Err: dcc
ZynqMP>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Wire up mini_qspi SPL with zcu102 for testing purpose.
Normally mini u-boot runs with FSBL/SPL for certain board.
Enabling SPL and configuration from zcu102 helps with testing.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The VCU disable bit(8) in IP disable register of efuse
is valid only if PL powered up and hence PL powerup status
has to be considered while determining the CG part also.
This patch considers the PL powerup status and ignores the VCU
disable bit if PL not powered up.
This fixes the issue of "unknown" id for CG parts if PL not powered up
and VCU bit(8) is not set.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
