By adding the "marvell,mv78230-i2c" compatible property, we can enable
this I2C driver to support these new ARM64 chips as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Heiko Schocher <hs@denx.de>
The I2C bus will get stuck when reading 0 byte. So we add validation of
the read length in i2c_read(). This issue only occurs on read operation.
Signed-off-by: jinghua <jinghua@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Heiko Schocher <hs@denx.de>
This patch adds runtime speed configuration to the mv_i2c driver.
Currently standard (max 100kHz) and fast mode (max 400kHz) are
supported.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Heiko Schocher <hs@denx.de>
To prepare for the DM conversion, we add a layer of compatibility
functions to be used by both the legacy and the DM functions.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Heiko Schocher <hs@denx.de>
Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content. (both just wrap <asm-generic/errno.h>)
Replace all include directives for <asm/errno.h> with <linux/errno.h>.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <trini@konsulko.com>
Since the 'clk_client.h' doesn't exist, it should be 'clk.h'.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The special handling of the chip address and register address must only
happen before we send the data buffer, otherwise we will end up
inserting both of these every 32 bytes.
Signed-off-by: John Keeping <john@metanate.com>
Acked-by: Simon Glass <sjg@chromium.org>
There is no point in writing intermediate values to the txdata
registers.
Also add padding to the debug logging to make it easier to read when
there are leading zeroes.
Signed-off-by: John Keeping <john@metanate.com>
Acked-by: Simon Glass <sjg@chromium.org>
Make it clear that we are using the same value in two adjacent lines.
Signed-off-by: John Keeping <john@metanate.com>
Acked-by: Simon Glass <sjg@chromium.org>
Patch f8a10ed1 [i2c: mvtwsi: Make address length variable] accidentally
inverted the sequence of address bytes sent to the I2C device. This
patch corrects this by sending the highest byte first and the lowest
byte last again.
Tested on theadorable Armada-XP board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Heiko Schocher <hs@denx.de>
The nvidia,bpmp property is left over from an old BPMP I2C binding, and
shouldn't be present. Remove it from the SoC DT file, and update the
I2C driver not to parse it; the value wasn't used for anything any more
anyway.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The Tegra I2C binding dictates that the clock name for the Tegra I2C clock
be "div-clk" not "i2c". Fix the Tegra186 DT and I2C driver to honor this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This patch adds support for the SMBus block read/write functionality.
Other protocols like the SMBus quick command need to get added
if this is needed.
This patch also removed the SMBus related defines from the Ivybridge
pch.h header. As they are integrated in this driver and should be
used from here. This change is added in this patch to avoid compile
breakage to keep the source git bisectable.
Tested on a congatec BayTrail board to configure the SMSC2513 USB
hub.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
clk/reset API was tested on T186 platform and previous chip like
T210/T124 will still use the old APIs.
Signed-off-by: Bryan Wu <pengw@nvidia.com>
(swarren, simplified some ifdefs, removed indent level inside an ifdef)
(swarren, added comment about the ifdefs)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
On Tegra186, some I2C controllers are directly controlled by the main CPU,
whereas others are controlled by the BPMP, and can only be accessed by the
main CPU via IPC requests to the BPMP. This driver covers the latter case.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Some code may want to read reg values from DT, but from nodes that aren't
associated with DM devices, so using dev_get_addr_index() isn't
appropriate. In this case, fdtdec_get_addr_size_*() are the functions to
use. However, "translation" (via the chain of ranges properties in parent
nodes) may still be desirable. Add a function parameter to request that,
and implement it. Update all call sites to default to the original
behaviour.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Squashed in build fix from Stephen:
Signed-off-by: Simon Glass <sjg@chromium.org>
The i2c uclass has a default setting for per_child_platdata_auto_alloc_size
so drivers do not need to set it. Remove this from drivers to avoid
confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
As I2C can be used before DRAM initialization for reading EEPROM,
avoid using static variables stored in BSS, since BSS is in DRAM, which
may not have been initialised yet. Explicitly mark "static global"
variables as belonging to the .data section.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Heiko Schocher<hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Quite a few places have a bind() method which just calls dm_scan_fdt_dev().
We may as well call dm_scan_fdt_dev() directly. Update the code to do this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Due to a oversight in testing, the initialization of the recently
introduced Freescale I2C DM driver works only for 36 bit mode of e.g.
the MPC85XX SoCs (specifically, if the physical addresses are 64 bit
wide and the DT addresses 32 bit wide).
This patch corrects the initialization so that it will work in a more
general setting.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: York Sun <york.sun@nxp.com>
Some devices using the MVTWSI driver have the option to run at speeds
faster than Standard Mode (100kHZ). On the Armada 38x controllers, this
is actually necessary, since due to erratum FE-8471889, a timing
violation concerning repeated starts prevents the controller from
working correctly in Standard Mode. One of the workarounds recommended
in the erratum is to set the bus to Fast Mode (400kHZ) operation and
ensure all connected devices are set to Fast Mode.
In the current version of the driver, however, the delay times are
hard-coded to 10ms, corresponding to Standard Mode operation. To take
full advantage of the faster modes, we would need to either keep the
currently configured I2C speed in a globally accessible variable, or
pass it to the necessary functions as a parameter. For DM, the first
option is not a problem, and we can simply keep the speed in the private
data of the driver. For the legacy interface, however, we would need to
introduce a static variable, which would cause problems with boots from
NOR flashes; see commit d6b7757 "i2c: mvtwsi: Eliminate
twsi_control_flags."
As to not clutter the interface with yet another parameter, we therefore
keep the default 10ms delays for the legacy functions.
In DM mode, we make the delay time dependant on the frequency to allow
taking full advantage of faster modes of operation (tested with up to
1MHZ frequency on Armada MV88F6820).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Zero-length offsets are not properly handled by the driver. When a read
operation with a zero-length offset is started, a START condition is
asserted, and since no offset bytes are transferred, a repeated START is
issued immediately after, which confuses the controller.
To fix this, we send the first START only if any address bytes need to
be sent, and keep track of the expected start status accordingly.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch adds the necessary functions and Kconfig entry to make the
MVTWSI I2C driver compatible with the driver model.
A possible device tree entry might look like this:
i2c@11100 {
compatible = "marvell,mv64xxx-i2c";
reg = <0x11000 0x20>;
clock-frequency = <100000>;
u-boot,i2c-slave-addr = <0x0>;
};
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
The length of the address parameter of the __twsi_i2c_read and
__twsi_i2c_write functions is fixed to four bytes.
As a final step in the preparation of the DM conversion, we make the
length of this parameter variable by turning it into an array of bytes,
and convert the 32 bit value that's passed to the legacy functions into
a four-byte-array on the fly.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
To be able to use the compatibility layer from the DM functions, we
factor the adap parameter out of all functions, and pass the actual
register base instead.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
To prepare for the DM conversion, we add a layer of compatibility
functions to be used by both the legacy and the DM functions.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Since some additional parameters will be added in the course of this
patch series (especially with the addition of DM support), we replace
the longer "unsigned int" declarations with "uint" declarations to keep
the parameter lists more readable.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
The twsi_stop function contains a parameter "status," which is used to
pass in the current exit status of the function calling twsi_stop, and
either return this status unchanged if it indicates an error, or return
twsi_stop's exit status if it does not indicate an error.
While not massively complicated, this adds another purpose to the
twsi_stop function, which should have the sole purpose of asserting a
STOP condition on the bus (and not manage the exit status of its
caller).
Therefore, we move the exit status management into the caller functions
by introducing a "stop_status" variable and returning either the status
before the twsi_stop call (kept in the "status" variable), or the status
from the twsi_stop call, depending on which indicates an error.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Due to breaking boots from NOR flashes, commit d6b7757 ("i2c: mvtwsi:
Eliminate twsi_control_flags") removed the static global
twsi_control_flags variable, which kept a set of default flags that were
always or'd to the control register when writing. It was replaced with a
flags parameter, which was passed around between the functions that
needed it.
Since the twsi_control_flags variable was used just for the purposes of
a) setting the MVTWSI_CONTROL_TWSIEN on every control register write,
and
b) setting the MVTWSI_CONTROL_ACK from twsi_i2c_read if needed,
anyway, the added overhead of another variable being passed around is no
longer justified, and we are better off implementing this flag setting
logic locally in the functions that actually write to the control
register.
Therefore, this patch sets MVTWSI_CONTROL_TWSIEN on every control
register write, replaces the twsi_i2c_read's flags parameter with a
ack_flag parameter, which tells the function whether to acknowledge the
read or not, and removes every other instance of the flags variable.
This has the added benefit that now every notion of "global default
flags" is gone, and it's much easier to see which control flags are
actually set at which point in time.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch fixes only comments/documentation: Streamline capitalization
and improve grammar/punctuation.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Convert groups of logically connected preprocessor defines into proper
enums, one macro into an inline function, and add documentation
to/extend existing documentation of these items.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch fixes seven style violations: Six superfluous spaces after
casts, and one logical continuation violation.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
parse dt parameter of i2c devices only when CONFIG_OF_CONTROL
is enabled.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This does not have much impact on behavior, but makes code look more
more like Linux. The use of devm_ioremap() often helps to delete
.remove callbacks entirely.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The following changes are made to the clock API:
* The concept of "clocks" and "peripheral clocks" are unified; each clock
provider now implements a single set of clocks. This provides a simpler
conceptual interface to clients, and better aligns with device tree
clock bindings.
* Clocks are now identified with a single "struct clk", rather than
requiring clients to store the clock provider device and clock identity
values separately. For simple clock consumers, this isolates clients
from internal details of the clock API.
* clk.h is split so it only contains the client/consumer API, whereas
clk-uclass.h contains the provider API. This aligns with the recently
added reset and mailbox APIs.
* clk_ops .of_xlate(), .request(), and .free() are added so providers
can customize these operations if needed. This also aligns with the
recently added reset and mailbox APIs.
* clk_disable() is added.
* All users of the current clock APIs are updated.
* Sandbox clock tests are updated to exercise clock lookup via DT, and
clock enable/disable.
* rkclk_get_clk() is removed and replaced with standard APIs.
Buildman shows no clock-related errors for any board for which buildman
can download a toolchain.
test/py passes for sandbox (which invokes the dm clk test amongst
others).
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Add early i2c init function with conservative divider when the exact
clock rate is not available.
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
In a system where the initial u-boot location is genuinely NOR flash (as
opposed to RAM or a cache-line setup by a pre-bootloader) writes to the
data section are problematic. At best these writes have no effect, at
worst they put the flash memory into a status mode which changes the
executable code underneath us.
Pass around a stack variable from the top of the twsi i2c driver to
avoid writing to global data.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
The DW I2C controller in the SPEAr SoCs doesn't support the enable
status register check. This patch selects
SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED for these boards.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
