Commit graph

66466 commits

Author SHA1 Message Date
Pragnesh Patel
e69d078039 mtd: spi-nor: Enable QE bit for ISSI flash in case of SFDP
Enable QE bit for ISSI flash chips.

QE enablement logic is similar to what Macronix
has, so reuse the existing code itself.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:06 +05:30
Johannes Holland
0e146993bb spi: add support for all spi modes with soft spi
The spi bitbanging driver did not implement all spi modes properly. Add
code to support all spi modes, honoring soft_spi_set_mode() and
defaulting to spi mode 0. Previously, CPHA was implemented inversely
(defaulting to CPHA=1) and CPOL=1 was hardcoded.

Signed-off-by: Johannes Holland <johannes.holland@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:06 +05:30
Jagan Teki
f247354708 arm: Remove mx31pdk board
DM, OF_CONTROL, DM_SPI and other driver model migration
deadlines are expired for this board.

Remove it.

Acked-by: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:06 +05:30
Jagan Teki
5d1281296f spi: omap3: Drop nondm code
Now all boards are using this omap3 spi driver in
dm model, so drop the nondm code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:06 +05:30
Jagan Teki
b96b0762c7 db-88f6281-bp-nand: Enable DM_SPI/SPI_FLASH
Enable DM_SPI, DM_SPI_FLASH for db-88f6281-bp-nand board.

Cc: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:06 +05:30
Jagan Teki
bb1cbb2ba6 arm: Remove pengwyn board
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Cc: Lothar Felten <lothar.felten@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:06 +05:30
Jagan Teki
bce26c45e2 arm: Remove pepper board
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Cc: Ash Charles <ash@gumstix.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
37559488a9 arm: Remove bav335x board
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Cc: Gilles Gameiro <gilles@gigadevices.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
45833e25fc arm: Remove cairo board
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Drop it.

Cc: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
d78b9df763 logicpd: Drop omap3 zoom1
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Drop it.

Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
ed3294d6d1 arm: Remove overo board
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Drop it.

Cc: Ash Charles <ash@gumstix.com>
Cc: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
76386d6195 arm: Remove cm_t35 board
DM, DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
a25aea733d arm: Remove cm_t54 board
DM, DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Cc: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
8c32ccd60d siemens: rut: Enable DM_SPI, DM_SPI_FLASH
Enable DM_SPI, DM_SPI_FLASH for siemens rut board.

Build is fine, but not tested.

Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
5fe431ce4a siemens: pxm2: Enable DM_SPI, DM_SPI_FLASH
Enable DM_SPI, DM_SPI_FLASH for siemens pxm2 board.

Build is fine, but not tested.

Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
015fa53c7d siemens: thuban: Enable DM_SPI, DM_SPI_FLASH
Enable DM_SPI, DM_SPI_FLASH for siemens thuban board.

Build is fine, but not tested.

Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
08ab6231c7 siemens: rastaban: Enable DM_SPI, DM_SPI_FLASH
Enable DM_SPI, DM_SPI_FLASH for siemens rastaban board.

Build is fine, but not tested.

Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
ed9d341094 siemens: etamin: Enable DM_SPI, DM_SPI_FLASH
Enable DM_SPI, DM_SPI_FLASH for siemens etamin board.

Build is fine, but not tested.

Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
107b5cfd4b siemens: draco: Enable DM_SPI, DM_SPI_FLASH
Enable DM_SPI, DM_SPI_FLASH for siemens draco board.

Build is fine, but not tested.

Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
492d31087f am335x: igep003x: Enable DM_SPI
Enable DM_SPI for am355x igep003x board.

Build is fine, but not tested.

Cc: Javier Martínez Canillas <javier@dowhile0.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Tom Rini
506d52308a Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Add two- and three-argument versions of CONFIG_IS_ENABLED in
  linux/kconfig.h
- Adds a new feature which supports copying modified parts of
  the frame buffer to the uncached hardware buffer
- Enable the copy framebuffer on various x86 targets
2020-07-09 09:54:22 -04:00
Marek Szyprowski
d69ddf2494 rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 64bit)
Create a non-cacheable mapping for the 0x600000000 physical memory region,
where MMIO registers for the PCIe XHCI controller are instantiated by the
PCIe bridge.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-09 15:46:12 +02:00
Marek Szyprowski
c44b3f523c rpi4: shorten a mapping for the DRAM
Remove the overlap between DRAM and device's IO area.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-09 15:46:12 +02:00
Sylwester Nawrocki
b6687e19f9 pci: Move some PCIe register offset definitions to a common header
Some PCI Express register offsets are currently defined in multiple
drivers, move them to a common header to avoid re-definitions and
as a pre-requisite for adding new PCIe driver.
While at it replace some spaces with tabs.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-09 15:46:12 +02:00
Sylwester Nawrocki
8e2ab05000 usb: xhci: Use only 32-bit accesses in xhci_writeq/xhci_readq
There might be hardware configurations where 64-bit data accesses
to XHCI registers are not supported properly.  This patch removes
the readq/writeq so always two 32-bit accesses are used to read/write
64-bit XHCI registers, similarly as it is done in Linux kernel.

This patch fixes operation of the XHCI controller on RPI4 Broadcom
BCM2711 SoC based board, where the VL805 USB XHCI controller is
connected to the PCIe Root Complex, which is attached to the system
through the SCB bridge.

Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely
the 64-bit wide register accesses initiated by the CPU are not properly
translated to a sequence of 32-bit PCIe accesses.
xhci_readq(), for example, always returns same value in upper and lower
32-bits, e.g. 0xabcd1234abcd1234 instead of 0x00000000abcd1234.

Cc: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-09 15:46:12 +02:00
Sylwester Nawrocki
61293f519e usb: xhci: Add missing cache flush in the scratchpad array initialization
In current code there is no cache flush after initializing the scratchpad
buffer array with the scratchpad buffer pointers. This leads to a failure
of the "slot enable" command on the rpi4 board (Broadcom STB PCIe
controller + VL805 USB hub) - the very first TRB transfer on the command
ring fails and there is a timeout while waiting for the command completion
event. After adding the missing cache flush everything seems to be working
as expected.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-09 15:46:12 +02:00
Tom Rini
d9107930af Merge tag 'for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c changes for v2020.10
- Add support for I2C controllers found on Octeon II/III and Octeon TX
  TX2 SoC platforms.
- Add I2C controller support for Cortina Access CAxxxx SoCs
- new rtc methods, rtc command, and tests
- imx_lpi2c: Improve the codes to use private data
- stm32f7_i2c.c: Add new compatible "st,stm32mp15-i2c"
- stm32f7_i2c.c: Add Fast Mode Plus support
- pwm: Add PWM driver for SiFive SoC
2020-07-09 08:22:44 -04:00
Tom Rini
5fb70639cc Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Armada 38x DDR3 fixes, enhancements (Chris)
- Armada 38x UTMI PHY SerDes fix (Chris)
- Helios4 update - sync with clearfog (Dennis)
- LaCie Kirkwood board rework - enable DM (Simon)
- net/mvpp2 memory init fix (Sven)
2020-07-09 08:21:26 -04:00
Sven Auhagen
3078e03516 net: mvpp2: fix second cp110 initialization
Since the mdio code got upstreamed it is not possible
to activate network ports on CP110 Master and Slave.

The problem is in mvpp2_base_probe which is called for each
CP110 and it initializes the buffer area for descs and rx_buffers.

This should only happen once though and the bd space is actually
set to 0 after the first run of the function.

This leads to an error when the second CP110 tries the initialization
again and disables all network ports on this CP110.

This patch adds a static variable to check if the buffer area is
initialized only once globally.

Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:52:20 +02:00
Simon Guinot
21b1c75f9d arm: kirkwood: enable DM_ETH for LaCie board
This patch enables DM_ETH for the following Kirkwood-based LaCie boards:

- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2

Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:51:20 +02:00
Simon Guinot
efa5e39a59 arm: kirkwood: enable DM_USB for LaCie board
This patch enables DM_USB and USB_STORAGE for the following
Kirkwood-based LaCie boards:

- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2

Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:51:20 +02:00
Simon Guinot
6620c652c9 arm: kirkwood: switch LaCie boards to sata_mv driver
This patch switches the SATA driver from mvsata_ide to sata_mv for the
following Kirkwood-based LaCie boards:

- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2

Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:51:20 +02:00
Simon Guinot
c98b889151 arm: kirkwood: convert LaCie boards to DM_SPI_FLASH
This patch converts the following Kirkwood-based LaCie boards to DM,
DM_SPI and DM_SPI_FLASH:

- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2

Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 06:51:20 +02:00
Simon Guinot
ca6f44ec19 arm: kirkwood: add DT spi0 alias to LaCie boards
The spi0 alias is needed by the environment code to retrieve the SPI
flash. This patch adds some -u-boot.dtsi files, providing the spi0
aliases, for all the following Kirkwood-based LaCie boards:

- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2

Note that this -u-boot.dtsi files will be removed as soon as the spi0
aliases will be available in the upstream Linux dtsi files.

Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 06:51:20 +02:00
Dennis Gilmore
34fb7df42e arm: mvebu: helios4: sync helios4 config to clearfog and dts to kernel
The helios4 is built on the same microsom as the clearfog, by syncing the config
we enable the same featureset that exists in the som on the helios4. The current
config does not boot as some of the clearfog changes needed to be made on the
helios4 also, generally speaking most changes for the clearfog should also be
made on the helios4.

Signed-off-by: Dennis Gilmore <dennis@ausil.us>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:50:05 +02:00
Chris Packham
4182232158 arm: mvebu: a38x: Adjust UTMI PHY parameters
When running USB compliance tests on our Armada-385 hardware platforms
we have seen some eye mask violations. Marvell's internal documentation
says: Based on silicon test results, it is recommended to change the
impedance calibration threshold setting to 0x6 prior to calibration.

Port changes from Marvell's u-boot fork[1] to address this.

[1] - https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/a6221551

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:49:44 +02:00
Chris Packham
ec9deec400 arm: mvebu: a38x: Fix typo
Fix spelling of Alignment.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:49:44 +02:00
Chris Packham
485dbd3f10 mv_ddr: ddr3: Update {min,max}_read_sample calculation
Measurements on actual hardware shown that the read ODT is early by 3
clocks. Adjust the calculation to avoid this.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

[upstream https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/22]
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:49:44 +02:00
Chris Packham
40ed88529c mv_ddr: ddr3: Use correct bitmask for read sample delay
In the Armada 385 functional spec (MV-S109094-00 Rev. C) the read sample
delay fields are 5 bits wide. Use the correct bitmask of 0x1f when
extracting the value.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

[upstream https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/22]
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:49:44 +02:00
Simon Glass
db17e40cca x86: apl: Re-enable loading of SPL
At present the SPL loader is not included in the TPL image so SPL cannot
be loaded. Fix it by including this file for both SPL and TPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: c87f9ce227 ("x86: Don't build some unused objects in TPL")
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
324ec5d7b4 spi: Remove unnecessary #ifdefs in header file
These prevent use of compile-time checks such as:

    if (CONFIG_IS_ENABLED(DM_SPI))

since, for example, if CONFIG_SPL_DM_SPI is not enabled then the
definitions are not included by spi.h and the C code will not build.

The #ifdefs are unnecessary since there are no conflicts with the pre-DM
code. In any case we have almost switched over to driver model for SPI.

Drop these #ifdefs from spi.h to fix a build warning on chromebook_coral
in the following patch.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
dafde79ddb bootstage: Fix 'stacked' typo
This should be 'stashed'. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Rasmus Villemoes
7842749c35 linux/kconfig.h: create two- and three-argument versions of CONFIG_IS_ENABLED
This adds a bunch of preprocessor magic to extend the capabilities of
CONFIG_IS_ENABLED. The existing semantics of

  CONFIG_IS_ENABLED(FOO)

expanding to a 1 or 0 (depending on build context and the defined-ness
or not of the appropriate CONFIG_FOO/CONFIG_SPL_FOO/CONFIG_TPL_FOO)
are of course preserved. With this, one is also allowed a two-argument
form

  CONFIG_IS_ENABLED(FOO, (something))

which expands to something precisely when CONFIG_IS_ENABLED(FOO) would
expand to 1, and expands to nothing otherwise. It is, in other words,
completely equivalent to the three lines

  #if CONFIG_IS_ENABLED(FOO)
  something
  #endif

The second argument must be parenthesized in order to allow any
tokens, including a trailing comma, to appear - one use case for this
is precisely to make it a bit more ergonomic to build an array and
only include certain items depending on .config. That should increase
both readability and not least "git grep"ability.

A third variant is also introduced,

  CONFIG_IS_ENABLED(FOO, (xxx), (yyy))

which corresponds to

  #if CONFIG_IS_ENABLED(FOO)
  xxx
  #else
  yyy
  #endif

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 12:33:24 +08:00
Rasmus Villemoes
7d78a4547d linux/kconfig.h: remove unused helper macros
U-Boot does not have loadable modules, and nothing currently uses any
of the (CONFIG_)?IS_(BUILTIN|MODULE) macros - only
the (CONFIG_)?IS_ENABLED variants are ever used.

While I understand the desire to keep this somewhat synchronized with
linux, we've already departed by the introduction of the
CONFIG_IS_ENABLED extra logic, and deleting these makes the next patch
much simpler, since I won't have to duplicate a lot of logic for no
real gain (as there are no users).

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 12:33:24 +08:00
Rasmus Villemoes
b4f73886c4 linux/kconfig.h: simplify logic for choosing CONFIG_{SPL_, TPL_, }*
Instead of using the arg1_or_junk trick to pick between two choices,
with a bit of duplication between the branches (and most of the
CONFIG_TPL_BUILD case being redundant, as _IS_TPL is known to be
defined to 1 in that case), simply define a prefix that we inject
between CONFIG_ and the given config symbol.

This only requires one level of indirection (to get the
_CONFIG_PREFIX macro expanded before the token concatenation takes
place), and makes it easy to, say, introduce a CONFIG_HOSTTOOL_
prefix. [I would expect most HOSTTOOL_ symbols to just be def_bool y,
but it would allow us to clean up some of the ifdef HOSTCC mess in the
sources shared between U-Boot and host tools.]

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 12:33:24 +08:00
Bin Meng
7d5de35b6f arm: cmd_stm32prog: Fix the CONFIG_IS_ENABLED() usage
Add parentheses around CONFIG_IS_ENABLED() in the if statement, to
fix potential build failures.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-09 12:33:24 +08:00
Simon Glass
5a77d09397 x86: minnowmax: Drop screen resolution to 1024x768
This seems like a more reasonable resolution for this board, since it is
quite slow. It also allows it to work with a 5" LCD display in my lab.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
6c74ee30bb minnowmax: Enable the copy framebuffer
Update the video driver to support this feature and enable it on
minnowmax to speed up the display.

With this change, the time taken to print the environment to the display
without CONFIG_CONSOLE_SCROLL_LINES is reduced from over 13 seconds to
300ms, at 1280x1024.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
a67b0db24e chromebook_link: Enable the copy framebuffer
Update the video driver to support this feature and enable it on link.
Also remove the multi-line scrolling since normal scrolling is fast enough
now.

With this change, the time taken to print the environment to the display
without CONFIG_CONSOLE_SCROLL_LINES is reduced from about 930ms to 29ms.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
08b7b65168 chromebook_samus: Enable the copy framebuffer
Update the video driver to support this feature and enable it on samus.
Also remove the multi-line scrolling since normal scrolling is fast enough
now.

With this change, the time taken to print the environment to the display
without CONFIG_CONSOLE_SCROLL_LINES is reduced from about 430ms to 12ms.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00