Commit graph

16617 commits

Author SHA1 Message Date
Tom Rini
095d909cf1 - jethub j100: add rescue boot from microSD
- move meson sm command to cmd/meson and add efusedump sub-command
 - switch dwc2 otg to DM for G12A, GXL & AXG
 - Add new boards:
  - Odroid Go Ultra
  - Odroid-N2L
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Merge tag 'u-boot-amlogic-20230131' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- jethub j100: add rescue boot from microSD
- move meson sm command to cmd/meson and add efusedump sub-command
- switch dwc2 otg to DM for G12A, GXL & AXG
- Add new boards:
 - Odroid Go Ultra
 - Odroid-N2L
2023-01-31 10:15:39 -05:00
Max Krummenacher
d3655bbb13 ARM: arm: colibri-imx6ull-emmc: fix emmc access
Synchronizing the device tree with linux introduced a regression.
The U-Boot specific dtsi mustn't override the alias settings for
the eMMC/SD interfaces.

Without this U-Boot cannot access the eMMC and boot the kernel.

Fixes: c21b61bff1 ("colibri-imx6ull/-emmc: synchronise device tree with linux")
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
2023-01-31 16:02:05 +01:00
Marek Vasut
ed50f82ceb arm: imx: imx8m: Add basic PSCI provider implementation
Implement basic PSCI provider to let OS turn CPU cores off and on,
power off and restart the system and determine PSCI version. This
is sufficient to remove the need for the ATF BL31 blob altogether.

To make use of this functionality, active the following Kconfig options:
  # CONFIG_PSCI_RESET is not set
  CONFIG_ARMV8_MULTIENTRY=y
  CONFIG_ARMV8_SET_SMPEN=y
  CONFIG_ARMV8_SPL_EXCEPTION_VECTORS=y
  CONFIG_ARMV8_EA_EL3_FIRST=y
  CONFIG_ARMV8_PSCI=y
  CONFIG_ARMV8_PSCI_CPUS_PER_CLUSTER=4
  CONFIG_ARMV8_SECURE_BASE=0x970000
  CONFIG_ARM_SMCCC=y
  CONFIG_SYS_HAS_ARMV8_SECURE_BASE=y

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-31 15:46:40 +01:00
Marek Vasut
58552ab81b arm: imx: imx8m: Program CSU and TZASC if PSCI provider
In case U-Boot is the PSCI provider, it is necessary to correctly
program CSU and TZASC registers. Those are poorly documented, so
push in the correct values.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-31 15:46:40 +01:00
Marek Vasut
191937134b arm: imx: imx8m: Define trampoline location if PSCI provider
The common code used to bring up secondary cores requires a final
jump location to be stored in some sort of memory location, define
this memory location to be the start of OCRAM, since it is available.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-31 15:46:40 +01:00
Marek Vasut
1434f93ee0 arm: imx: imx8m: Map RAM as NS if PSCI provider
In case U-Boot is a PSCI provider, map RAM explicitly as NS,
otherwise secondary cores crash with SError when attempting
to access RAM mapped as secure in EL2.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-31 15:46:39 +01:00
Marek Vasut
68c0ce8a5c arm: imx: imx8m: Enable GICv3 support if PSCI provider
In case U-Boot is a PSCI provider, enable GICv3 support as this
is necessary to bring up secondary cores.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-31 15:46:39 +01:00
Marek Vasut
45dd377e36 arm: imx: imx8m: Only use ROM pointers if not PSCI provider
The ROM pointers are in fact populated by the ATF BL31 blob, in case
U-Boot itself if the PSCI provider, there is no ATF BL31 blob, hence
ignore the ROM pointers.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-31 15:46:39 +01:00
Marek Vasut
9694c0532a arm: dts: imx8m: Require ATF BL31 blob only if not PSCI provider
In case U-Boot itself if the PSCI provider on i.MX8M, do not
require the ATF BL31 blob, as at that point the blob is useless
and would interfere with U-Boot operation.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-31 15:46:39 +01:00
Marek Vasut
ae237b1e62 arm: imx: Drop custom lowlevel_init
The custom lowlevel_init implementation is no longer necessary, since
it is responsible for routing and trapping SErrors in U-Boot in EL2,
which is implemented in common code since commit:
6c7691edd5 ("armv8: Always unmask SErrors")

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-31 15:46:39 +01:00
Marek Vasut
11a1a3b73d arm: psci: Fix RESET2 hook
The RESET2 hook is a PSCI v1.1 functionality, rename the macro accordinly.
Add missing handler for the RESET2 hook, so it can be implemented by U-Boot.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-31 15:46:39 +01:00
Marek Vasut
46dcb31065 arm: psci: Add PSCI v1.1 macro
Add macro representing the PSCI v1.1 .

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-31 15:46:39 +01:00
Detlev Casanova
0b32bc4831 imx6q-sabrelite: Re-add mmc aliases
In commit d0399a46e7, the device tree was
synchronized from linux and the aliases were dropped.

They need to be kept so that the mmc cards are in the right order.
Without the aliases, u-boot reports:
MMC:   FSL_SDHC: 2, FSL_SDHC: 3

With the aliases, u-boot reports:
MMC:   FSL_SDHC: 0, FSL_SDHC: 1

The upstream linux device tree does not contain the same aliases than
u-boot (It keeps the devices order with /dev/mmcblk2 and /dev/mmcblk3).
Because this board has been using different aliases in u-boot
and linux, a imx6q-sabrelite-u-boot.dtsi file is added to be
automatically included in imx6q-sabrelite.dts.

This way, linux and u-boot each keep their own aliases and there
is no breakage on current installations.

This should never be done for new boards as we want to keep linux and
u-boot with the same aliases as much as possible.
This patch is only necessary to avoid breaking existing setups.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-31 15:46:39 +01:00
Peng Fan
1224dd8b15 imx: mx6sxsabreauto: select DM_SERIAL
Select DM_SERIAL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-01-31 12:11:34 +01:00
Peng Fan
2108db6c92 imx: mx6sllevk: select DM_SERIAL
Select DM_SERIAL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-01-31 12:11:34 +01:00
Peng Fan
3a6d7ef389 imx: mx6ull/z_14x14_evk: clean up UART iomux
After DM_SERIAL, and set pinctrl_uart1 as pre-reloc, no need initialize
iomux at board file.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-01-31 12:11:33 +01:00
Ye Li
0e28622779 ARM: dts: imx8ulp-evk: Fix iomuxc issue
The property fsl,mux_mask is deleted by commit ed7bda5 (imx8ulp:
synchronise device tree with linux). This causes the pinctrl
driver not work on 8ULP, so fail to print any log.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2023-01-30 23:23:02 +01:00
Ying-Chun Liu (PaulLiu)
624c9dea92 dts: imx8mp-rsb3720: modify configrations to load fip into memory
The changes of commit 6a21c69521 ("arm: dts: imx8mp: add of-list
support to common imx8mp-u-boot.dtsi") breaks the loading of the fip.
This commit fixes the break by modify the configuration properly.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 23:23:02 +01:00
Ying-Chun Liu (PaulLiu)
8b7036e6aa dts: imx8mp: assign binman_configuration label to config-SEQ
assign a label for config-SEQ so that the board dts can modify
the configuration more easily.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 23:23:02 +01:00
Fabio Estevam
d12618b927 imx8mm-phg: Add board support
Add the board support for the i.MX8MM Cloos PHG board.

This board uses a imx8mm-tqma8mqml SoM from TQ-Group.

imx8mm-phg.dts and imx8mm-tqma8mqml.dtsi are taken
directly from Linux 6.2-rc3.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-01-30 23:23:02 +01:00
Frieder Schrempf
6e91c06a73 arm64: dts: imx8mm-kontron: Add RTC aliases
Add aliases for the RTCs on the board and on the SoC. This ensures that
the primary RTC is always the one on the board that has a buffered supply
and maximum accuracy.

This is a direct port of the pending commit from linux-next.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 23:23:02 +01:00
Fabio Estevam
c4d79448b0 mx7: clock: Use 60MHz for the I2C clocks
When an I2C clock is enabled inside enable_i2c_clk() the clock rate is
configured as PLL_SYS_MAIN_120M_CLK / 2 = 60MHz.

Currently, the I2C clock is retrieved from I2C1_CLK_ROOT, which
may not be the one that was enabled.

As there is no clock driver for the imx7d, it is better to return 60MHz
for the I2C clock.

This provides a workaround for the imx7d-pico board, where I2C4 is
connected to the PMIC.

With this change, it is possible to convert the imx7d-pico board
to DM_I2C and DM_PMIC.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-01-30 23:23:02 +01:00
Marek Vasut
3f7afddc9c ARM: imx: bootaux: Fix LTO -Wlto-type-mismatch
Commit 56c2dbdaba ("imx: bootaux: cleanup code") introduces the
following LTO related warning:

"
arch/arm/mach-imx/imx_bootaux.c:24:31: warning: type of ‘hostmap’ does not match original declaration [-Wlto-type-mismatch]
   24 | const __weak struct rproc_att hostmap[] = { };
      |                               ^
arch/arm/mach-imx/imx8m/soc.c:1590:24: note: array types have different bounds
 1590 | const struct rproc_att hostmap[] = {
      |                        ^
arch/arm/mach-imx/imx8m/soc.c:1590:24: note: ‘hostmap’ was previously declared here
../aarch64-linux-gnu/bin/ld: warning: u-boot has a LOAD segment with RWX permissions
"

This is because the weak empty array of structures "hostmap" is eventually
replaced by non-empty array of structures with different number of elements.
Fix this by avoiding weak variable size array, instead use a weak function
which returns single pointer to the array.

Fixes: 56c2dbdaba ("imx: bootaux: cleanup code")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-01-30 23:23:02 +01:00
Marek Vasut
4408cd6641 ARM: imx: bootaux: Fix macro misuse
There are no CONFIG_{TOOLS_,SPL_,TPL_,}IMX8M macros, nor is there one for
ARM64. Use plain IS_ENABLED(CONFIG_IMX8M) and IS_ENABLED(CONFIG_ARM64) to
avoid expanding the {TOOLS_,SPL_,TPL_,} part.

Fixes: 56c2dbdaba ("imx: bootaux: cleanup code")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-01-30 23:23:02 +01:00
Fabio Estevam
d939c5e0f5 imx6qdl-sabresd: Pass mmc alias
Originally, the mmc aliases node was present in imx6qdl-sabresd.dtsi.

After the sync with Linux in commit d0399a46e7 ("imx6dl/imx6qdl:
synchronise device trees with linux"), the aliases node is gone as
the upstream version does not have it.

This causes a regression in which the SD card cannot be found anymore.

Fix it by passing the alias node in the u-boot.dtsi file to
restore the original behaviour where the SD card (esdhc3) was
mapped to mmc1.

Fixes: d0399a46e7 ("imx6dl/imx6qdl: synchronise device trees with linux")
Reported-by: Carlos Rafael Giani <dv@pseudoterminal.org>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-01-30 23:23:01 +01:00
Marek Vasut
d51b38762d ARM: imx: Reinstate decode ECSPI env location from i.MX8M ROMAPI tables
Decode ECSPI boot device in env_get_location() from i.MX8M ROMAPI tables.
This is necessary to correctly identify env is in SPI NOR when the system
boots from SPI NOR attached to ECSPI.

This reinstates change from commit:
e26d0152d6 ("ARM: imx: Decode ECSPI env location from i.MX8M ROMAPI tables")
which has been dropped in commit:
b0a284a7c9 ("imx: move get_boot_device to common file")

Fixes: b0a284a7c9 ("imx: move get_boot_device to common file")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 23:23:01 +01:00
Jagan Teki
1a45a031d7 Revert "rockchip: Only call binman when TPL available"
This reverts commit f5315dd629.

[why]
TPL is not mandatory for not all Rockchip SoCs, some SoCs like
RK356x, and RK3588 still use mainline u-boot without TPL as
their ddr init programs are accessed via binaries provided by
Rockchip instead of ddr source code.

Marking TPL build makes it not able to build u-boot.itb on
RK356x targets so revert this so that it can build an SPL build
that would support all across Rockchip platforms.

Suggested-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Tested-by: Anand Moon <linux.amoon@gmail.com>  # CM3
2023-01-30 15:33:36 -05:00
Andrejs Cainikovs
352c402397 apalis-imx8: add emmc/mmc card pinctrl's for different speeds
Add pinctrl's for high speed eMMC and MMC cards.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 21:02:27 +01:00
Dario Binacchi
6629e15904 arm: dts: imx8mn-u-boot: fix DDR3 only support
In case the CONFIG_IMX8M_LPDDR4 and CONFIG_IMX8M_DDR4 options are both
disabled (i. e. BSH boards), binmain fails because DDR4 bin files are
missing.

Fixes: 93c4c0e4dd ("arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 20:56:23 +01:00
Neil Armstrong
8f5e9de121 ARM: meson: Add support for Odroid-N2L
ODROID-N2L is a variant SBC in small form factor and some peripherals
are removed from ODROID-N2PLUS based on S922X SoC.

- On-board ethernet is removed
- On-board RTC is removed
- USB 3.0 hub is removed, so one USB 2.0 and one USB 3.0 host ports
  are available
- Huge heatsink is replaced with 40x40mm heatsink, 5V active heatsink
  is recommended or a tall passive sink is optional
- 3.5mm earjack is removed
- IR remote receiver is removed
- MIPI DSI port is added

It doesn't use the odroid-n2 board support since ADC revision
collides with Odroid-N2+ and since it doesn't have on-board ethernet
no need to load the MAC address from eFuses.

Link: https://lore.kernel.org/r/20230126-u-boot-odroid-n2l-v1-2-c60f695e0f6c@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-30 14:24:17 +01:00
Neil Armstrong
5017e305ee ARM: dts: Import Odroid-N2L support
Import Odroid-N2L support posted at [1] and merged for Linux v6.3-rc1.

[1] https://lore.kernel.org/all/20230122-topic-odroid-n2l-upstream-initial-v2-0-8d3fea6d403d@linaro.org/

Link: https://lore.kernel.org/r/20230126-u-boot-odroid-n2l-v1-1-c60f695e0f6c@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-30 14:24:17 +01:00
Mark Kettenis
bdebb00d83 pci: Add Apple PCIe controller driver
This driver supports the PCIe controller on the Apple M1 and
M2 SoCs.  The code is adapted from the Linux driver.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-01-27 14:47:58 -05:00
Sinthu Raja
ca04b7da6d arm: dts: k3-am68-sk: Add r5 specific dt support
Add initial support for AM68 SK device tree that runs on R5.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2023-01-27 12:51:27 -05:00
Sinthu Raja
cc07b6c346 arm: dts: Add support for A72 specific AM68 Starter Kit Base Board
The SK architecture comprises of baseboard and a SOM board. The
AM68 Starter Kit's baseboard contains most of the actual connectors,
power supply etc. The System on Module (SoM) is plugged on to the base
board. Therefore, add support for peripherals brought out in the base
board.

Schematics: https://www.ti.com/lit/zip/SPRR463

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2023-01-27 12:51:27 -05:00
Sinthu Raja
3499deaf28 arm: dts: Add initial support for AM68 Starter Kit System on Module
AM68 Starter Kit (SK) is a low cost, small form factor board designed
for TI’s AM68 SoC. TI’s AM68 SoC comprises of dual core A72, high
performance vision accelerators, hardware accelerators, latest C71x
DSP, high bandwidth real-time IPs for capture and display. The SoC is
power optimized to provide best in class performance for industrial
applications.

        AM68 SK supports the following interfaces:
        * 16 GB LPDDR4 RAM
        * x1 Gigabit Ethernet interface
        * x1 USB 3.1 Type-C port
        * x2 USB 3.1 Type-A ports
        * x1 PCIe M.2 M Key
        * 512 Mbit OSPI flash
        * x2 CSI2 Camera interface (RPi and TI Camera connector)
        * 40-pin Raspberry Pi GPIO header

SK's System on Module (SoM) contains the SoC, PMIC, DDR and OSPI flash.
Therefore, add support for the components present on the SoM.

Schematics: https://www.ti.com/lit/zip/SPRR463
TRM: http://www.ti.com/lit/pdf/spruj28

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2023-01-27 12:51:27 -05:00
Sinthu Raja
fca27ee8b9 arch: mach-k3: Update board specific API name to K3 generic API name
Although the board_init_f API initialises the SoC, the API name is
incorrectly specified and misleads the functionality. This file should
only include k3-specific functionality. Change the API's name to something
more K3-specific and separate the function to make it more modular.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-01-27 12:51:27 -05:00
Jim Liu
337bc26f05 arm: npcm8xx: add security feature header
The NPCM driver can use on npcm7xx/npcm8xx
so add npcm8xx header for driver.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2023-01-27 12:51:26 -05:00
Jim Liu
04bd6c8997 ARM: dts: npcm8xx: add npcm845 function node
Add functaion node list as below:
1. i2c
2. gmac
3. otp
4. aes
5. sha
6. rng
7. serial

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2023-01-27 12:51:26 -05:00
Tom Rini
9ddbd70ff9 Xilinx chnages for v2023.04-rc1
makefile:
 - Add multi_dtb_fit dependency
 
 clk:
 - Handle error cases
 
 microblaze:
 - Disable falcon mode and cleanup code around
 
 xilinx:
 - Enable regular expression matching in board_fit_config_name_match()
 - Fix FRU handling for 0xC1 format
 - Fix Xilinx legacy format eeprom parsing
 
 zynqmp:
 - Some DT updates/cleanups
 - Fix IDcode for xck24
 - Remove empty mini config files
 - Add support for k24
 
 versal:
 - Remove empty mini config files
 
 versal_net:
 - Setup timer when runs in EL3
 - Build u-boot.elf for mini configurations
 
 zynq-gem:
 - Add support for new compatible strings
 - Remove support for Avnet Ultrazedev SOM
 - Handle SGMII with PCS phy
 
 spi:
 - Add support for gigadevice parts
 
 misc:
 - Remove CONFIG_TARGET_VENUS ifdef
 - Add missing headers to remove sparse warnings
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Merge tag 'xilinx-for-v2023.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx chnages for v2023.04-rc1

makefile:
- Add multi_dtb_fit dependency

clk:
- Handle error cases

microblaze:
- Disable falcon mode and cleanup code around

xilinx:
- Enable regular expression matching in board_fit_config_name_match()
- Fix FRU handling for 0xC1 format
- Fix Xilinx legacy format eeprom parsing

zynqmp:
- Some DT updates/cleanups
- Fix IDcode for xck24
- Remove empty mini config files
- Add support for k24

versal:
- Remove empty mini config files

versal_net:
- Setup timer when runs in EL3
- Build u-boot.elf for mini configurations

zynq-gem:
- Add support for new compatible strings
- Remove support for Avnet Ultrazedev SOM
- Handle SGMII with PCS phy

spi:
- Add support for gigadevice parts

misc:
- Remove CONFIG_TARGET_VENUS ifdef
- Add missing headers to remove sparse warnings
2023-01-27 10:15:39 -05:00
Jonas Karlman
7e215ad05f rockchip: Use atf as firmware and move u-boot to loadables in FIT
The FIT generated after the switch to using binman is using different
values for firmware and loadables properties compared to the old script.

With the old script:
 firmware = "atf-1";
 loadables = "u-boot", "atf-2", ...;

After switch to binman:
 firmware = "u-boot";
 loadables = "atf-1", "atf-2", ...;

This change result in SPL jumping directly into U-Boot proper instead of
initializing TF-A.

With this patch the properties change back to:
 firmware = "atf-1";
 loatables = "u-boot", "atf-2", ...;

Fixes: e0c0efff2a ("rockchip: Support building the all output files in binman")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-26 10:47:45 -07:00
Jonas Karlman
99e3a2cd4e rockchip: Add sha256 hash to FIT images
Add sha256 hash to FIT images when CONFIG_SPL_FIT_SIGNATURE=y.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-26 10:47:45 -07:00
Jonas Karlman
5ad03fc77d rockchip: Align FIT image data to SD/MMC block length
SPL load FIT images by reading the data aligned to block length.
Block length aligned image data is read directly to the load address.
Unaligned image data is written to an offset of the load address and
then the data is memcpy to the load address.

This adds a small overhead of having to memcpy unaligned data, something
that normally is not an issue.

However, TF-A may have a segment that should be loaded into SRAM, e.g.
vendor TF-A for RK3568 has a 8KiB segment that should be loaded into the
8KiB PMU SRAM. Having the image data for such segment unaligned result
in segment being written to and memcpy from beyond the SRAM boundary, in
the end this results in invalid data in SRAM.

Aligning the FIT and its external data to MMC block length to work
around such issue.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-26 10:47:45 -07:00
Michal Simek
2fe2be2d27 arm64: zynqmp: Add support for Kria K24 SOM
SOM itself from PS point of view is using the same configuration as K26
that's why reuse that files and only change compatible strings.

The reason for creating own set of files is just in case when versions
start to diverge because of HW change, supply chain issue, etc.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/61f877ec0b480c5bd368a1211fc73ff7465016bd.1674043915.git.michal.simek@amd.com
2023-01-24 13:59:33 +01:00
Michal Simek
8489b6d2e3 arm64: zynqmp: Fill model name for SOM CCs
When U-Boot do DTB reselection origin model for SOM is used and from log it
is not visible if DTB was switched or not. That's why add model directly to
CC (carrier card) to show new model if reselection was successful.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/49ba1007218496c48d287454e84a5b8c08abc692.1674043452.git.michal.simek@amd.com
2023-01-24 13:58:49 +01:00
Andre Przywara
382b837134 sunxi: eMMC: support TOC0 on boot partitions
To determine whether we have been booted from an eMMC boot partition, we
replay some of the checks that the BROM must have done to successfully
load the SPL. This involves a checksum check, which currently relies on
the SPL being wrapped in an "eGON" header.

If a board has secure boot enabled, the BROM will only accept the "TOC0"
format, which is internally very different, but uses the same
checksumming algorithm. Actually the only difference for calculating the
checksum is that the size of the SPL is stored at a different offset.

Do a header check to determine whether we deal with an eGON or TOC0
format, then set the SPL size accordingly. The rest of the code is
unchanged.

This fixes booting from an eMMC boot partition on devices with secure
boot enabled, like the Remix Mini PC.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2023-01-23 01:18:23 +00:00
Andre Przywara
456093b4a3 sunxi: remove CONFIG_MMC?_CD_PIN
For legacy reasons we were defining the card detect GPIO for all sunxi
boards in each board's defconfig.
There is actually no need for a card-detect check in the SPL code (which
consequently has been removed already), and also in U-Boot proper we
have DM code to query the CD GPIO name from the device tree.

That means we don't have any user of that information left, so can
remove the definitions from the defconfigs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
2023-01-21 01:32:23 +00:00
Andre Przywara
7f0938eac5 sunxi: fel: drop redundant "control register" save/restore
For some reasons shrouded in mystery, the code saving the FEL state was
saving the SCTLR register twice, with the second copy trying to justify
itself by using its ancient "control register" alias name.

Drop the redundant second copy, both from the fel_stash data structure,
and also the code saving and restoring it.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
2023-01-21 01:32:23 +00:00
Andre Przywara
4871650c95 sunxi: armv8: fel: load only 32-bit values
Both the values and the MMIO addresses that we need during the 64-bit FEL
restore are smaller than 2^32, so we don't need to do any 64-bit loads.

Change the loads to only load 32 bits worth of data, that saves us some
bytes for storing the values.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
2023-01-21 01:32:23 +00:00
Andre Przywara
3baa0fbe6b sunxi: f1c100s: Drop no-MMC hack
When support for the Allwinner F1C100s SoC was originally introduced,
its DT lacked any MMC nodes, which upset our sunxi-u-boot.dtsi overlay,
when it tried to add an alias to the SD card.  To quickly fix this back
then, we guarded that alias with a preprocessor macro.

Now the F1C100s family has gained MMC nodes, so we don't need the
special treatment anymore. Just remove this guard.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2023-01-21 01:32:23 +00:00
Tom Rini
6e7df1d151 global: Finish CONFIG -> CFG migration
At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks.  Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-20 12:27:24 -05:00
Tom Rini
a84fa1bef4 nxp: Finish migration of SYS_FSL_SRDS_[12] to Kconfig
As this is used on both ARM and PowerPC platforms, this needs to be
listed in arch/Kconfig.nxp and match how they're currently used by
select'ing them under the required PowerPC ARCH_xxx options.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:23 -05:00
Tom Rini
89c90cadf3 nxp: Finish migration of SYS_FSL_IFC_BANK_COUNT to Kconfig
As this is used on both ARM and PowerPC platforms, this needs to be
asked in arch/Kconfig.nxp.  Set the PowerPC defaults based on
arch/powerpc/include/asm/config_mpc85xx.h and remove the default set in
drivers/mtd/nand/raw/fsl_ifc_nand.c

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Tom Rini
80c75ce00d fsl-layerscape: Rework usage of CONFIG_CLUSTER_CLK_FREQ
In the case where CONFIG_CLUSTER_CLK_FREQ is not defined, simply set
cluster_clk to get_board_sys_clk().

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Tom Rini
1c88640fc8 arm: lib1funcs.S: Update compatibility with Linux comment slightly
At this point, the Linux code for "lib1funcs" has changed rather
dramatically. While a resync would be beneficial, it's outside the scope
of what we need here.  Simply remove the define for CONFIG_AEABI and
tests for it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Tom Rini
ae8a922bd2 arm: Rework usage of CONFIG_ARMV[78]_SECURE_BASE in linker scripts
In order to avoid defining CONFIG_ARMV[78_]SECURE_BASE as empty in the
linker scripts, if not already defined, add and use
__ARMV[78_]SECURE_BASE for when the base is not defined and we want the
linker scripts to continue.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Tom Rini
a3fda0d30a global: Remove unused CONFIG defines
Remove some CONFIG symbols and related comments, etc, that are unused
within the code itself at this point.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Neil Armstrong
640192d04f ARM: meson: add support for Odroid Go Ultra
This adds initial support for the Hardkernel Odroid Go Ultra.

The Odroid Go Ultra is a portable gaming device with the following
characteristics:
- Amlogic S922X SoC
- RK817 & RK818 PMICs
- 2GiB LPDDR4
- On board 16GiB eMMC
- Micro SD Card slot
- 5inch 854×480 MIPI-DSI TFT LCD
- Earphone stereo jack, 0.5Watt 8Ω Mono speaker
- Li-Polymer 3.7V/4000mAh Battery
- USB-A 2.0 Host Connector
- x16 GPIO Input Buttons
- 2x ADC Analog Joysticks
- USB-C Port for USB2 Device and Charging

The following are not yet handled:
- Battery RK818 Gauge and Charging
- 5inch 854×480 MIPI-DSI TFT LCD

Link: https://lore.kernel.org/r/20230119-u-boot-odroid-go-ultra-v1-2-f96bab9db396@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-20 16:27:40 +01:00
Neil Armstrong
2acbc33b3d ARM: dts: sync Amlogic ARM64 DT from v6.2-rc1
This syncs the Amlogic G12A, G12B & SM1 base DT + the
Odroid Go Ultra DT from Linux v6.2-rc1 from commmit [1].

[1] 1b929c02afd3 ("Linux 6.2-rc1")

Link: https://lore.kernel.org/r/20230119-u-boot-odroid-go-ultra-v1-1-f96bab9db396@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-20 16:27:40 +01:00
Neil Armstrong
e327e2affd ARM: meson: switch AXG & GX dwc2 otg to DM
With CONFIG_DM_USB_GADGET=y, we no longer need any board_usb_*() logic
because:
* the dwc2 driver is DM compatible, and handles its own clock enabling
* the dwc3-meson-gxl glue drivers handles "force mode switching"

Remove all mach-meson gx & axg usb code and enable CONFIG_DM_USB_GADGET.

Note: Only configs having both CONFIG_USB_DWC3_MESON_GXL=y *and*
      USB_GADGET_DWC2_OTG=y have been updated.

Thanks for the original work from Mattijs at [1]

[1] https://lore.kernel.org/all/20221024-meson-dm-usb-v1-2-2ab077a503b9@baylibre.com/

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20230117-u-boot-usb-gxl-otg-dm-v1-2-2853f6d75b06@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-20 16:21:31 +01:00
Tom Rini
53c47c59e6 convert rockchip to use binman
patman fix for checkpatch
 binman optional entries, improved support for ELF symbols
 trace improvements
 minor fdt refactoring
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Merge tag 'dm-pull-18jan23' of https://source.denx.de/u-boot/custodians/u-boot-dm

convert rockchip to use binman
patman fix for checkpatch
binman optional entries, improved support for ELF symbols
trace improvements
minor fdt refactoring
2023-01-19 09:46:57 -05:00
Simon Glass
12c3e948ee rockchip: Drop the FIT generator script
This is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18 14:55:40 -07:00
Simon Glass
e0c0efff2a rockchip: Support building the all output files in binman
Add the required binman images to replace the Makefile rules which are
currently used. This includes subsuming:

   - tpl/u-boot-tpl-rockchip.bin if TPL is enabled
   - idbloader.img if either or both of SPL and TPL are enabled
   - u-boot.itb if SPL_FIT is enabled
   - u-boot-rockchip.bin if SPL is used, either using u-boot.itb when
     SPL_FIT is enabled or u-boot.img when it isn't

Note that the intermediate files are dropped with binman, since it
producing everything in one pass. This means that
tpl/u-boot-tpl-rockchip.bin is not created, for example.

Note that for some 32-bit rk3288 boards, rockchip-optee.dtsi is included.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18 14:55:39 -07:00
Simon Glass
4170dd9ec0 rockchip: Use multiple-images for rk3399
Enable multiple-images so we can generate more than one image. Also
add a comment for the end of the #if block.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18 11:50:01 -07:00
Simon Glass
b2412dd5de rockchip: Enable bootstage on rockpro64
This board is useful for benchmarking overall U-Boot performance. Enable
the bootstage feature so we get a report.

Since this returns to the boot rom before finishing executing
board_init_r() in SPL, add a few bootstage calls so that we can collect
timing from TPL.

For the stash region, use a portion of SRAM, 64KB below the stack top.
This allows the TPL image to be up to nearly 120KB (it is typically about
64KB). SPL normally runs from SDRAM at 0, so can use the same stash
region.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18 11:49:13 -07:00
Simon Glass
d81d17637a arm: Support trace on armv8
Use the notrace attribute so that timer functions can be used when
tracing. This is required to avoid infinite loops when recording a trace.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18 11:49:13 -07:00
Simon Glass
33c60a38bb trace: Use notrace for short
The attribute syntax is quite verbose. Use the macro provided for this
purpose.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18 11:49:12 -07:00
Tom Rini
448e2b6327 event: Correct dependencies on the EVENT framework
The event framework is just that, a framework. Enabling it by itself
does nothing, so we shouldn't ask the user about it. Reword (and correct
typos) around this the option and help text. This also applies to
DM_EVENT and EVENT_DYNAMIC. Only EVENT_DEBUG and CMD_EVENT should be
visible to the user to select, when EVENT is selected.

With this, it's time to address the larger problems. When functionality
uses events, typically via EVENT_SPY, the appropriate framework then
must be select'd and NOT imply'd. As the functionality will cease to
work (and so, platforms will fail to boot) this is non-optional and
where select is appropriate. Audit the current users of EVENT_SPY to
have a more fine-grained approach to select'ing the framework where
used. Also ensure the current users of event_register and also select
EVENT_DYNAMIC.

Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Oliver Graute <Oliver.Graute@kococonnector.com>
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Fixes: 7fe32b3442 ("event: Convert arch_cpu_init_dm() to use events")
Fixes: 42fdcebf85 ("event: Convert misc_init_f() to use events")
Fixes: c5ef202557 ("dm: fix DM_EVENT dependencies")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-18 12:46:13 -05:00
Tom Rini
5b958dea5c Merge branch '2022-01-16-bootstd-updates'
To quote the author:
So far standard boot lacks a boot menu, although it is possible to create
a rudimentary one using the existing 'bootmenu' command.

Even then, this text-based menu offer only basic functionality and does
not take full advantage of the displays which are common on many devices.

This series provides a 'bootflow menu' command which allows the user to
select from the available bootflows. An attempt is made to show the name
of the available operating systems, by reading more information into the
bootflow. A logo can be read also, where supported, so that this can be
presented to the user when an option is highlighted.

Full use is made of TrueType fonts, if enabled. For cases where only a
serial console is available, it falls back to a simple text-based menu.

All of this is implementing using a new 'expo' construct, a collection of
scenes (like menu screens) which can be navigated by the user to view
information and select options. This is fairly general and should be able
to cope with a wider array of use cases, with less hacking of the menu
code, such as is currently needed for CMD_BOOTEFI_BOOTMGR.

Of course it would be possible to enhance the existing menu rather than
creating a new setup. Instead it seems better to make the existing menu
use expo, if code space permits. It avoids the event-loop problem and
should be more extensible, given its loosely coupled components and use of
IDs instead of pointers. Further motivation is provided in the
documentation.

For now the CLI keypress-decoding code is split out to be used by the new
menu. The key codes defined by menu.h are reused also.

This is of course just a starting point. Some ideas for future work are
included in the documentation.
2023-01-17 08:55:40 -05:00
Tom Rini
6d03688e75 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- kirkwood: Convert to DM Serial for various Kirkwood boards (Tony)
- orion-timer: Fix problem in early_init_done() (Stefan)
2023-01-17 08:10:56 -05:00
Mattijs Korpershoek
b96640cbfb ARM: meson: g12a: switch dwc2 otg to DM
With CONFIG_DM_USB_GADGET=y, we no longer need any board_usb_*() logic
because:
* the dwc2 driver is DM compatible, and handles its own clock enabling
* the dwc3-meson-g12a glue drivers handles "force mode switching"

Remove all mach-meson/g12a usb code and enable CONFIG_DM_USB_GADGET.

Note: Only configs having both CONFIG_USB_DWC3_MESON_G12A=y *and*
      USB_GADGET_DWC2_OTG=y have been updated.

Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20221024-meson-dm-usb-v1-2-2ab077a503b9@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-17 09:27:17 +01:00
Tony Dinh
bee23537ba arm: kirkwood: Convert to DM Serial for various Kirkwood boards
For Kirkwood boards, it is necessary to have early malloc in DRAM area
when Driver Model for Serial is enabled. Please see Michael's patch here:
https://lore.kernel.org/u-boot/20220817193809.1059688-20-michael@walle.cc/

This patch enables the early malloc in DRAM for all Kirkwood boards.
Note that this will work for boards that have either non-DM serial
and DM_SERIAL. Also, add the CONFIG_KIRKWOOD_COMMON option to enable
DM_SERIAL as a common option for boards that have been tested.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
2023-01-17 07:08:42 +01:00
Simon Glass
30f3333d88 image: Move common image code to image_board and command
We should use the cmd/ directory for commands rather than for common code
used elsewhere in U-Boot. Move the common 'source' code into
image-board.c to achieve this.

The image_source_script() function needs to call run_command_list()  so
seems to belong better in the command library. Move and rename it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-16 18:26:50 -05:00
Ashok Reddy Soma
724379d9af xilinx: versal-net: Add support for timer and start it
Add support for starting timer by setting up time stamp generator
registers. This is done only for EL3 i.e. mini U-Boot case.
For other cases, it will be done TF-A.

Add COUNTER_FREQUENCY and IOU_SWITCH_DIVISOR0 to Kconfig so that they
can be tuned as required.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fcd8b0dc4b45a11f5e753afff42f84738ac813da.1673336645.git.michal.simek@amd.com
2023-01-16 15:34:37 +01:00
Quentin Schulz
c925be73a0 rockchip: add support for PX30 Ringneck SoM on Haikou Devkit
The PX30-µQ7 (Ringneck) is a system-on-module featuring the Rockchip
PX30 in a micro Qseven-compatible form-factor.

PX30-µQ7 features:
        * CPU: quad-core Cortex-A35
        * DRAM: 2GB dual-channel
        * eMMC: onboard eMMC
        * SD/MMC
        * TI DP83825I 10/100Mbps PHY
        * USB:
                * USB2.0 dual role port
                * 3x USB2.0 host via onboard USB2.0 hub
        * Display: MIPI-DSI
        * Camera: MIPI-CSI
        * onboard 2.4GHz WiFi + Bluetooth module
        * Companion Controller: on-board additional microcontroller
	  (STM32 Cortex-M0 or ATtiny):
                * RTC
                * fan controller
                * CAN (only STM32)

The non-U-Boot DTS files are imported from Linux v6.2-rc2.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2023-01-16 18:01:11 +08:00
Quentin Schulz
2c9f077064 arm64: dts: rockchip: sync px30 DTSI with Linux kernel v6.1
Sync the px30 dtsi from Linux kernel v6.1.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2023-01-16 18:01:11 +08:00
Quentin Schulz
600e0177e7 rockchip: px30: insert u-boot, spl-boot-device into U-Boot device tree
It is possible to boot U-Boot proper from a different storage medium
than the one used by the BOOTROM to load the SPL. This information is
stored in the u-boot,spl-boot-device Device Tree property and is
accessible from U-Boot proper so that it has knowledge at runtime where
it was loaded from.

Let's add support for this feature for px30.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2023-01-16 18:01:11 +08:00
Quentin Schulz
3898237384 rockchip: px30: list possible SPL boot devices
BOOTROM sets a bit in a CPU register so that the software can know from
where the first stage bootloader was booted. One use case for this is to
specify the default loading medium for U-Boot proper to match the one
used by the BOOTROM to load the SPL (same-as-spl in
u-boot,spl-boot-order).

Let's create the mapping between BOOTROM value and Device Tree node
names for MMC devices.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2023-01-16 18:01:11 +08:00
Quentin Schulz
e53856aaf4 rockchip: px30: fix possibly unused grf and cru variables
The grf and cru are only used when no UART base is provided by the user
(defaults to UART2) or for UART1, UART3 and UART5 to be used for the
debug UART. Therefore, let's surround those variable definitions with
the proper checks.

This wasn't an issue before support for UART0 was added, because all
cases were using cru and grf. UART0 only uses pmucru so there's a need
to not define those variables anymore.

Fixes: d0af506625 ("rockchip: px30: support debug uart on UART0")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Peter Robinson
5a42fd0258 rockchip: Add initial support for the PINE64 Pinephone Pro
The Pinephone Pro is another device by PINE64. It's closely related
to the Pinebook Pro of which this initial support is derived from.

Specification:
- A variant of the Rockchip RK3399
- A 6 inch 720*1440 DSI display
- Front and rear cameras
- Type-C interface with alt mode display (DP 1.2) and PD charging
- 4GB LPDDR4 RAM
- 128GB eMMC
- mSD card slot
- An AP6255 module for 802.11ac WiFi and Bluetooth 5
- Quectel EG25-G 4G/LTE modem

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-16 18:01:11 +08:00
Peter Robinson
30a6d14a97 arm64: dts: rk3399: Add upstream Pinephone Pro dts
Initial support for the PinePhone Pro has now landed upstream in
Linux 6.1 RC1 so sync the dts from 6.2-rc1 for initial support.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2023-01-16 18:01:11 +08:00
Jagan Teki
b8f1ca9540 board: rockchip: Add Edgeble Neu2 IO Board
Neural Compute Module 2(Neu2) IO board is an industrial form factor
IO board from Edgeble AI.

General features:
- microSD slot
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
- Micro Phone array
- Speaker
- RTC battery slot
- 40-pin expansion

Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.

Add support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2023-01-16 18:01:11 +08:00
Jagan Teki
43e89241f3 ARM: dts: rockchip: Add rv1126-u-boot.dtsi
Add u-boot,dm-spl and u-boot,dm-pre-reloc related properties
for Rockchip RV1126 SoC.

Both eMMC and SD boot are tested in Edgeble Neu2 SoM.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Jagan Teki
0736dad4ed ARM: dts: rockchip: rv1126: Add Edgeble Neural Compute Module 2(Neu2) IO
Neural Compute Module 2(Neu2) IO board is an industrial form factor
evaluation board from Edgeble AI.

General features:
- microSD slot
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
- Micro Phone array
- Speaker
- RTC battery slot
- 40-pin expansion

Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.

Add support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2023-01-16 18:01:11 +08:00
Jagan Teki
d12471c7be ARM: dts: rockchip: rv1126: Add Edgeble Neural Compute Module 2(Neu2)
Neural Compute Module 2(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RV1126 from Edgeble AI.

General features:
- Rockchip RV1126
- 2/4GB LPDDR4
- 8/16/32GB eMMC
- 2x MIPI CSI2 FPC connector
- Fn-link 8223A-SR WiFi/BT

Industrial grade (-40 °C to +85 °C) version of the same class of module
called Neu2k powered with Rockchip RV1126K.

Neu2 needs to mount on top of Edgeble IO boards for creating complete
platform solutions.

Add support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2023-01-16 18:01:11 +08:00
Jagan Teki
c6154677c8 arm: rockchip: rv1126: Set dram area unsecure for SPL
Unsecure the dram area so that MMC, USB, and SFC controllers
can able to read data from dram.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Jagan Teki
ffb191e458 arm: rockchip: Add RV1126 arch core support
Rockchip RV1126 is a high-performance vision processor SoC
for IPC/CVR, especially for AI related application.

Add arch core support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I22fde40ec375e3c6aba39808abf252edc45d4b04
2023-01-16 18:01:11 +08:00
Jagan Teki
2204a8c90a ARM: dts: rockchip: Add Rockchip RV1126 SoC
RV1126 is a high-performance vision processor SoC for IPC/CVR,
especially for AI related application.

It is based on quad-core ARM Cortex-A7 32-bit core which integrates
NEON and FPU. There is a 32KB I-cache and 32KB D-cache for each core
and 512KB unified L2 cache. It has build-in NPU supports INT8/INT16
hybrid operation and computing power is up to 2.0TOPs.

This patch add basic core dtsi support.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2023-01-16 18:01:11 +08:00
Jagan Teki
3fc0dee585 ARM: dts: rockchip: Add Rockchip RV1126 pinctrl
Add pinctrl definitions for Rockchip RV1126.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Jagan Teki
43cecf7234 arm: rockchip: Add grf header for rv1126
Add GRF header for Rockchip RV1126.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Jagan Teki
f4ca986e29 arch: rockchip: Add cru header for rv1126
Add clock and reset unit header include for rv1126.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Jagan Teki
e869b3485c ram: rockchip: Add rv1126 ddr driver support
Add DDR driver for Rockchip RV1126 SoC.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Jagan Teki
5ab30c3176 ram: rockchip: Update ddr pctl regs for px30
Add full ddr pctl registers and bit masks for px30.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Jagan Teki
29c3148974 ram: rockchip: Compute ddr capacity based on grf split
DDR chip capacity is computed based on GRF split in some
Rockchip SoC's like PX30 and RV1126.

Add split argument in ddr print info so-that the respective
ddr driver will pass the grf split.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Quentin Schulz
ccaa55fb6e rockchip: puma-rk3399: sync DTS with Linux kernel next-20221114
This synchronizes the Device Trees related to Puma RK3399 SoM with Linux
kernel next-20221114 to include two important changes pertaining to
eMMC and SD card instability.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Quentin Schulz
4b56446002 rockchip: px30: make watchdog and tsadc trigger a first global reset
By default, the PX30 is configured for watchdog and tsadc to trigger a
second global reset which is a more permissive reset than first global
reset.

From TRM part 1 "2.3 System Reset Solution":
glb_srstn_1 will reset the all logic, and
glb_srstn_2 will reset the all logic except GRF, SGRF and all GPIOs.

This enforces that the watchdog and tsadc trigger glb_srstn_1 as
similarly done for RK3399 in U-Boot (in SDRAM driver for some reason?),
TF-A and Coreboot.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Hai Pham
0fe4366c9a ARM: renesas: condor: switch eMMC bus to 1V8
The eMMC card has two supplies, VCC and VCCQ. The VCC supplies the NAND
array and the VCCQ supplies the bus. On Condor, the VCC is connected to
3.3V rail, while the VCCQ is connected to 1.8V rail. Adjust the pinmux
to match the bus, which is always operating in 1.8V mode.

Based on Linux commit 69efe4bbeda50745 ("arm64: dts: renesas: condor:
Switch eMMC bus to 1V8") from Wolfram Sang

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
2023-01-14 14:10:12 +01:00
Marek Vasut
3405cfa29d ARM: dts: renesas: condor: Enable SPI NOR fast-read
This board requires SPI NOR fast-read, otherwise the SPI NOR
access returns corrupted data. Enable the fast-read explicitly
in DT as it has been disabled in the MTD subsystem by commit
d008190920 ("mtd: spi-nor: Mask out fast read if not requested in DT")

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2023-01-14 14:10:12 +01:00
Tom Rini
fe4c21de4f Add driver to manage onboard hub supplies
Add calibration support for stm32-adc
 Linux kernel v6.1 DT synchronization for stm32mp151.dtsi
 stm32mp157a-dk1-scmi-u-boot.dtsi update
 Add support of OP-TEE and STM32MP13x in bsec driver
 ECDSA various fixes for stm32mp
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Merge tag 'u-boot-stm32-20230113' of https://source.denx.de/u-boot/custodians/u-boot-stm

Add driver to manage onboard hub supplies
Add calibration support for stm32-adc
Linux kernel v6.1 DT synchronization for stm32mp151.dtsi
stm32mp157a-dk1-scmi-u-boot.dtsi update
Add support of OP-TEE and STM32MP13x in bsec driver
ECDSA various fixes for stm32mp
2023-01-13 09:56:19 -05:00
Marek Vasut
0e86f813f4 ARM: stm32: Make ECDSA authentication available to U-Boot
With U-Boot having access to ROM API call table, it is possible to use
the ROM API call it authenticate e.g. signed kernel fitImages using the
BootROM ECDSA support. Make this available by pulling the ECDSA BootROM
call support from SPL-only guard.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-13 13:46:57 +01:00
Marek Vasut
6eea541514 ARM: stm32: Pass ROM API table pointer to U-Boot proper
The ROM API table pointer is no longer accessible from U-Boot, fix
this by passing the ROM API pointer through. This makes it possible
for U-Boot to call ROM API functions to authenticate payload like
signed fitImages.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-13 13:46:57 +01:00
Marek Vasut
dbeaca79b7 ARM: stm32: Factor out save_boot_params
The STM32MP15xx platform currently comes with two incompatible
implementations of save_boot_params() weak function override.
Factor the save_boot_params() implementation into common cpu.c
code and provide accessors to read out both ROM API table address
and DT address from any place in the code instead.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-13 13:46:57 +01:00
Marek Vasut
bbafbc044d ARM: stm32: Fix ECDSA authentication with Dcache enabled
In case Dcache is enabled while the ECDSA authentication function is
called via BootROM ROM API, the MMU tables are set up and the BootROM
region is not marked as executable, so an attempt to run code from it
results in a hang. Mark the BootROM region as executable as suggested
by Patrick to prevent the hang.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-13 13:46:57 +01:00
Heinrich Schuchardt
7e808fcc97 efi_loader: add .rela sections to .text on arm64
_relocate() needs the information in .rela* for self relocation
of the EFI binary.

Fixes: d7ddeb66a6 ("efi_loader: fix building aarch64 EFI binaries")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-01-13 09:09:07 +01:00
Sean Anderson
0998a20cfc misc: fs_loader: Add function to get the chosen loader
The fs_loader device is used to pull in settings via the chosen node.
However, there was no library function for this, so arria10 was doing it
explicitly. This function subsumes that, and uses ofnode_get_chosen_node
instead of navigating the device tree directly. Because fs_loader pulls
its config from the environment by default, it's fine to create a device
with nothing backing it at all. Doing this allows enabling
CONFIG_FS_LOADER without needing to modify the device tree.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-01-12 14:06:15 -05:00
Kshitiz Varshney
81ceb1695a Added dcp_rng driver initialization code
This commit initializes dcp_rng device driver inside
arch_misc_init() function.

Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2023-01-12 11:25:46 -05:00
Patrick Delaunay
a33885ff49 stm32mp: Add support of STM32MP13x in bsec driver
Add support for "st,stm32mp13-bsec" for STM32MP13x in the
bsec driver based on OP-TEE pseudo TA STM32MP BSEC.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:37:13 +01:00
Patrick Delaunay
33a909a42a stm32mp: Add OP-TEE support in bsec driver
When OP-TEE is used, the SMC for BSEC management are not available and
the STM32MP BSEC pseudo TA must be used (it is mandatory for STM32MP13
and it is a new feature for STM32MP15x).

The BSEC driver try to open a session to this PTA BSEC at probe
and use it for OTP read or write access to fuse or to shadow.

This patch also adapts the commands stm32key and stboard to handle
the BSEC_LOCK_PERM lock value instead of 1.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:37:13 +01:00
Patrick Delaunay
27bad4e7fc stm32mp: cosmetic: Update of bsec driver
Remove unnecessary return in stm32mp_bsec_write_lock and replace tab
by space for plat_auto opts.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:37:13 +01:00
Patrick Delaunay
6e391c7d5f ARM: dts: stm32: Add timer interrupts on stm32mp15
The timer units in the stm32mp15x CPUs have interrupts, depending on the
timer flavour either one "global" or four dedicated ones. Add the irqs
to the timer units on stm32mp15x.

Sync the DT Files with linux kernel v6.1 and with commit a9b70102253ce
("ARM: dts: stm32: Add timer interrupts on stm32mp15")

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:30:52 +01:00
Patrick Delaunay
126aa470d6 ARM: dts: stm32mp15: fix typo in stm32mp15xx-dkx.dtsi
Remove unnecessary space in device tree stm32mp15xx-dkx.dtsi.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:30:52 +01:00
Patrick Delaunay
d1d56638c4 ARM: dts: stm32mp15: remove clksrc include in SCMI dtsi file
The include file stm32mp1-clksrc.h is not necessary for the SCMI STM32MP15
dtsi files as the clock tree is not defined in the U-Boot SCMI device tree;
these SCMI device tree only support TFABOOT with stm32mp15_defconfig,
SPL with the basic boot defconfig is not supported.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:30:52 +01:00
Fabrice Gasnier
214d6e7e68 ARM: dts: stm32: add support for USB2514B onboard hub on stm32mp157c-ev1
Add support for USB2514B onboard hub on stm32mp157c EV1 board. The HUB
is supplied by a 3v3 PMIC regulator.

[backport from linux ad9591b01d24]
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-01-12 16:19:53 +01:00
Fabrice Gasnier
79da4074dd ARM: dts: stm32: update vbus-supply of usbphyc_port0 on stm32mp157c-ev1
phy-stm32-usbphyc bindings uses a connector node with vbus-supply
property.

[backport from linux 43e55d778a6b]
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:08:43 +01:00
Ville Skyttä
fe482b886d Use grep -E or plain grep instead of egrep
`egrep` has been deprecated in GNU grep since 2007,
and since 3.8 it emits obsolescence warnings:
https://git.savannah.gnu.org/cgit/grep.git/commit/?id=a9515624709865d480e3142fd959bccd1c9372d1
Acked-by: Dhruva Gole <d-gole@ti.com>
2023-01-11 15:02:24 -05:00
Luca Ceresoli
66b39c1a8c arm64: zynqmp: remove Avnet UltraZed-EV Starter Kit
Nobody seems interested and able to keep this board supported, and
xilinx_zynqmp_virt_defconfig is supposed to be enough for any zynqmp board.

See the discussion at: https://lore.kernel.org/u-boot/CAPnjgZ3hHbyiFf=_Lp-Wz_XOWBkV-3vK4Q3xp=7bcERw-spNpA@mail.gmail.com/T/#m76d726f1ab3f7074c8105c9a2af2110ac7d18708

Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Link: https://lore.kernel.org/r/20230111082554.1930782-1-luca.ceresoli@bootlin.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-11 10:43:39 +01:00
Andrew Davis
367c9e0614 ARM: omap3: evm: Name this directory omap3evm
Before this was named just evm, which doesn't match the naming
of the other TI board file directory and makes it look like a
common directory for evms. Name this omap3evm.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Derald Woods <woods.technical@gmail.com>
2023-01-10 15:39:08 -05:00
Dzmitry Sankouski
971ccee2fb SoC: sdm845: find and save KASLR to env variables
KASLR address is needed to boot fully functional Android.
KASLR is set by primary bootloader, and since u-boot is used
as a secondary bootloader(replacing kernel) on sdm845 platform,
KASLR may be found by comparing memory chunks at relocaddr over
supposed KASLR range.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-01-10 15:39:07 -05:00
Bryan Brattlof
b672e85810 arm: mach-k3: copy bootindex to OCRAM for main domain SPL
Texas Instruments has begun enabling security settings on the SoCs it
produces to instruct ROM and TIFS to begin protecting the Security
Management Subsystem (SMS) from other binaries we load into the chip by
default.

One way ROM and TIFS do this is by enabling firewalls to protect the
OCSRAM and HSM RAM regions they're using during bootup.

The HSM RAM the wakeup SPL is in is firewalled by TIFS to protect
itself from the main domain applications. This means the 'bootindex'
value in HSM RAM, left by ROM to indicate if we're using the primary
or secondary boot-method, must be moved to OCSRAM (that TIFS has open
for us) before we make the jump to the main domain so the main domain's
bootloaders can keep access to this information.

Signed-off-by: Bryan Brattlof <bb@ti.com>
2023-01-10 15:39:07 -05:00
Martyn Welch
7c34b71a42 arm64:mach-k3 am625_init: Correct boot mode detection
The boot mode detection assumes that BOOT_DEVICE_MMC2 should always
result in MMCSD_MODE_FS, but MMCSD_MODE_RAW is also a valid option for
this port.

The current logic also avoids looking at the bootmode pin strapping,
which should be the primary means of determining whether a device is
being booted in MMCSD_MODE_EMMCBOOT mode.

Switch around the logic to check the boot mode to determine whether the
eMMC boot mode is expected or MMC/SD boot mode. From there we can look
at the boot mode config if in MMC/SD boot mode to determine whether to
attempt RAW or FS based booting.

This change allows U-Boot to also be successfully booted from RAW
offsets in addition to from a filesystem.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2023-01-10 15:39:06 -05:00
Sjoerd Simons
39248d3260 arm: dts: k3-am625-sk: Enable first ethernet port
The K3 am625 sk EVM has two ethernet ports; Enable the first one for
usage in u-boot.

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
2023-01-10 15:39:06 -05:00
Jim Liu
7ee1c4d1d1 pinctrl: nuvoton: add NPCM7xx/NPCM8xx reset type detect
add reset type detect and persist setting.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2023-01-10 15:39:06 -05:00
Alexey Romanov
311106a1c6 arm/mach-meson: move smc commands in cmd/meson
It is incorrect to keep commands in the arch/ folder.

Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230110105650.54580-3-avromanov@sberdevices.ru
[narmstrong: moved after cmd/sound in index.rst]
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-10 15:27:17 +01:00
Alexey Romanov
12d7827349 asm/arch-meson: add missing meson_sm_write_efuse signature
This function can be used by other modules. Also add comments.

Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20230110105650.54580-2-avromanov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-10 15:25:48 +01:00
Michal Simek
67ac851488 arm64: zynqmp: Remove unused snps,refclk_fladj property
The commit c55ac51a55 ("usb: dwc3: Program GFLADJ") hopefully fixed
issues around fladj logic. This DT property was used in Xilinx stack only
that's why remove because it is not needed anymore.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9bdbd1156b19e28cdebeca29149268b0579a8b6a.1670855257.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Harini Katakam
fd5f2718d3 arm64: zynqmp: Enable TI phy reset via GPIO
Add DT property to support reset of TI PHY connected to GEM.
This is present in RevA DT but needs to be extended RevB/1.0/1.1
versions which are built on top.

Fixes: 2b1db7b18c ("arm64: zynqmp: Wire GEM reset gpio")
Signed-off-by: Harini Katakam <harini.katakam@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7b093616ddea269043cbbb1e3806644d5a4b23be.1670854455.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Harini Katakam
4664a63cc7 arm64: zynqmp: Describe TI phy as ethernet phy ID on ZCU102 RevB & up
TI phy requires a reset before PHY address detection to make sure
correct strapping via MIO is detected. Facilitate the same using
ethernet-phy-id compatible string. GPIO reset entry will be added in
a separate commit.
This support is present in RevA but needs to be extended to RevB/1.0/1.1
versions which are built on top.

Fixes: 13622c7a9d ("arm64: zynqmp: Describe TI phy as ethernet-phy-id")
Signed-off-by: Harini Katakam <harini.katakam@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6d500a83a787316353d4b26c75d1b51d29e3730e.1670854455.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Michal Simek
ef440787da arm64: zynqmp: Remove unused USB DT properties
xlnx,usb-polarity, xlnx,usb-reset-mode and snps,mask_phy_reset are not
documented in dt binding and also there is no code associated with them
that's why remove them.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/369139fafa1745252ef687e31aebf6bcc2080a32.1670853972.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Michal Simek
a30a3ec888 arm64: zynqmp: Remove id from usb node name
There is no reason to have number in usb node name. This is also sync up
patch with upstream kernel.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7b13db34031af88a5738d2ec2e05d2498ea8c869.1670590595.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Michal Simek
b1d3e7fd9a arm64: zynqmp: Align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
It is based on kernel commit (228e8a88b1915a2b467c83d8d0976605f1272fae).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ae23999097553acb21dfca9288a913bb8b24587a.1670590595.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Michal Simek
8dfdb6958b arm64: zynqmp: Fix AMS device tree node
Aligned node description with the Linux kernel. Node has been added by
kernel commit (271c1fa01c2307cf74f4656390d6299991119c3e).

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/74188b64cf615100345d058e026cb0d2de0e089b.1670590595.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Michal Simek
e6a01d5102 arm64: zynqmp: Added GEM reset definitions
The Cadence GEM/MACB driver now utilizes the platform-level reset on the
ZynqMP platform. Add reset definitions to the ZynqMP platform device
tree to allow this to be used.
Linux upstream commit (e461bd6f43f4e568f7436a8b6bc21c4ce6914c36).

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/14e3637735dbc626659e96d142f04a63398362f8.1670590595.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Michal Simek
2a5f7fd30c arm64: zynqmp: Sync #dma-cells property location
Sync property location with Linux kernel done by Linux commit
(1ff2d58e60c8093e9be935b1f191341c0cda957a).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e09ad90ea610a81528ef5ecbc931bc9791b1c653.1670590595.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Tom Rini
cebdfc22da Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-09 11:30:08 -05:00
Heinrich Schuchardt
4bba71ff83 efi_loader: make .data section of *_efi.so files RW
When building with binutils 2.39 warnings

    *_efi.so has a LOAD segment with RWX permissions

occur.

Use SHF_WRITE | SHF_ALLOC as section flags for the .data section.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-01-06 22:27:30 +01:00
Tom Rini
b82f12b642 First set of u-boot-at91 features for the 2023.04 cycle
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Merge tag 'u-boot-at91-2023.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next

First set of u-boot-at91 features for the 2023.04 cycle:

This feature set includes the new DM-based NAND flash driver (old non-DM
driver is still kept for backwards compatibility), and the move to DM
NAND flash driver for sam9x60ek board. Feature set also includes
devicetree alignment for sama7g5 with Linux, devicetree alignment on USB
with Linux for all boards (sama5, sam9x60), chip id for sama7g5, minor
configs and tweaks.
2023-01-06 11:53:26 -05:00
Tom Rini
9ddcdcc03c - stm32mp: Fix board_get_usable_ram_top(): workaround to avoid issue after the
commit 777aaaa706 ("common/memsize.c: Fix get_effective_memsize() to check
   for overflow") because the effective DDR effective size is reduce by 4KiB
   and sometime the board hang on boot
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Merge tag 'u-boot-stm32-20230106' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- stm32mp: Fix board_get_usable_ram_top(): workaround to avoid issue after the
  commit 777aaaa706 ("common/memsize.c: Fix get_effective_memsize() to check
  for overflow") because the effective DDR effective size is reduce by 4KiB
  and sometime the board hang on boot
2023-01-06 08:16:15 -05:00
Adam Ford
edd9c891d2 arm: dts: rz-g2-beacon-u-boot: Fix QSPI Regression
The QSPI is accessed via the RPC-IF, but the compatible flags
previously used a different name.  This compatibel name was changed
which broke the ability to access the QSPI.  Fix this by removing
the custom naming reference.

Fixes: 68083b897b ("renesas: Fix RPC-IF compatible values")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2023-01-06 08:14:19 -05:00
Fabio Estevam
f8548ce0e0 imx7d-pico: Fix the name of the u-boot.dtsi file
Since commit 2f96d4dd95 ("imx7s/d: synchronise device trees with linux")
the imx7d-pico board no longer boots.

The reason is that prior to the above commit there was an explicit
inclusion of arch/arm/dts/imx7d-pico-u-boot.dtsi inside imx7d-pico.dtsi.

After the syncing with the Linux upstream dtsi, this u-boot.dtsi inclusion
is gone and the board fails to boot.

U-Boot uses the imx7d-pico-pi.dtb file, so rename the u-boot.dtsi to
imx7d-pico-pi-u-boot.dtsi which gets included automatically by U-Boot
standard make logic and makes the board boot again.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-01-06 08:14:19 -05:00
Marek Vasut
a2e0b041d6 arm: stm32mp: Fix board_get_usable_ram_top() again
Do not access gd->ram_size and assume this is actual valid RAM size. Since commit
777aaaa706 ("common/memsize.c: Fix get_effective_memsize() to check for overflow")
the RAM size may be less than gd->ram_size , call get_effective_memsize() to get
the limited value instead.

The aforementioned commit makes STM32MP15xx boards with 1 GiB of DRAM
at 0xc0000000 hang on boot, which is a grave defect.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-01-06 11:02:17 +01:00
Cristian Birsan
11c037ab92 ARM: at91: add sama7 SFR definitions
Special Function Registers(SFR) definitions for SAMA7 product family.

Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:06:09 +02:00
Sergiu Moga
e4ad98d67b ARM: dts: sama5d27_wlsom1_ek: Add pinctrl nodes for USB DT nodes
Add the pinctrl nodes required by the USB related DT nodes.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
20bc95f8c8 ARM: dts: sama5d2_icp: Add pinctrl nodes for USB related DT nodes
Add the pinctrl subnodes required by the USB related DT nodes.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
3cd06bfa96 ARM: dts: sama7g5ek: Add pinctrl, gpio and phy properties for USB
Add the required pinctrl, gpio and phy properties required by the
USB DT nodes of the sama7g5ek boards. Since these have not yet been
defined in upstream Linux, place them in the U-Boot specific DT file.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
851960e591 ARM: dts: sama7g5: Add USB and UTMI DT nodes
Define the USB and UTMI DT nodes for the sama7g5 SoC's. Since these have
not yet been defined in upstream Linux, place them in the U-Boot specific
DT file.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-01-05 10:04:57 +02:00
Sergiu Moga
205ecbdccd ARM: dts: sam9x60ek: Add pinctrl and gpio properties for USB
Add the required pinctrl and gpio properties required by the USB DT
nodes of the sam9x60ek boards.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
445ff8bb5a ARM: dts: sam9x60_curiosity: Add pinctrl and gpio properties for USB
Add the required pinctrl and gpio properties needed by the USB DT nodes
of the sam9x60_curiosity boards.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
3631be3ed6 ARM: dts: sam9x60: Add OHCI and EHCI DT nodes
Add the OHCI and EHCI DT nodes for the sam9x60 SoC's.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-01-05 10:04:57 +02:00
Heinrich Schuchardt
d7ddeb66a6 efi_loader: fix building aarch64 EFI binaries
While our EFI binaries execute without problems on EDK II they crash on
a Lenovo X13s. Let our binaries look more like what EDK II produces:

* move all writable data to a .data section
* align sections to 4 KiB boundaries (matching EFI page size)
* remove IMAGE_SCN_LNK_NRELOC_OVFL from .reloc section flags

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-01-04 13:17:42 +01:00
Mihai Sain
ee43b1e744 ARM: dts: at91: sam9x60: add sdhci1 node and pinctrl
Add node for sdhci1 controller and its pinctrl.

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
2023-01-03 10:58:15 +02:00
Stefan Bosch
28663622cf arm: s5p4418: dm_serial: remove old code / add DEBUG_UART
Remove init of UART-clock and UART-reset in arch_cpu_init(). Add DEBUG_UART
to s5p4418_nanopi2_defconfig.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2023-01-02 16:06:08 -05:00