Commit graph

55451 commits

Author SHA1 Message Date
Simon Glass
91d3aa05d0 env: Use tabs in ENV_IS_IN_FAT
Tidy up the formatting of this option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-15 08:18:46 -04:00
Simon Glass
0649cd0d49 Move environment files from common/ to env/
About a quarter of the files in common/ relate to the environment. It
seems better to put these into their own subdirectory and remove the
prefix.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-15 08:18:45 -04:00
Simon Glass
ec74f5f9c3 Makefile: Rename 'env' target to 'environ'
This target stops us using 'env' as a subdirectory. It is not mentioned in
the help so seems to be an internal target. Rename it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-15 08:18:42 -04:00
Jagan Teki
585bf8ae6f sun50i: a64: Add A64-OLinuXino initial support
OLimex A64-OLinuXino is an open-source hardware board
using the Allwinner A64 SOC.

OLimex A64-OLinuXino has
- A64 Quad-core Cortex-A53 64bit
- 1GB or 2GB RAM DDR3L @ 672Mhz
- microSD slot and 4/8/16GB eMMC
- Debug TTL UART
- HDMI
- LCD
- IR receiver
- 5V DC power supply

Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-08-15 11:30:59 +05:30
Jagan Teki
f322657204 sun50i: a64: Add initial NanoPi A64 support
NanoPi A64 is a new board of high performance with low cost
designed by FriendlyElec., using the Allwinner A64 SOC.

Nanopi A64 features
- Allwinner A64, 64-bit Quad-core Cortex-A53@648MHz to 1.152GHz, DVFS
- 1GB DDR3 RAM
- MicroSD
- Gigabit Ethernet (RTL8211E)
- Wi-Fi 802.11b/g/n
- IR receiver
- Audio In/Out
- Video In/Out
- Serial Debug Port
- microUSB 5V 2A DC power-supply

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-08-15 11:30:19 +05:30
Tom Rini
2d3c4ae350 Prepare v2017.09-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-14 20:02:11 -04:00
Tom Rini
88663126a0 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-14 20:00:40 -04:00
Tom Rini
248a3f6c7c Merge git://git.denx.de/u-boot-net 2017-08-14 17:06:58 -04:00
Sam Protsenko
5abc1a4523 common: Move CONFIG_BOOTARGS to Kconfig
Also introduce CONFIG_USE_BOOTARGS option so we can control if
CONFIG_BOOTARGS defined at all.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
[trini: Resync r8a779[56]_ulcb, various ls10xx targets]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-14 17:06:06 -04:00
Prabhakar Kushwaha
a5fe87e829 driver: net: ldpaa: Update priv->phydev after free()
Even after memory free of phydev, priv is still pointing to the
obsolete address.
So update priv->phydev as NULL after memory free.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-14 12:47:33 -05:00
Yuiko Oshino
d2c3197922 usb: net: Add support for Microchip LAN75xx and LAN78xx
Add support for Microchip LAN7500, LAN7800 and LAN7850,
USB to 10/100/1000 Ethernet Controllers.

Signed-off-by: Yuiko Oshino <yuiko.oshino@microchip.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-14 12:47:33 -05:00
Yuiko Oshino
1c1e370033 net: Add mii_resolve_flowctrl_fdx()
Add an mii helper function to resolve flow control status per
IEEE 802.3-2005 table 28B-3.
This function was taken from the Linux source tree.

Signed-off-by: Yuiko Oshino <yuiko.oshino@microchip.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-14 12:47:32 -05:00
Madalin Bucur
3f8f1410b5 net: fman: add support RGMII_TXID to memac
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-14 12:47:32 -05:00
Tom Rini
aa6aaf9321 ARM: rockchip: rock: Correct test to use CONFIG_IS_ENABLED not defined
While it is likely that this entire case is superfluous and can be
removed, correct the test now to match what is in rockchip-common.h and
makes sense based on context of the code.  Otherwise we get a large
number of warnings.

Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-14 13:33:07 -04:00
Tom Rini
c1b62ba9ca Merge branch 'master' of git://git.denx.de/u-boot-rockchip 2017-08-14 10:40:01 -04:00
Patrice Chotard
bc5d038445 stm32f1: remove stm32f1 support
A few years ago STM32F1 SoCs support has been added :
0144caf22c  gpio: stm32: add stm32f1 support
2d18ef2364  ARMv7M: add STM32F1 support

But neither STM32F1 dedicated defconfig nor board was
associated to these commits.

Got confirmation from Tom Rini and Matt Porter to remove
all this code [1]

[1] http://u-boot.10912.n7.nabble.com/Remove-STM32F1-support-td301603.html

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13 15:17:37 -04:00
Chris Packham
7b07a20c5e cmd/bdinfo: correct comment in board_detail
This appears to be a simple typo that dates back to the original
implementation of board_detail in commit e79394643b ("common: Update
cmd_bdinfo for PPC").

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2017-08-13 15:17:37 -04:00
Simon Glass
3a37aee30f test: Move the FIT test into the correct place
Move this test so that it will run when 'make tests' is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-13 15:17:36 -04:00
Simon Glass
77b426703d test: Convert the FIT test to test/py
Convert this test to use the pytest framework.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-13 15:17:36 -04:00
Simon Glass
bde671237f test: Indent test-fit.py to match the next patch
We plan to rewrite this script to use the pytest framework. To make it
easier to review the changes, indent the code to match the next patch.
This gets all of the whitespace changes out of the way.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-13 15:17:36 -04:00
Nishanth Menon
0459bc30b6 ARM: OMAP5: Enable support for AVS0 for OMAP5 production devices
OMAP5432 did go into production with AVS class0 registers which were
mutually exclusive from AVS Class 1.5 registers.

Most OMAP5-uEVM boards use the pre-production Class1.5 which has
production efuse registers set to 0. However on production devices,
these are set to valid data.

scale_vcore logic is already smart enough to detect this and use the
"Nominal voltage" on devices that do not have efuse registers populated.

On a test production device populated as follows:
MPU OPP_NOM:
=> md.l 0x04A0021C4 1
4a0021c4: 03a003e9                               ....
(0x3e9 = 1.01v) vs nom voltage of 1.06v
MPU OPP_HIGH:
=> md.l 0x04A0021C8 1
4a0021c8: 03400485                               ..@.

MM OPP_NOM:
=> md.l 0x04A0021A4 1
4a0021a4: 038003d4                               ....
(0x3d4 = 980mV) vs nom voltage of 1.025v
MM OPP_OD:
=> md.l 0x04A0021A8 1
4a0021a8: 03600403                               ..`.

CORE OPP_NOM:
=> md.l 0x04A0021D8 1
4a0021d8: 000003cf                               ....
(0x3cf = 975mV) vs nom voltage of 1.040v

Since the efuse values are'nt currently used, we do not regress on
existing pre-production samples (they continue to use nominal voltage).

But on boards that do have production samples populated, we can leverage
the optimal voltages necessary for proper operation.

Tested on:
a) 720-2644-001 OMAP5UEVM with production sample.
b) 750-2628-222(A) UEVM5432G-02 with pre-production sample.

Data based on OMAP5432 Technical reference Manual SWPU282AF (May
2012-Revised Aug 2016)

NOTE: All collaterals on OMAP5432 silicon itself seems to have been
removed from ti.com, though EVM details are still available:
http://www.ti.com/tool/OMAP5432-EVM

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-08-13 15:17:35 -04:00
Nishanth Menon
5796b66651 ARM: OMAP5: Remove OPP_LOW Definitions for ES2.0
ES2.0 descopes OPP_LOW definition. So remove it from macros defined.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-08-13 15:17:35 -04:00
Simon Glass
010ad8c34a test: Fix FIT test to pass again
A recent change adjusted a test string so that the test no-longer passes.
Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Heiko Schocher <hs@denx.de>
Fixes: b28c5fcc (test-fit.py: Minor grammar/spelling/clarification tweaks)
2017-08-13 15:17:35 -04:00
Andy Shevchenko
ffdec3000a wdt: Update uclass to make clear that the timeout is in ms
Convert name to show explicitly that we are using milliseconds. For a
watchdog timer this is precise enough.

No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-13 15:17:34 -04:00
Nobuhiro Iwamatsu
160cfc4b5a boot_fit: Change return value from FDT_ERROR to -EINVAL in fdt_offset()
FDT_ERROR is defined as unsigned long. However, since the return value of
fdt_offset() is int, a warning will occur when compiling. Also, it is better
to use -EINVAL than FDT_ERROR.
This fixes this problem by change return value from FDT_ERROR to -EINVAL.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Franklin S Cooper Jr <fcooper@ti.com>
2017-08-13 15:17:34 -04:00
Bin Meng
7088a36598 x86: qemu: Enable NVMe driver
QEMU supports NVMe emulation. Enable the NVMe driver on QEMU x86.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13 15:17:33 -04:00
Bin Meng
beb5f52139 nvme: Handle zero Maximum Data Transfer Size (MDTS)
Maximum Data Transfer Size (MDTS) field indicates the maximum
data transfer size between the host and the controller. The
host should not submit a command that exceeds this transfer
size. The value is in units of the minimum memory page size
and is reported as a power of two (2^n).

The spec also says: a value of 0h indicates no restrictions
on transfer size. On the real NVMe card this is normally not
0 due to hardware restrictions, but with QEMU emulated NVMe
device it reports as 0. In nvme_blk_read/write() below we
have the following algorithm for maximum number of logic
blocks per transfer:

u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift);

dev->max_transfer_shift being 0 will for sure cause lbas to
overflow. Let's use 20. With this fix, the NVMe driver works
on QEMU emulated NVMe device.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13 15:17:33 -04:00
Jon Nettleton
f81d83d534 nvme: Fix number of blocks detection
NVMe should use the nsze value from the queried device. This will
reflect the total number of blocks of the device and fix detecting
my Samsung 960 EVO 256GB.

Original:
Capacity: 40386.6 MB = 39.4 GB (82711872 x 512)

Fixed:
Capacity: 238475.1 MB = 232.8 GB (488397168 x 512)

Signed-off-by: Jon Nettleton <jon@solid-run.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13 15:17:32 -04:00
Jon Nettleton
0deb91318b nvme: Detect devices that are class Storage Express
This adds support to detect the catchall PCI class for NVMe devices.
It allows the drivers to work with most NVMe devices that don't need
specific detection due to quirks etc.

Tested against a Samsung 960 EVO drive.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13 15:17:32 -04:00
Zhikang Zhang
0adc38be3d nvme: Add nvme commands
Add nvme commands in U-Boot command line.

1. "nvme scan" - scan NVMe blk devices
2. "nvme list" - show all available NVMe blk devices
3. "nvme info" - show current or a specific NVMe blk device
4. "nvme device" - show or set current device
5. "nvme part" - print partition table
6. "nvme read" - read data from NVMe blk device
7. "nvme write" - write data to NVMe blk device

Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com>
Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13 15:17:32 -04:00
Zhikang Zhang
f6aa61d599 nvme: Add show routine to print detailed information
This adds nvme_print_info() to show detailed NVMe controller and
namespace information.

Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com>
Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13 15:17:31 -04:00
Zhikang Zhang
982388eaa9 nvme: Add NVM Express driver support
NVM Express (NVMe) is a register level interface that allows host
software to communicate with a non-volatile memory subsystem. This
interface is optimized for enterprise and client solid state drives,
typically attached to the PCI express interface.

This adds a U-Boot driver support of devices that follow the NVMe
standard [1] and supports basic read/write operations.

Tested with a 400GB Intel SSD 750 series NVMe card with controller
id 8086:0953.

[1] http://www.nvmexpress.org/resources/specifications/

Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com>
Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13 15:17:31 -04:00
Zhikang Zhang
ffab6945ec dm: blk: part: Add UCLASS_NVME and IF_TYPE_NVME
This adds a new uclass id and block interface type for NVMe.

Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com>
Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jon Nettleton <jon@solid-run.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13 15:17:30 -04:00
xypron.glpk@gmx.de
1b69ce2fc0 arm: mvebu: ddr3_debug: remove self assignments
Remove superfluous self assignements.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-13 15:17:30 -04:00
xypron.glpk@gmx.de
a21d6363cc arm: mvebu: remove self assignment
Assigning dev_num to itself is superfluous.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-13 15:17:30 -04:00
xypron.glpk@gmx.de
36d35345b1 tpm: add missing va_end
va_start must always be matched by va_end.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13 15:17:29 -04:00
xypron.glpk@gmx.de
2d5e86b110 ARM: hisilicon: hikey: do not rely on random stack value
If CONFIG_MMC_DW is not defined the return value of
init_dwmmc should not rely on a random stack value.

Instead indicate that no error occured.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13 15:17:29 -04:00
xypron.glpk@gmx.de
d1fe19766b stm32: remove redundant 'else if'
The if in the else branch is superfluous.
We can use a simple if.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13 15:17:28 -04:00
xypron.glpk@gmx.de
a22bbfda6e arm: mvebu: avoid possible NULL dereference
It does not make sense to check if info is NULL after
dereferencing it.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-13 15:17:28 -04:00
xypron.glpk@gmx.de
a5981734a4 armv7m: mpu_config add missing break
For DEVICE_NON_SHARED the newly assigned value of attr
is overwritten due to a missing break.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13 15:17:28 -04:00
xypron.glpk@gmx.de
6def7de37b bcm281xx: clock: avoid possible NULL dereference
It does not make sense first to dereference c and then
to check if it is NULL.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13 15:17:27 -04:00
xypron.glpk@gmx.de
65e8ce29e4 arm: bcm235xx: clk_set_rate avoid possible NULL deref
It does not make sense first to dereference c and then
to check if it is NULL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13 15:17:27 -04:00
xypron.glpk@gmx.de
b69a0849e7 arm: bcm235xx: avoid possible NULL dereference
It does not make sense to first dereference c and then
check if it is NULL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13 15:17:26 -04:00
xypron.glpk@gmx.de
9730bcdc2f arm: spear: do not return random value from stack
If the NOR device is not available do not return
a random value from the stack.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13 15:17:26 -04:00
xypron.glpk@gmx.de
5cc9e6b7fa api: remove superfluous assignment
No need to assign a value to sig if the next statement using sig
is itself an assignment of a value to sig.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13 15:17:25 -04:00
Adam Ford
ebb3e43de4 Convert CONFIG_OMAP3_SPI to Kconfig
This converts the following to Kconfig:
   CONFIG_OMAP3_SPI

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Minor comment tweaks]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-13 15:17:10 -04:00
Kever Yang
217273cd44 rockchip: clk: remove RATE_TO_DIV
Use DIV_ROUND_UP instead RATE_TO_DIV for all Rockchip SoC
clock driver.
Add or fix the div-field overflow check at the same time.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13 17:15:09 +02:00
Kever Yang
3a94d75d0e rockchip: clk: update dwmmc clock div
dwmmc controller has default internal divider by 2,
and we always provide double of the clock rate request by
dwmmc controller. Sync code for all Rockchip SoC with:
4055b46 rockchip: clk: rk3288: fix mmc clock setting

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[fixup for 'missing DIV_ROUND_UP' conflict for clk_rk3288.c:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13 17:15:09 +02:00
Kever Yang
95ca100ba7 rockchip: rk322x: update max-frequency for mmc node
mmc using 150000000 as max-frequency like what rk3288 sets.
This can speed up the mmc read/write, the actual mmc clock is:
Before this patch: 37.125M
After this patch: 49.5M

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13 17:15:09 +02:00
Kever Yang
a2a1bfe175 rockchip: dts: rk322x: add sdmmc device node
add node for sdmmc in dts and rk3229-evb.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13 17:15:08 +02:00