-When booting from an epcs controller, the epcs bootrom may leave the
slave select in an asserted state causing soft reset hang. This
patch ensures slave select is negated at reset.
Patch by Scott McNutt, 08 Jun 2006
-Fix asm/io.h macros
-Eliminate use of CACHE_BYPASS in cpu code
-Eliminate assembler warnings
-Fix mini-app stubs and force no small data
Patch by Scott McNutt, 08 Jun 2006
We use the "automatic" mode that was used for the MPC8266ADS and
MPC8272 boards. Eventually this should be used on all boards?]
Patch by Wolfgang Grandegger, 17 Jan 2006
- Add IXP4xx NPE ethernet MAC support
- Add support for Intel IXDPG425 board
- Add support for Prodrive PDNB3 board
- Add IRQ support
Patch by Stefan Roese, 23 May 2006
[This patch does not include cpu/ixp/npe/IxNpeMicrocode.c which still
sufferes from licensing issues. Blame Intel.]
- Fix OMAP support that omap5912osk compiles in current source tree
- Update with code from "http://omap.spectrumdigital.com/osk5912"
to fix problems with DDR initialization
- Fix timer setup
- Use CFI flash driver and support complete 32MB of onboard flash
- Add "print_cpuinfo()" and "checkboard()" functions to display
CPU (with frequency) and Board infos
Patch by Stefan Roese, 10 May 2006
- Removed MPC8349ADS port
- Added PCI support to MPC8349ADS
- reworked memory map to allow mapping of all regions with BATs
Patch by Kumar Gala 20 Apr 2006
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Patch from Scott McNutt 11, Aug 2005
-When booting from an epcs controller, the epcs bootrom may leave the
slave select in an asserted state causing soft reset hang. This
patch ensures slave select is negated at reset.
Patch by Scott McNutt 11, Aug 2005
-Fix asm/io.h macros
-Eliminate use of CACHE_BYPASS in cpu code
-Eliminate assembler warnings
-Fix mini-app stubs and force no small data
relocate ichache_State to ram
u-boot can run from internal flash
Add EB+MCF-EV123 board support.
Add m68k Boards to MAKEALL
Patch from Jens Scharsig, 08 Aug 2005
405 SDRAM: - The SDRAM parameters can now be defined in the board
config file and the 405 SDRAM controller values will
be calculated upon bootup (see PPChameleonEVB).
When those settings are not defined in the board
config file, the register setup will be as it is now,
so this implementation should not break any current
design using this code.
Thanks to Andrea Marson from DAVE for this patch.
440 DDR: - Added function sdram_tr1_set to auto calculate the
TR1 value for the DDR.
- Added ECC support (see p3p440).
Patch by Stefan Roese, 17 Mar 2006
