3 commits

Author	SHA1	Message	Date
Minghuan Lian	388f386583	armv8/layerscape: remove unnecessary function declares ... For the function alloc_stream_ids() append_mmu_masters() and fdt_fixup_smmu_pcie() there are no related definitions and they are never called. So the patch removes the unnecessary declares. Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>	2017-01-18 09:24:51 -08:00
Shaohui Xie	02b5d2ed86	armv8/ls1043aqds: add LS1043AQDS board support ... LS1043AQDS Specification: ------------------------- Memory subsystem: * 2GByte DDR4 DIMM * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 16 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * Two RGMII ports * XFI 10G port * SGMII * QSGMII with 4x 1G ports PCIe: supports Gen 1 and Gen 2 SATA 3.0: one SATA 3.0 port USB 3.0: two micro AB connector and one type A connector UART: supports two UARTs up to 115200 bps for console Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> [York Sun: Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>	2015-11-30 09:11:10 -08:00
Mingkai Hu	9f3183d2d6	armv8/fsl_lsch3: Change arch to fsl-layerscape ... There are two LS series processors are built on ARMv8 Layersacpe architecture currently, LS2085A and LS1043A. They are based on ARMv8 core although use different chassis, so create fsl-layerscape to refactor the common code for the LS series processors which also paves the way for adding LS1043A platform. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>	2015-10-29 10:34:00 -07:00

Renamed from arch/arm/include/asm/arch-fsl-lsch3/fdt.h (Browse further)