Commit graph

168 commits

Author SHA1 Message Date
Rasmus Villemoes
ede2822864 mmc: fsl_esdhc: actually enable cache snooping on mpc830x
The reference manuals for MPC8308 and MPC8309 both say that the
esdhcctl aka DMA Control Register "is implemented as SDHCCR" in the
System configuration registers. Unfortunately, that doesn't mean that
the registers are just mirrors of each other - any write to esdhcctl
is simply ignored. So to actually enable cache snooping, we
unfortunately have to add a little ifdeffery.

There is, naturally, no description of the bit fields of esdhcctl in
the MPC8309 manual, but comparing the description of esdhcctl from the
LS1021A reference manual to the description of the sdhccr in MPC8309,
one also finds that the fields are bit-reversed, so the bit to set is
0x02000000 rather than 0x00000040 - this is also what board_mmc_init()
uses in the two gdsys/mpc8308/ boards.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-02-19 21:21:42 +08:00
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Yangbo Lu
f1bce08426 Drop CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK usage
The eSDHC reference clocks should be provided by speed.c in arch/.
And we do not need CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK option to
select which clock to use. Because we can make the driver to select
the periperhal clock which is better (provides higher frequency)
automatically if its value is provided by speed.c.

This patch is to drop this option and make driver to select clock
automatically. Also fix peripheral clock calculation issue in
fsl_lsch2_speed.c/fsl_lsch3_speed.c.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-01-16 13:20:33 +08:00
Yangbo Lu
7fdcbac5d6 mmc: fsl_esdhc: drop useless fdt fixup
The fdt fixup for properties "peripheral-frequency" and "adapter-type"
was once for a Freescale SDK release. The properties haven't been existed
in linux mainline. Drop these useless code.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-01-16 13:16:24 +08:00
Simon Glass
1eb69ae498 common: Move ARM cache operations out of common.h
These functions are CPU-related and do not use driver model. Move them to
cpu_func.h

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:24:58 -05:00
Yangbo Lu
5e81cbff37 mmc: fsl_esdhc: get clock directly from global data
This patch is to get clock directly from global data.

- Remove uclass clk api method. This was what i.MX platforms were
  using, while QorIQ platforms weren't.
- Get clock only from global data, dropping mxc_get_clock().
  QorIQ eSDHC controllers on one silicon use same reference clock.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-27 16:55:56 +08:00
Yangbo Lu
618704753e mmc: fsl_esdhc: clean up DM and non-DM code
Make DM and non-DM code clear using below structure.
	#if !CONFIG_IS_ENABLED(DM_MMC)
		<non-DM_MMC code>
	#else
		<DM_MMC code>
	#endif

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-11-05 11:21:25 +08:00
Yangbo Lu
0cc127c424 mmc: fsl_esdhc: always check write protect state
The QorIQ eSDHC on all platforms supports checking write protect
state through register bit. So check it always.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-11-05 11:21:25 +08:00
Yangbo Lu
08197cb8df mmc: fsl_esdhc: drop redundant code for non-removable feature
Drop redundant code for non-removable feature. "non-removable" property
has been read in mmc_of_parse().

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-11-05 11:21:25 +08:00
Yangbo Lu
5705973b09 mmc: fsl_esdhc: convert to use fsl_esdhc_get_cfg_common()
The fsl_esdhc_init() was actually to get configuration of mmc_config.
So rename it to fsl_esdhc_get_cfg_common() and make it common for both
DM_MMC and non-DM_MMC.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-11-05 11:21:25 +08:00
Yangbo Lu
07bae1de38 mmc: fsl_esdhc: clean up bus width configuration code
This patch is to clean up bus width setting code.

- For DM_MMC, remove getting "bus-width" from device tree.
  This has been done in mmc_of_parse().

- For non-DM_MMC, move bus width configuration from fsl_esdhc_init()
  to fsl_esdhc_initialize() which is non-DM_MMC specific.
  And fix up bus width configuration to support only 1-bit, 4-bit,
  or 8-bit. Keep using 8-bit if it's not set because many platforms
  use driver without providing max bus width.

- Remove bus_width member from fsl_esdhc_priv structure.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-11-05 11:21:24 +08:00
Yangbo Lu
5b05fc0310 mmc: fsl_esdhc: fix voltage validation
Voltage validation should be done by CMD8. Current comparison between
mmc_cfg voltages and host voltage capabilities is meaningless.
So drop current comparison and let voltage validation is through CMD8.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-11-05 11:21:24 +08:00
Yangbo Lu
531ccd407c mmc: fsl_esdhc: drop controller initialization in fsl_esdhc_init()
Controller initialization is not needed in fsl_esdhc_init().
It will be done in esdhc_init() for non-DM_MMC, and in
esdhc_init_common() in probe for DM_MMC.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-11-05 11:21:24 +08:00
Yangbo Lu
5d336d1701 mmc: fsl_esdhc: drop i.MX DDR support code
A previous patch below adding DDR mode support was actually for i.MX
platforms. Now i.MX eSDHC driver is fsl_esdhc_imx.c. For QorIQ eSDHC,
it uses different process for DDR mode, and hasn't been supported.
Let's drop DDR support code for i.MX in fsl_esdhc driver.

0e1bf61 mmc: fsl_esdhc: Add support for DDR mode

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-10-29 10:09:22 +08:00
Yangbo Lu
2913926f3b mmc: fsl_esdhc: remove redundant DM_MMC checking
Remove redundant DM_MMC checking which is already in DM_MMC conditional
compile block.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-10-29 10:09:21 +08:00
Yangbo Lu
41dec2fe99 mmc: fsl_esdhc: make BLK as hard requirement of DM_MMC
U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already
support it, so let's force to use it.

- Drop non-BLK support for DM_MMC introduced by below patch.
  66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled

- Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC).

- Use DM_MMC instead of BLK for conditional compile.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-10-29 10:09:21 +08:00
Yinbo Zhu
6f883e501b mmc: fsl_esdhc: Add emmc hs200 support
Add eMMC hs200 mode for ls1028a, ls1012a, lx2160a.
This increases eMMC performance.
Tuning procedure is currently not supported.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:05:38 +05:30
Yangbo Lu
4d8ff42e46 mmc: fsl_esdhc: drop i.MX code
Dropped i.MX code which couldn't be reused.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
2019-06-23 14:18:42 +08:00
Yangbo Lu
66fa035b55 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled
u-boot is trying to make CONFIG_BLK as a hard requirement
for DM_MMC. But now it's still not.

config BLK
	bool "Support block devices"
	depends on DM
	default y if DM_MMC

When fsl_esdhc driver was reworked for DM_MMC support, DM_MMC
without CONFIG_BLK enabled wasn't considered. This patch is to
fix probe issue without CONFIG_BLK enabled.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:56 +05:30
Yinbo Zhu
b69e1d0bc7 driver: mmc: adopt 32 bit addr in fsl_esdhc for CONFIG_PPC
PowerPC supports 32 bit address.
So adopt 32 bit addr in fsl_esdhc for CONFIG_PPC.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-23 14:22:33 +05:30
Yinbo Zhu
b512d07e8c driver: mmc: set sdhc clock in fsl_esdhc for CONFIG_PPC
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-23 14:22:33 +05:30
Lukasz Majewski
b6a0427554 Revert "mmc: fsl_esdhc: fix sd/mmc ddr mode clock setting issue"
This reverts commit 72a89e0da5, which
causes the imx53 HSC to hang as the eMMC is not working properly anymore.

The exact error message:
MMC write: dev # 0, block # 2, count 927 ... mmc write failed
0 blocks written: ERROR

imx53 is not using the DDR mode.

Debugging of pre_div and div generation showed that those values are
generated in a way, which is not matching the ones from working setup.

As the original patch was performing code refactoring, let's revert this
change, so all imx53 boards would work again.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-05-20 11:34:27 +08:00
Ye Li
da8e1f3cd4 mmc: fsl_esdhc: Fix wp_enable issue
The wp-gpios property is used for gpio, if this is set, the WP pin is muxed
to gpio function, can't be used as internal WP checking. However the codes
remain to use internal WP checking.

This patch changes to examine the "fsl,wp-controller" for enabling internal WP
checking, and "wp-gpios" for muxing to gpio.

Signed-off-by: Ye Li <ye.li@nxp.com>
2019-05-03 20:04:30 +08:00
Ye Li
72a89e0da5 mmc: fsl_esdhc: fix sd/mmc ddr mode clock setting issue
When sd/mmc work at DDR mode, like HS400/HS400ES/DDR52/DDR50 mode,
the output clock rate is half of the internal clock rate.

This patch set the DDR_EN bit first for DDR mode, hardware divide
the usdhc clock automatically, then follow the original sdr clock
setting method.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
2019-05-03 20:03:41 +08:00
Abel Vesa
d76706c89a mmc: fsl_esdhc: Fix DM_REGULATOR ifdefs for SPL builds
Since the fsl_esdhc will also be used by SPL, make the
preprocessor switches more generic to allow any kind of build.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-02-15 22:01:15 +01:00
Tom Rini
748ad078ee For 2019.04
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Merge tag 'u-boot-imx-20190129' of git://git.denx.de/u-boot-imx

For 2019.04
2019-01-30 07:22:12 -05:00
Patrick Bruenn
791c88da31 mmc: fsl_esdhc: add compatible for fsl, imx53-esdhc
Add compatible "fsl,imx53-esdhc" to keep mmc working on i.MX53 platforms
with CONFIG_DM_MMC=y

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2019-01-28 20:55:46 +01:00
Angelo Dureghello
1f15cb8f5b drivers: esdhc: add support for ColdFire mcf5441x family
This patch has been tested on the mcf54415-based stmark2
board. The eSDHC driver works reliably using DMA mode.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2019-01-26 08:13:56 -05:00
Yinbo Zhu
7a0425dd96 mmc: fsl_esdhc: make get_cd work well in dm_mmc_ops
This patch is to make get_cd work well when DM_MMC enabled

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17 13:17:10 -08:00
Fabio Estevam
29c2edb42b mmc: fsl_esdhc: Avoid infinite loop in esdhc_send_cmd_common()
The following hang is observed on a Hummingboard 2 MicroSOM
i2eX iMX6D - rev 1.3 with no eMMC populated on board:

U-Boot SPL 2018.11+gf6206f8587 (Nov 16 2018 - 00:56:34 +0000)
Trying to boot from MMC1

U-Boot 2018.11+gf6206f8587 (Nov 16 2018 - 00:56:34 +0000)

CPU:   Freescale i.MX6D rev1.5 996 MHz (running at 792 MHz)
CPU:   Extended Commercial temperature grade (-20C to 105C) at 33C
Reset cause: POR
Board: MX6 HummingBoard2
DRAM:  1 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... *** Warning - bad CRC, using default environment

No panel detected: default to HDMI
Display: HDMI (1024x768)
In:    serial
Out:   serial
Err:   serial
---> hangs

which is caused by the following infinite loop inside esdhc_send_cmd_common()

	while (!(esdhc_read32(&regs->irqstat) & flags))
		;

Instead of looping forever, provide an exit path so that a timeout
error can be propagated in the case irqstat does not report
any interrupts, which may happen when no eMMC is populated on
board.

Reported-by: Ricardo Salveti <rsalveti@rsalveti.net>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Ricardo Salveti <rsalveti@rsalveti.net>
2019-01-14 11:26:12 -05:00
Peng Fan
cd357ad112 imx: rename mx8m,MX8M to imx8m,IMX8M
Rename mx8m,MX8M to imx8m,IMX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jon Nettleton <jon@solid-run.com>
2019-01-01 14:12:18 +01:00
Peng Fan
3cb1450380 mmc: fsl_esdhc: add uclass clk support
When CONIFG_CLK is enabled, use uclass clk api to handle
the clock.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-22 13:00:09 +02:00
Ye Li
d423c93b66 fsl_esdhc: Update usdhc driver to support i.MX8
Add CONFIG_ARCH_IMX8 to use the 64bits support in usdhc driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2018-10-22 13:00:09 +02:00
Peng Fan
c76382ff7f mmc: fsl_esdhc: enable HS400 feature
The strobe dll code is ported from Linux Kernel:
drivers/mmc/host/sdhci-esdhc-imx.c
The comments are from the above file,
"For HS400 eMMC, there is a data_strobe line. This signal is generated
by the device and used for data output and CRC status response output
in HS400 mode. The frequency of this signal follows the frequency of
CLK generated by host. The host receives the data which is aligned to the
edge of data_strobe line. Due to the time delay between CLK line and
data_strobe line, if the delay time is larger than one clock cycle,
then CLK and data_strobe line will be misaligned, read error shows up.
So when the CLK is higher than 100MHz, each clock cycle is short enough,
host should configure the delay target. "

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2018-09-10 20:48:19 -04:00
Jaehoon Chung
6511718254 mmc: add the MMC_CLK_ENABLE/DISABLE macro in mmc.h
mmc_set_clock() function has the disable argument as bool type.
When mmc_set_clock is called, it might be passed to "true" or "false".
But it's too confusion whether clock is enabled or disabled with only
"true" and "false".
To prevent the confusion, replace to MMC_CLK_ENABLE/DISABLE macro from
true/false.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08 13:12:33 +09:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Peng Fan
51313b49f2 mmc: fsl_esdhc: support SDR104 and HS200
Introduce SDR104 and HS200 support
The implementation takes linux kernel sdhci.c and sdhci-esdhc-imx.c
as reference.
 - Implement esdhc_change_pinstate to dynamically change pad settings
 - Implement esdhc_set_timing
 - Implement esdhc_set_voltage to switch voltage
 - Implement fsl_esdhc_execute_tuning to execute time process
 - Enlarge the cfg->f_max to 200MHz.
 - Parse fsl,tuning-step, fsl,tuning-start-tap and
   fsl,strobe-dll-delay-target from device tree.
 - Parse no-1-8-v property
 - Introduce esdhc_soc_data to indicate the flags and caps

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04 12:00:58 +01:00
Peng Fan
59d3782cda mmc: fsl_esdhc: add strobe and tuning entry
Add entries that will be used for tuning control.
The whole layout not changed, just expand reserved3[84] and
rename other reservedx in sequence.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04 12:00:58 +01:00
Peng Fan
eec2d43795 mmc: fsl_esdhc: support i.MX8M
Support i.MX8M in fsl esdhc driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Benoît Thébaudeau
b9b4f146c9 mmc: fsl_esdhc: Fix i.MX53 eSDHCv3 clock
Commit 4f425280fa ("mmc: fsl_esdhc: Allow all supported prescaler
values") made it possible to set SYSCTL.SDCLKFS to 0 in SDR mode on
i.MX, thus bypassing the SD clock frequency prescaler, in order to be
able to get higher SD clock frequencies in some contexts. However, that
commit missed the fact that this value is illegal on the eSDHCv3
instance of the i.MX53. This seems to be the only exception on i.MX,
this value being legal even for the eSDHCv2 instances of the i.MX53.

Fix this issue by changing the minimum prescaler value for the single
instance of the i.MX53 eSDHCv3 controller.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-22 14:17:13 +09:00
Peng Fan
db359efd59 mmc: fsl_esdhc: Fix eMMC 1.8v setting issue
Current USDHC driver will reset VSELECT to 0 (3.3v) during mmc init,
then set to 1 for 1.8v eMMC I/O. When booting from eMMC, since ROM has
already set VSELECT to 1.8v before running the u-boot. This reset in
USDHC driver causes a short 2.2v pulse on CMD pin.

Fix this issue by not reset VSELECT to 0 when 1.8v flag is set.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-13 00:08:44 +09:00
Kishon Vijay Abraham I
35f6782055 mmc: add a new mmc parameter to disable mmc clock
mmc clock has to be disabled in certain cases like during
the voltage switch sequence. Modify mmc_set_clock function
to take disable as an argument that signifies if the
clock has to be enabled or disabled.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Benoît Thébaudeau
bcfb365375 mmc: fsl_esdhc: Fix PIO timeout
The following error has been observed on i.MX25 with a high-speed SDSC
card:
    Data Write Failed in PIO Mode.

It was caused by the timeout set on PRSSTAT.BWEN, which was triggered
because this bit takes 15 ms to be set after writing the first block to
DATPORT with this card. Without this timeout, all the blocks are
properly written.

This timeout was implemented by decrementing a variable, so it was
depending on the CPU frequency. Fix this issue by setting this timeout
to a long enough absolute duration (500 ms).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-11-07 10:26:27 +01:00
Simon Glass
e7881d85a9 dm: mmc: Drop CONFIG_DM_MMC_OPS
All boards which use DM_MMC have now been converted to use DM_MMC_OPS.
Drop the option and good riddance.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:59:55 +09:00
Simon Glass
5248930ebf dm: imx: cm_fx6: Enable more driver model support
Enable driver model for MMC (including BLK), SATA and USB. Note that USB
does not yet work correctly since the nodes are disabled. Hopefully this
can be resolved by the maintainer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:17 +09:00
Simon Glass
653282b567 dm: mmc: fsl_esdhc: Update to support MMC operations
This driver does not currently support CONFIG_DM_MMC_OPS. Update it to
fully convert it to driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:17 +09:00
Simon Glass
4aac33f510 dm: mmc: fsl_esdhc: Update to support livetree
Update this driver to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:17 +09:00
Simon Glass
d6eb25e987 dm: mmc: fsl_esdhc: Drop mmc_init() call from fsl_esdhc_init()
We want to use fsl_esdhc_init() with driver model. Move the mmc_init() out
of this function so that we can use it for our common init.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:17 +09:00
Simon Glass
e88e1d9c04 dm: mmc: fsl_esdhc: Set up platform data
With driver model we want to store the mmc and configuration structure in
platform data. Set up structure up and use it for non-DM as well.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:17 +09:00
Simon Glass
201e828b22 dm: mmc: fsl_esdhc: Detect init failure
Since esdhc_init_common() can fail it should return an error code. Update
this and also adjust the timeout mechanism to use get_timer(), which is a
more common approach.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:17 +09:00