Commit graph

6369 commits

Author SHA1 Message Date
Masahiro Yamada
3756fe2a2c ARM: uniphier: remove IECTRL setup code of LD4 SoC
This should be handled by the pinctrl driver.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-14 22:54:19 +09:00
Masahiro Yamada
14f4723466 mmc: uniphier-sd: migrate to CONFIG_BLK
This is the state-of-the-art MMC driver implementation.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-14 22:54:19 +09:00
Masahiro Yamada
025b62f303 ARM: uniphier: delete unnecessary xHCI pin-mux settings
These ad-hoc pinmux settings were used for the legacy xHCI driver,
which has gone now.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-14 22:54:19 +09:00
Masahiro Yamada
47a79f657e usb: uniphier: remove UniPhier xHCI driver and select DM_USB
This driver has not been converted to Driver Model, and it is an
obstacle to migrate other block device drivers.  Remove it for now.

The UniPhier SoCs already use a DM-based EHCI driver, so now
ARCH_UNIPHIER can select DM_USB.

These two changes must be done atomically because removing the
legacy driver causes a build error.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2016-09-14 22:54:19 +09:00
Masahiro Yamada
b5550e496e ARM: uniphier: sort select:s alphabetically
ARCH_UNIPHIER is having more and more select:s.  Sort them in case
a select is accidentally duplicated.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-14 22:54:19 +09:00
Tom Rini
16f416661e Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2016-09-09 09:45:32 -04:00
Masahiro Yamada
174245b909 ARM: am335x: select DM_GPIO
We are supposed to not add config entries with only "default y"
in board/SoC Kconfig files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
2016-09-07 08:48:58 -04:00
Masahiro Yamada
1544698816 ARM: armv7: move ARMV7_PSCI_NR_CPUS to Kconfig
Move this option to Kconfig and set its default value to 4; this
increases the number of supported CPUs for some boards.

It consumes 1KB memory per CPU for PSCI stack, but it should not
be a big deal, given the amount of memory used for the modern OSes.

Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-07 08:48:54 -04:00
Masahiro Yamada
217f92bb79 ARM: armv7: move CONFIG_ARMV7_PSCI to Kconfig
Add ARCH_SUPPORT_PSCI as a non-configurable option that platforms
can select.  Then, move CONFIG_ARMV7_PSCI, which is automatically
enabled if both ARMV7_NONSEC and ARCH_SUPPORT_PSCI are enabled.

Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-07 08:48:51 -04:00
Masahiro Yamada
5a3aae68c7 ARM: armv7: guard memory reserve for PSCI with #ifdef CONFIG_ARMV7_PSCI
If CONFIG_ARMV7_NONSEC is enabled, the linker script requires
CONFIG_ARMV7_PSCI_NR_CPUS regardless of CONFIG_ARMV7_PSCI.

Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-07 08:48:46 -04:00
Masahiro Yamada
55a65e6187 ARM: tegra: remove wrong dependency on SPL_BUILD
SPL_BUILD is not a CONFIG in Kconfig, so !SPL_BUILD is always true.

Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-07 08:47:40 -04:00
Tom Rini
fa2f81b06f TI: Rework SRAM definitions and maximums
On all TI platforms the ROM defines a "downloaded image" area at or near
the start of SRAM which is followed by a reserved area.  As it is at
best bad form and at worst possibly harmful in corner cases to write in
this reserved area, we stop doing that by adding in the define
NON_SECURE_SRAM_IMG_END to say where the end of the downloaded image
area is and make SRAM_SCRATCH_SPACE_ADDR be one kilobyte before this.
At current we define the end of scratch space at 0x228 bytes past the
start of scratch space this this gives us a lot of room to grow.  As
these scratch uses are non-optional today, all targets are modified to
respect this boundary.

Tested on OMAP4 Pandaboard, OMAP3 Beagle xM

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Nagendra T S <nagendra@mistralsolutions.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Paul Kocialkowski <contact@paulk.fr>
Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Cc: Adam Ford <aford173@gmail.com>
Cc: Steve Sakoman <sakoman@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Thomas Weber <weber@corscience.de>
Cc: Hannes Schmelzer <oe5hpm@oevsv.at>
Cc: Thomas Chou <thomas@wytron.com.tw>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Sam Protsenko <semen.protsenko@linaro.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Samuel Egli <samuel.egli@siemens.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Cc: Ben Whitten <ben.whitten@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: "B, Ravi" <ravibabu@ti.com>
Cc: "Matwey V. Kornilov" <matwey.kornilov@gmail.com>
Cc: Ladislav Michl <ladis@linux-mips.org>
Cc: Ash Charles <ashcharles@gmail.com>
Cc: "Kipisz, Steven" <s-kipisz2@ti.com>
Cc: Daniel Allred <d-allred@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Ladislav Michl <ladis@linux-mips.org>
2016-09-06 13:41:42 -04:00
Beniamino Galvani
cfe255611c meson: odroid-c2: enable Ethernet support through the device tree
Remove the device definition from board file, update the driver with
the new compatible property and update config with necessary options.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-06 13:18:19 -04:00
Beniamino Galvani
dd83840e5e arm: dts: update DTS files for meson-gxbb and odroid-c2
Import DTS files and dt-bindings includes from Linux 4.8-rc1.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-06 13:18:19 -04:00
Alexander Graf
04a993fe11 bcm2835_gpio: Implement GPIOF_FUNC
So far we could only tell the gpio framework that a GPIO was mapped as input or
output, not as alternative function.

This patch adds support for determining whether a function is mapped as
alternative.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2016-09-06 13:18:18 -04:00
Fabio Estevam
edf0093732 mx6: ddr: Allow changing REFSEL and REFR fields
Currently MX6 SPL DDR initialization hardcodes the REF_SEL and
REFR fields of the MDREF register as 1 and 7, respectively for
DDR3 and 0 and 3 for LPDDR2.

Looking at the MDREF initialization done via DCD we see that
boards do need to initialize these fields differently:

$ git grep 0x021b0020 board/
board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4      0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800
board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800

So introduce a mechanism for users to be able to configure
REFSEL and REFR fields as needed.

Keep all the mx6 SPL users in their current REF_SEL and REFR values,
so no functional changes for the existing users.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
2016-09-06 18:22:48 +02:00
Akshay Bhat
ff3832205e arm: imx: Add support for Advantech DMS-BA16 board
Add support for Advantech DMS-BA16 board. The board is based on Advantech
BA16 module which has a i.MX6D processor. The board supports:
 - FEC Ethernet
 - USB Ports
 - SDHC and MMC boot
 - SPI NOR
 - LVDS and HDMI display

Basic information about the module:
 - Module manufacturer: Advantech
 - CPU: Freescale ARM Cortex-A9 i.MX6D
 - SPECS:
     Up to 2GB Onboard DDR3 Memory;
     Up to 16GB Onboard eMMC NAND Flash
     Supports OpenGL ES 2.0 and OpenVG 1.1
     HDMI, 24-bit LVDS
     1x UART, 2x I2C, 8x GPIO,
     4x Host USB 2.0 port, 1x USB OTG port,
     1x micro SD (SDHC),1x SDIO, 1x SATA II,
     1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: u-boot@lists.denx.de
Cc: sbabic@denx.de
2016-09-06 18:22:48 +02:00
Tom Rini
c0afcb5889 Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2016-09-06 11:28:42 -04:00
Mugunthan V N
0068dd687d ARM: dts: dra72-evm: fix broken ethernet
With commit ceec08f50b, phy is connected to slave 0, but
changing the phy node was missed, fix it by populating the
phy node to proper cpsw slave node.

Fixes: ceec08f50b ("ARM: dts: dra72-evm: Add mode-gpios entry for mac node")
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Vignesh R <vigneshr@ti.com>
Tested-by: Tom Rini <trini@konsulko.com>
2016-09-06 11:28:27 -04:00
Hans de Goede
de300ea5db sunxi: Add defconfig and dts file for the Orange Pi Plus2E SBC
The Orange Pi Plus2E is an extended version of the Orange Pi Pc Plus,
with 2G RAM and an external gbit ethernet phy.

The dts file is identical to the one submitted to the upstream kernel,
except that it has the pending patch to enable the ethernet controller
squashed in, as u-boot already has sun8i-emac support.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-09-03 13:05:43 +02:00
Hans de Goede
019731a88f sunxi: Sync h3-orangepi dts files with kernel
This adds an emac node to the orangepi-2 dts (not yet merged upstream,
but in u-boot we already have emac support); fixes the alphetically
sorting of nodes in sun8i-h3-orangepi-plus.dts and disables some
usb controllers in sun8i-h3-orangepi-plus.dts which are only used
on the plus2e, as upstream has decided to do a separate dts files
for the plus2e.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-09-03 10:57:00 +02:00
Chen-Yu Tsai
68871efe1d sunxi: Fix H3 EMAC syscon register address
The sun8i-emac driver follows an old version of the proposed DT
bindings, where the EMAC clock and EPHY control register range is
listed directly, rather than through a syscon phandle.

Add back the syscon register range to avoid an invalid data access.
We should fix the driver once the Linux kernel bindings have been
finalized.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-09-03 10:33:54 +02:00
Stefan Mavrodiev
ca5c37026b sunxi: Add support for A33-OLinuXino board
A33-OLinuXino is A33 development board designed by Olimex LTD.

It has AXP223 PMU, 1GB DRAM, a micro SD card, one USB-OTG connector,
headphone and mic jacks, connector for LiPo battery and optional
4GB NAND Flash.

It has two 40-pin headers. One for LCD panel, and one for
additional modules. Also there is CSI/DSI connector.

The dts files are identical to the ones submitted to the upstream kernel.

Signed-off-by: Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-09-03 10:33:44 +02:00
Icenowy Zheng
8e71a7ebdc sunxi: add proper device tree for iNet D978 rev2 boards
Add a proper dts for the iNet D978 rev2 based A33 tablets.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-09-03 10:04:15 +02:00
Peter Chubb
b615267633 ARM: tegra: Add support for TK1-SOM board from Colorado Engineering
The Colorado TK1 SOM is a small form factor board similar to the
Jetson TK1.  The main differences lie in the pinmux, and in that the
PCIe controller is set to use in 4lanes+1lane, rather than 2+2.

The pinmux header here was generated from a spreadsheet provided by
Colorado Engineering using the tegra-pinmux scripts.  The spreadsheet
was converted from v09 to v11 by me.

Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-01 09:24:30 -07:00
Stephen Warren
7932d3e4a7 ARM: tegra: use numeric versioning for p2771-0000
The board ID EEPROM and board ID stickers on p2771-0000 will use a numeric
versioning scheme, with version numbers such as 000/100/200/300/400/500.
Within NVIDIA, these versions are also known as A00/A01/A02/A03/A04/B00.
However, that numbering scheme is not easily visible outside of NVIDIA,
and so does not make much sense to use. Convert U-Boot to use the readily
visible numeric scheme.

Also, it turns out that the current A02 DT actually applies to board
versions 000/100/200 (A00..A02). Consequently rename this to 000 not 200
so that all U-Boot builds are named after the first version of the HW they
support.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-30 11:14:53 -07:00
Tom Rini
ff62bdfbd5 Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2016-08-28 10:36:20 -04:00
Masahiro Yamada
f0633533d5 ARM: dts: uniphier: add u-boot, dm-pre-reloc to use eMMC boot on sLD3
The eMMC on sLD3 is assigned with dedicated pins (only multiplexed
with GPIO), so it shouldn't hurt to enable eMMC on SPL all the time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 13:11:34 +09:00
Masahiro Yamada
499c8679be ARM: uniphier: display revision of Micro Support Card 3.6.x kindly
The revision of the original support card (rev 3.5, rev 3.6) fits in
the 8 bit width revision register.  When it was extended in a weird
way, it was versioned in the format of "3.6.x" (where it should have
been "3.7", of course).  What is worse, only the sub-level version
"6.x" was recorded in the 8 bit width register, completely ignoring
the compatibility of the revision register format.

This patch saves madly-versioned support cards by assuming the major
version "3" when the MSB 4 bit of the register is read as "6".  With
this, the support card revision that were displayed as "6.10" is now
corrected to "3.6.10".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 13:11:31 +09:00
Masahiro Yamada
928f3248b3 ARM: uniphier: support system reset functionality for PSCI
This supports the system reset via PSCI for ARMv7 SoCs.

Because the system reset is not supported on PSCI 0.1, let's define
CONFIG_ARMV7_PSCI_1_0. (it is supported since PSCI 0.2, but there
is no CONFIG to enable it in U-Boot for now.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 13:09:19 +09:00
Tom Rini
c6b968da78 Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2016-08-26 17:05:01 -04:00
Masahiro Yamada
c21fc7e223 treewide: fix "followings" to "following"
Most of them are my mistakes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-26 17:04:58 -04:00
Stefan Agner
8f894a4d38 arm: cache: always flush cache line size for page table
The page table is maintained by the CPU, hence it is safe to always
align cache flush to a whole cache line size. This allows to use
mmu_page_table_flush for a single page table, e.g. when configure
only small regions through mmu_set_region_dcache_behaviour.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2016-08-26 17:04:56 -04:00
Stefan Agner
c5b3cabf4a arm: cache: add support for LPAE for region D$ behavior
Add LPAE support for mmu_set_region_dcache_behaviour. The function
is in use in some LPAE capable board such TI DRA7xx or NXP i.MX 7.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2016-08-26 17:04:56 -04:00
Tom Rini
e009bfa4f9 arch/arm/Kconfig: Whitespace correction
Use a tab not 8 spaces.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-08-26 17:04:55 -04:00
Tom Rini
067716bac5 ARM: Move SYS_CACHELINE_SIZE over to Kconfig
This series moves the CONFIG_SYS_CACHELINE_SIZE.  First, in nearly all
cases we are mirroring the values used by the Linux Kernel here.  Also,
so long as (and in this case, it is true) we implement flushes in hunks
that are no larger than the smallest implementation (and given that we
mirror the Linux Kernel, again we are fine) it is OK to align higher.
The biggest changes here are that we always use 64 bytes for CPU_V7 even
if for example the underlying core is only 32 bytes (this mirrors
Linux).  Second, we say ARM64 uses 64 bytes not 128 (as found in the
Linux Kernel) as we do not need multi-platform support (to this degree)
and only the Cavium ThunderX 88xx series has a use for such large
alignment.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Stefan Roese <sr@denx.de>
Cc: Nagendra T S <nagendra@mistralsolutions.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Steve Rae <steve.rae@raedomain.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Heiko Schocher <hs@denx.de>
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Cc: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Paul Kocialkowski <contact@paulk.fr>
Cc: Anatolij Gustschin <agust@denx.de>
Acked-by: "Pali Rohár" <pali.rohar@gmail.com>
Cc: Adam Ford <aford173@gmail.com>
Cc: Steve Sakoman <sakoman@gmail.com>
Cc: Grazvydas Ignotas <notasas@gmail.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Robert Baldyga <r.baldyga@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Thomas Weber <weber@corscience.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: David Feng <fenghua@phytium.com.cn>
Cc: Alison Wang <b18965@freescale.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: York Sun <york.sun@nxp.com>
Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Aneesh Bansal <aneesh.bansal@freescale.com>
Cc: Saksham Jain <saksham.jain@nxp.com>
Cc: Qianyu Gong <qianyu.gong@nxp.com>
Cc: Wang Dongsheng <dongsheng.wang@nxp.com>
Cc: Alex Porosanu <alexandru.porosanu@freescale.com>
Cc: Hongbo Zhang <hongbo.zhang@nxp.com>
Cc: tang yuantian <Yuantian.Tang@freescale.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Josh Wu <josh.wu@atmel.com>
Cc: Bo Shen <voice.shen@atmel.com>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Hannes Schmelzer <oe5hpm@oevsv.at>
Cc: Thomas Chou <thomas@wytron.com.tw>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Sam Protsenko <semen.protsenko@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Christophe Ricard <christophe-h.ricard@st.com>
Cc: Anand Moon <linux.amoon@gmail.com>
Cc: Beniamino Galvani <b.galvani@gmail.com>
Cc: Carlo Caione <carlo@endlessm.com>
Cc: huang lin <hl@rock-chips.com>
Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Cc: Xu Ziyuan <xzy.xu@rock-chips.com>
Cc: "jk.kernel@gmail.com" <jk.kernel@gmail.com>
Cc: "Ariel D'Alessandro" <ariel@vanguardiasur.com.ar>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Samuel Egli <samuel.egli@siemens.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Bernhard Nortmann <bernhard.nortmann@web.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Ben Whitten <ben.whitten@gmail.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: "Andrew F. Davis" <afd@ti.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Carlos Hernandez <ceh@ti.com>
Cc: Ladislav Michl <ladis@linux-mips.org>
Cc: Ash Charles <ashcharles@gmail.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Daniel Allred <d-allred@ti.com>
Cc: Gong Qianyu <Qianyu.Gong@freescale.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Chin Liang See <clsee@altera.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Paul Kocialkowski <contact@paulk.fr>
2016-08-26 17:04:46 -04:00
Jens Kuske
d5ac6eef91 sunxi: Tune H3 DRAM PLL to improve lock time
The H3 PLL5 used for DRAM barely manages to lock to the required
frequency before DRAM controller starts, sometimes leading to wrong
delay-line calibration results.
This patch changes the PLL tuning parameters to the same values as
boot0 used, which speeds up the locking and fixes the problem.

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-08-26 16:58:37 +02:00
Hans de Goede
421c98d7d2 sunxi: display: Use PWM to drive backlight where applicable
When the backlight's pwm input is connected to a pwm output of the SoC,
actually use pwm to drive the backlight.

The mean reason for doing this is to fix the backlight turning off
for aprox. 1 second while the kernel is booting. This is caused by
the kernel actually using pwm to drive the backlight, so that it
can dim the backlight. First the pwm driver loads and switches the
pinmux for the pin driving the backlight's pwm input to the pwm
controller. Then about 1s later the actual backlight driver loads
and tells the pwm driver to actually update the pwm settings, which
have a power-on-reset value of "off".

An additional advantage is that this allows us to initatiate the
backlight at 80%, which is the kernel default, avoiding a brightness
change while the kernel loads.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed by: Peter Korsgaard <peter@korsgaard.com>
2016-08-26 16:58:37 +02:00
Hans de Goede
8d463c5a32 sun5i: Add defconfig and dts file for the Empire Electronix M712 tablet
Add a defconfig and dts file for the Empire Electronix M712 tablet, this
is a 7" A13 tablet, with micro-usb (otg), headphone and micro-sd slots on
the outside. It uses a Goodix gt811 touchscreen controller, a RTL8188CTV
wifi chip and a DMART06 (1238a4) accelerometer.

The dts file is identical to the one submitted to the upstream kernel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-08-26 16:58:36 +02:00
Hans de Goede
860fbdd41f sunxi: Sync dts files with upstream kernel
Sync dts files with the current (Aug 18th 2016) state of Maxime's
linux/sunxi/for-next repo.

Note this commit also updates configs/MSI_Primo81_defconfig,
adding: "# CONFIG_REQUIRE_SERIAL_CONSOLE is not set", this is necessary
because the tablet does not have a reachable uart so the dts sync
drops its serial0 alias.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-08-26 16:58:36 +02:00
Hans de Goede
a1243f7851 sun6i: Add defconfig and dts file for tablets using the inet-q972 PCB
Add a defconfig and dts file for tablets using the generic inet-q972 PCB.

Tablets with this PCB feature a mini-hdmi output, micro-usb usb-host,
micro-usb usb-otg, 3.5mm headphone jack, a micro sd slot,
(mini) power-barrel and an usb wifi module.

This has been tested on a 9.7" 1024x768 qware qw tb9718-qhd tablet.

The dts files are identical to the ones submitted to the upstream kernel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-08-26 16:58:36 +02:00
Tom Rini
c733c18e35 Merge branch 'master' of git://www.denx.de/git/u-boot-marvell 2016-08-26 07:41:54 -04:00
Chris Packham
c90d7ab6b0 arm: mvebu: a38x: typo fix cpabilities -> capbilities
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2016-08-26 08:33:52 +02:00
Chris Packham
014a357bba arm: mvebu: a38x: update serdes error handling
Ensure appropriate error messages are generated. Previously all errors
indicated that the serdes was already in use. Now appropriate error
messages are given.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2016-08-26 08:33:44 +02:00
Chris Packham
d7b4731efd arm: mvebu: Add support for NAND interface on A-38x
The NAND interface on the Armada-38x series is similar to that on the
Armada-XP. The key difference is that the NAND ECC clock ratio is
provided via the DFX Server registers instead of the Core Clock.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2016-08-26 08:33:21 +02:00
Stephen Warren
6002c75c59 ARM: tegra: remove stale nvidia, bpmp I2C DT property
The nvidia,bpmp property is left over from an old BPMP I2C binding, and
shouldn't be present. Remove it from the SoC DT file, and update the
I2C driver not to parse it; the value wasn't used for anything any more
anyway.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-25 13:48:11 -07:00
Stephen Warren
eb3f68afbc ARM: tegra: fix Tegra186 SDHCI clock/reset names
The Tegra SDHCI binding dictates that the reseet name for the Tegra SDHCI
clock be "sdhci" not "sdmmc", and that the clock is accessed by index
rather than by name. Fix the Tegra186 DT and MMC driver to honor this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-25 13:47:49 -07:00
Stephen Warren
b4ee081e5a ARM: tegra: fix Tegra186 I2C clock name
The Tegra I2C binding dictates that the clock name for the Tegra I2C clock
be "div-clk" not "i2c". Fix the Tegra186 DT and I2C driver to honor this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-25 13:47:49 -07:00
Tom Rini
c98b171e10 Merge branch 'rmobile' of git://git.denx.de/u-boot-sh
[trini: Drop CMD_BOOTI as it's now on by default on ARM64]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-08-20 16:40:34 -04:00
Lokesh Vutla
c359ae5e8b ARM: OMAP4+: vcores: Remove duplicated code
There is no reason to duplicate code for DRA7xx platforms as there
can be Rail grouping. The maximum voltage detection algorithm can still
be run on other platforms with no Rail grouping and does not harm as
it gives the same result.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-08-20 14:03:25 -04:00