Commit graph

78858 commits

Author SHA1 Message Date
Fabio Estevam
545eceb520 imx8/ls10xx: Use a sane SYS_MALLOC_F_LEN default
When adding new features to imx8m boards, such as DM clock support,
the malloc area can be exhausted.

To avoid such issue, provide a reasonable default for the
SYS_MALLOC_F_LEN size.

Quoting Tom Rini:

"This seems to be an area where everyone is either:
- Kicking the value up a bit for themselves
- Having hard to figure out problems booting the platform because it's
  too small a value until they see someone else picked a larger value.

So lets raise these a bit and get some acks, please."

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon, imx8mn-beacon
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
2022-04-07 10:21:22 -04:00
Tom Rini
f75e5164c6 Merge branch '2022-04-06-various-verified-boot-bugfixes'
To quote the author:

This series collects together various misc patches that were needed when
building mainline U-Boot against Chromium OS verified boot. Most of them
fix minor bugs.
2022-04-07 09:49:27 -04:00
Simon Glass
49e8668181 dm: blk: Expand iteration and add tests
Add some functions which support iteration before probing. Also add tests
for the functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:03:17 -04:00
Simon Glass
e86b6f7100 dm: core: Tidy up comments in uclass headers
Improve some of the comments in these files, which don't follow the
correct style.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:03:17 -04:00
Simon Glass
bb36b9a7d6 dm: core: Add a required struct declaration
This file uses struct driver, so declare it at the top in case the
header-inclusion order is not as expected.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:03:17 -04:00
Simon Glass
09bc3d2eac stdint: Add a definition of UINT8_MAX
This is normally defined in stdint.h but is not used in U-Boot. When
libraries (such as Chromium OS vboot) are built against U-Boot they may
expect this value to be available. Add it to avoid build errors in this
case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:03:17 -04:00
Simon Glass
b7463f198d Make ASYMMETRIC_KEY_TYPE depend on FIT_SIGNATURE
Add this dependency to avoid a build error if FIT_SIGNATURE is not
enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:03:17 -04:00
Simon Glass
8e6c129931 Add a default for TPL_TEXT_BASE
If this value is not provided it causes a hang in the build. Add a default
value to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:03:17 -04:00
Simon Glass
a42d2caa63 disk: Correct the conditions for SPL
These filesystems may have different settings for SPL and TPL. Use the
correct Makefile variable to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:03:17 -04:00
Simon Glass
564e532eea spi: Avoid checking console in SPL
When SPI flash is used in SPL there is no console, so ctrlc() cannot be
called. Add a condition to fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Simon Glass
a50b561333 cros_ec: Complete the comment for cros_ec_read_batt_charge()
Add the missing 'Return' information.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Simon Glass
9dc29742c5 cbfs: Add some more definititions
Add definitions for a payload or 'self', which is like an unpacked ELF
file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Simon Glass
ccfc9d7841 lzma: Tidy up the function prototype
This should use a const pointer for the input stream. Fix this and also
add a proper comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Simon Glass
423cf0acda fdt: sandbox: Avoid looking for an appended device tree
We don't use an appended tree for sandbox and the required symbols are
not present. Add a condition to avoid a build error.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Simon Glass
690af71850 fdt: Correct condition for SEPARATE_BSS
This may have different settings for SPL and TPL. Correct the condition.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Simon Glass
99aca9efe1 abuf: Correct a corner case with abuf_realloc()
If the buffer is empty and not allocated, then abuf_realloc() tries to
copy invalid data. This happens because an incorrect change to use
memdup() was added after the original code was written.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Simon Glass
64aefc4800 errno: Avoid including strings in SPL
At present the header file defines this function in SPL but the file may
not actually be built. This causes a build error if the option is enabled.

Fix the condition in the header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Simon Glass
3390948c0f binman: Correct Chromium OS entry types
The conversion to bintools broke the invocation of the utility, since
the arguments are not correct. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Tom Rini
78df2146d2 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2022-04-06 11:52:17 -04:00
Tom Rini
88b6b33253 Merge branch '2022-04-06-assorted-updates'
- Add DM_PMIC support to TPS65217 and migrate some platforms to it.
- mkimage verification fixes
- DM rST fix, add missing flag when linking u-boot-elf.o
2022-04-06 11:51:00 -04:00
Heinrich Schuchardt
d23f290840 dm: fix function documentation in include/dm/ofnode.h
We use Sphinx style comments to describe functions.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-04-06 09:21:49 -04:00
Pali Rohár
d3b1ca21e2 tools: mkimage: Call verify_header after writing image to disk
If image backend provides verify_header callback then call it after writing
image to disk. This ensures that written image is correct.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-06 09:21:49 -04:00
Yi Liu
3548903fc8 tools: mkimage: No need to verify_header for header_v2
rockchip header_v2 do not have a spl_hdr, so remove the verify.

Signed-off-by: Yi Liu <liuyi@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-06 09:21:49 -04:00
Du Huanpeng
21d3e3d107 Makefile: add endian link flag to u-boot-elf.o
fix compile error when using a little-endian to build with configs:
	sfr_nb4-ser_ram_defconfig
	comtrend_wap5813n_ram_defconfig
	comtrend_ar5387un_ram_defconfig
	comtrend_ct5361_ram_defconfig
	comtrend_vr3032u_ram_defconfig
	comtrend_ar5315u_ram_defconfig
	huawei_hg556a_ram_defconfig
	netgear_dgnd3700v2_ram_defconfig

Signed-off-by: Du Huanpeng <dhu@hodcarrier.org>
2022-04-06 09:21:49 -04:00
Heinrich Schuchardt
776e8aca0b riscv: alloc space exhausted
When trying to run qemu-riscv64_smode_defconfig with 32 harts booting
fails. The debug UART shows a message

    alloc space exhausted

32 is the current maximum number of harts for machine virt in QEMU 7.0.

Raise the default for SYS_MALLOC_F_LEN to 16 KiB.

Move the setting to /Kconfig where we define SYS_MALLOC_F_LEN for
other architectures too.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-04-06 10:58:13 +08:00
Heinrich Schuchardt
22e324c638 riscv: enable CONFIG_CMD_SBI for QEMU boards
Let CONFIG_TARGET_QEMU_VIRT imply CONFIG_CMD_SBI.

The sbi command provides detailed information about the SBI.
It is useful to test the discovery of extensions.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-04-06 09:40:05 +08:00
Heinrich Schuchardt
cfb31e0b9e cmd/sbi: add missing SBI information
Let the sbi command display:

* machine vendor ID
* machine architecture ID
* machine implementation ID

With this patch the output for the HiFive Unmatched looks like

    => sbi
    SBI 0.3
    OpenSBI 0.9
    Machine:
      Vendor ID 489
      Architecture ID 8000000000000007
      Implementation ID 20181004
    Extensions:
      sbi_set_timer
      sbi_console_putchar
      sbi_console_getchar
      sbi_clear_ipi
      sbi_send_ipi
      sbi_remote_fence_i
      sbi_remote_sfence_vma
      sbi_remote_sfence_vma_asid
      sbi_shutdown
      SBI Base Functionality
      Timer Extension
      IPI Extension
      RFENCE Extension
      Hart State Management Extension
      System Reset Extension

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2022-04-06 09:40:05 +08:00
Heinrich Schuchardt
ca7e93fa9f riscv: provide missing base extension functions
Provide library functions to read:

* machine vendor ID
* machine architecture ID
* machine implementation ID

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2022-04-06 09:40:05 +08:00
Heinrich Schuchardt
70ae54bd25 cmd: sbi: add Performance Monitoring Unit Extension
Version 1.0-rc3 of the RISC-V Supervisor Binary Interface Specification
has added the Performance Monitoring Unit Extension.

The sbi command should be able to detect it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-04-06 09:40:05 +08:00
Lukasz Majewski
e8cb4e78c7 power: pmic: Provide DM_PMIC support for tps65217 driver
The tps65217 PMIC driver is used with am335x SoC based designs.

It is used in the SPL (MLO) as well, so the DM conversion only is
for u-boot proper.

This driver only allows simple reading/writing/dumping of the content
of its registers and requires the DM_I2C for proper operation.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-04-05 15:51:52 -04:00
Lukasz Majewski
1610b68ea3 power: Rename CONFIG_POWER_TPS65217 with CONFIG_PMIC_TPS65217
Up till now the CONFIG_POWER_TPS65217 has been defined in several header
files for am335x SoC.

This patch renames it to CONFIG_PMIC_TPS65217, which better reflects the
role of this IC circuit.

Moreover, new CONFIG_PMIC_TPS65217 has been introduced in Kconfig
to be used with boards, which both support DM_PMIC and DM_I2C.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[trini: Migrate all other platforms as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-05 15:51:46 -04:00
Tom Rini
59bffec43a Merge branch '2022-04-04-platform-updates'
- Updates for exynos78x0 and TI K3 platforms
2022-04-05 13:45:22 -04:00
Tom Rini
037ef53cf0 Xilinx changes for v2022.07-rc1 v2
xilinx:
 - Allow booting bigger kernels till 100MB
 
 zynqmp:
 - DT updates (reset IDs)
 - Remove unneeded low level uart initialization from psu_init*
 - Enable PWM features
 - Add support for 1EG device
 
 serial_zynq:
 - Change fifo behavior in DEBUG mode
 
 zynq_sdhci:
 - Fix BASECLK setting calculation
 
 clk_zynqmp:
 - Add support for showing video clock
 
 gpio:
 - Update slg driver to handle DT flags
 
 net:
 - Update ethernet_id code to support also DM_ETH_PHY
 - Add support for DM_ETH_PHY in gem driver
 - Enable dynamic mode for SGMII config in gem driver
 
 pwm:
 - Add driver for cadence PWM
 
 versal:
 - Add support for reserved memory
 
 firmware:
 - Handle PD enabling for SPL
 - Add support for IOUSLCR SGMII configurations
 
 include:
 - Sync phy.h with Linux
 - Update xilinx power domain dt binding headers
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYkxUZwAKCRDKSWXLKUoM
 IXJ2AKCQcoFK7wanCCvZfuEJCSwO5E4eCACginE2CFVXKcY1P8ta4ESusjY2TH0=
 =HOoS
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2022.07-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2022.07-rc1 v2

xilinx:
- Allow booting bigger kernels till 100MB

zynqmp:
- DT updates (reset IDs)
- Remove unneeded low level uart initialization from psu_init*
- Enable PWM features
- Add support for 1EG device

serial_zynq:
- Change fifo behavior in DEBUG mode

zynq_sdhci:
- Fix BASECLK setting calculation

clk_zynqmp:
- Add support for showing video clock

gpio:
- Update slg driver to handle DT flags

net:
- Update ethernet_id code to support also DM_ETH_PHY
- Add support for DM_ETH_PHY in gem driver
- Enable dynamic mode for SGMII config in gem driver

pwm:
- Add driver for cadence PWM

versal:
- Add support for reserved memory

firmware:
- Handle PD enabling for SPL
- Add support for IOUSLCR SGMII configurations

include:
- Sync phy.h with Linux
- Update xilinx power domain dt binding headers
2022-04-05 11:27:39 -04:00
T Karthik Reddy
a7379ba650 net: zynq_gem: Add SGMII dynamic config support
Add support for SGMII dynamic configuration which will takes care of
configuring SGMII in the GEM secure (GEM_CLK_CTRL) configuration
register.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/a8915186e44015959978d080a31de652f544cd4a.1648631275.git.michal.simek@xilinx.com
2022-04-05 15:13:13 +02:00
T Karthik Reddy
7011efce23 firmware: firmware-zynqmp: Add zynqmp_pm_set_gem_config api
Add zynqmp_pm_set_gem_config() api to configure GEM secure registers.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f69e32355c6a6be7d2780663353c52757530207d.1648631275.git.michal.simek@xilinx.com
2022-04-05 15:13:13 +02:00
T Karthik Reddy
e949e78948 gpio: slg7xl45106: Update gpio desc flags from DT
In current slg7xl45106 gpio driver xlate() function we are not updating
gpio flags from DT. Read the given flag from DT and update the gpio desc
flags variable with required gpio direction state.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/a8d7b4799337bd99f61ace509889f02b192a9414.1648631275.git.michal.simek@xilinx.com
2022-04-05 15:13:13 +02:00
T Karthik Reddy
fc6e56283e net: zynq_gem: Move ethernet info print statement
As we are not reading the PHY address in case of CONFIG_ETH_PHY in plat
function, phy address always prints as -1. So move the ethernet info
print statement to probe function, to display proper phy address.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f6efc6719d767b1bebe65987c22c6d52329f4225.1648631275.git.michal.simek@xilinx.com
2022-04-05 15:13:13 +02:00
T Karthik Reddy
ccc8656f7f net: phy: Avoid phy gpio reset sequence if DM_ETH_PHY is enabled
If DM_ETH_PHY config is enabled PHY gpio reset is taken care by the
eth-phy-uclass driver, so use the PHY gpio reset functionality from
ethernet_id file when this config is disabled to reset the PHY.
Use debug() print instead of dev_err() to avoid warning incase if phy-id
compatible string is not present.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/4d0fd3f9f886c1d943776025e5efb5438b0eb389.1648631275.git.michal.simek@xilinx.com
2022-04-05 15:13:13 +02:00
Michal Simek
801725395a net: zynq_gem: Use shared MDIO bus support for zynqmp
CONFIG_ETH_PHY enables support to utilize generic ethernet phy
framework. Though if ethernet PHY node is in other ethernet node, it
will use shared MDIO to access the PHY of other ethernet.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Link: https://lore.kernel.org/r/337b1a38ba36cde1951739af62fb3d2736d97f53.1648631275.git.michal.simek@xilinx.com
2022-04-05 15:13:13 +02:00
Michal Simek
d2f059c3dc dt-bindings: xilinx: Add missing ids for PD
There are some new power domain IDs which are used in Linux kernel that's
why add them here too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/e6092e1d3766c0ac11bf620820739c93ab677a85.1648626981.git.michal.simek@xilinx.com
2022-04-05 15:12:12 +02:00
Michal Simek
ad8d48e981 arm64: zynqmp: Record ID code for XCZU1EG device
Add ID code for 1eg device.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/5b6c9f6a25bba076f304bc4699f6f676a929a683.1648619516.git.michal.simek@xilinx.com
2022-04-05 15:11:35 +02:00
T Karthik Reddy
9b529a972d net: phy: Fix rgmii-id phy reset timeout issue
While creating a phy device using phy_device_create(), we need to
provide a valid phyaddr instead of 0 causing phy address being
registered as 0 with mdio bus and shows mdio phy list as below

ZynqMP>  mdio list
eth0:
0 - TI DP83867 <--> ethernet@ff0b0000
eth1:
0 - TI DP83867 <--> ethernet@ff0c0000

Also PHY soft reset is being requested on 0 instead of valid
address causing "PHY reset timed out" error.

So add phyaddr argument to phy_connect_phy_id() and to its prototype
to create phy device with valid phyaddress.

Fixes: a744a284e3 ("net: phy: Add support for ethernet-phy-id with gpio reset")
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Link: https://lore.kernel.org/r/fe35fddb9faa5af577ffdfabaec6879c935a30f8.1648562755.git.michal.simek@xilinx.com
2022-04-05 15:10:54 +02:00
Michal Simek
6f735e4178 clk: zynqmp: Add support for for DP audio/video clocks
Add support for getting rate for DP audio and video clocks.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8792efe1fd9715f7c8a2e1e24f0454fb5b25d833.1648552434.git.michal.simek@xilinx.com
2022-04-05 15:09:47 +02:00
Tom Rini
4de720e98d Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
A big part is the DM pinctrl driver, which allows us to get rid of quite
some custom pinmux code and make the whole port much more robust. Many
thanks to Samuel for that nice contribution! There are some more or less
cosmetic warnings about missing clocks right now, I will send the trivial
fixes for that later.
Another big chunk is the mkimage upgrade, which adds RISC-V and TOC0
(secure images) support. Both features are unused at the moment, but I
have an always-secure board that will use that once the DT lands in the
kernel.
On top of those big things we have some smaller fixes, improving the
I2C DM support, fixing some H6/H616 early clock setup and improving the
eMMC boot partition support.

The gitlab CI completed successfully, including the build test for all
161 sunxi boards. I also boot tested on a A64, A20, H3, H6, and F1C100
board. USB, SD card, eMMC, and Ethernet all work there (where applicable).
2022-04-05 08:33:32 -04:00
Michal Simek
cf5ed341e4 xilinx: Increase max size of image from 60 to 100MB
Recently big Linux kernels can have more then 60MB that's why increase this
limit to also cover these large kernels.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f52f7c8ea419d69b248ba1460a96d1635194e128.1648551279.git.michal.simek@xilinx.com
2022-04-05 13:26:10 +02:00
Andre Przywara
69a0ea0078 sunxi: defconfig: enable eMMC boot partition support
Now that the SPL can safely detect whether it was loaded from an eMMC
boot partition or the normal user data partition, let's enable this
feature on some boards that feature eMMC storage.

That covers the boards where I could test this on, and allows the same
build to be written to an SD card, eMMC user partition, eMMC boot
partition, or into SPI NOR flash.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-05 00:08:46 +01:00
Andre Przywara
b9a2e18533 sunxi: eMMC: Improve automatic boot source detection
When the Allwinner BROM loads the SPL from an eMMC boot partition, it
sets the boot source byte to the same value as when booting from the
user data partition. This prevents us from determining the boot source
to load U-Boot proper from the proper partition for sure.

The generic SPL MMC code already looks at the enabled boot partition
number, to load U-Boot proper from the same partition, but this fails
if there is nothing bootable in this partition, as the BROM then
silently falls back to the user data partition, which the SPL misses.

To learn about the actual boot source anyway, we repeat the algorithm
the BROM used to select the boot partition in the first place:
- Test EXT_CSD[179] to check if an eMMC boot partition is enabled.
- Test EXT_CSD[177] to check for valid MMC interface settings.
- Check if BOOT_ACK is enabled.
- Check the beginning of the first sector for a valid eGON signature.
- Load the whole SPL.
- Recalculate the checksum to verify the SPL is valid.

If one of those steps fails, we bail out and continue loading from the
user data partition. Otherwise we load from the selected boot partition.

Since the boot source is needed twice in the boot process, we cache the
result of this test to avoid doing this costly test multiple times.

This allows the very same image file to be put onto an SD card, into the
eMMC user data partition or into the eMMC boot partition, and safely
loads the whole of U-Boot from there.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-05 00:08:40 +01:00
Christian Gmeiner
da61ee6625 ram: k3-am654: Make VTT regulator optional
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2022-04-04 19:02:04 -04:00
Dominic Rath
e4901e6591 ram: k3-am654: Write all configuration values
Makes it possible to use 16-bit DDR memory.

Signed-off-by: Dominic Rath <rath@ibv-augsburg.net>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2022-04-04 19:02:04 -04:00
Dave Gerlach
ca1d803a47 configs: am64x_evm_r5: Add CONFIG_NR_DRAM_BANKS as done in a53 defconfig
Add CONFIG_NR_DRAM_BANKS from am64x_evm_a53_defconfig as this is needed
to calculate the size of DDR that is available.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-04 19:02:04 -04:00