Commit 06985289d4 ("watchdog: Implement generic watchdog_reset()
version") introduced an automatic selection of CONFIG_WATCHDOG by
CONFIG_WDT. But for boards selecting CONFIG_HW_WATCHDOG, like
boards have a powerpc 8xx, CONFIG_WATCHDOG shall not be selected
as they are mutually exclusive.
Make CONFIG_WATCHDOG dependent on !CONFIG_HW_WATCHDOG
Fixes: 06985289d4 ("watchdog: Implement generic watchdog_reset() version")
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Stefan Roese <sr@denx.de>
Commit f3729ba6e7 ("watchdog: mpc8xx_wdt: Watchdog driver and macros
cleanup") switched the watchdog to CONFIG_WATCHDOG. But this is not
compatible with the 8xx because it starts the watchdog HW timer at
reset and must be serviced from the very beginning including while
U-boot is executed in the firmware before relocation in RAM.
Select CONFIG_HW_WATCHDOG and make hw_watchdog_reset() visible.
Meanwhile, finalise the cleanup of arch/powerpc/cpu/mpc8xx/Kconfig by
removing the lines put in comment in that commit, and also remove
again the selection of CONFIG_MPC8xx_WATCHDOG which was removed by
that commit and brought back by mistake by commit b3134ffbd9
("watchdog: Kconfig: Sort entry alphabetically")
Note that there was an 'imply WATCHDOG' in the original commit but
it disappeared in the Kconfig alphabetical sorting, so no need to
remove it here.
Fixes: f3729ba6e7 ("watchdog: mpc8xx_wdt: Watchdog driver and macros cleanup")
Fixes: b3134ffbd9 ("watchdog: Kconfig: Sort entry alphabetically")
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Cc: Stefan Roese <sr@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Very likely configs have been moved to Kconfig by scripts and this just
remains there that's why remove it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
DEVICE_TREE variable is not exported from dts/Makefile that's why it is
necessary to setup directly before use.
Fixes: 312f2c5b14 ("arm: xilinx: Use device tree which can be passed on cmd line")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Driver probe function is called again and again in case of error.
Malloc space is getting full which is is reported by:
Insufficient RAM for page table: 0x15000 > 0x14000.
Please increase the size in get_page_table_size()
### ERROR ### Please RESET the board ###
The patch is freeing allocated buffers on error path to avoid panic.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
On Xilinx ZynqMP revA board initial value of PHYCR register is 0x5448 which
means FORCE_LINK_GOOD is already setup. Origin code was doing write but the
new code is doing read/modify/write and keep this bit untouched. That's why
ethernet stop to work.
The patch is cleaning this bit when PHYCR value is composed.
Tested on Xilinx zcu102-revA and zcu104-rev1.0 boards.
Fixes: 37d6265f2b ("net: phy: dp83867: refactor rgmii configuration")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Fixed wrong enumeration of nand_config structure. Added chip select
function before reading the nand chip for maf/dev id's, without this
unable to access id's from some of the micron chips. Also added a
print statement to identify if a nand flash is using on-die ecc.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The clock driver makes EEMI call to get the name of invalid clk
when executing versal_get_clock_info() function. This results in
error messages.
Added check for validating clock before saving clock attribute and
calling versal_pm_clock_get_name() in versal_get_clock_info() function.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The board uses 100 MHz clock for UART bitrate generator,
but is configured as 50 MHz on defconfig.
This produces wrong console output.
The first message, "Debug uart enabled" is received as:
"������b"
Fix the issue by configuring the correct clock for the
UART baudrate generator
Signed-off-by: Milan Obuch <u-boot@dino.sk>
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The board has two push button connected to MIO pins
50 and 51, which have a pull-down resistor and are
connected to 1.8V when pressed.
These two pins are wrongly initialized with internal
pull-up enabled so they are reported as 1 all the time
with no change when pressed.
Disable the internal pull-up to fix the issue.
Signed-off-by: Milan Obuch <u-boot@dino.sk>
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
flush_dcache_range() expects unsigned long in the arguments. Here u32
variable is unable to hold the higher address value when ddr mapped
to higher addresses & flushing lower address dchache range instead
which is unmapped causing to crash.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The eMMC controller on LD20 or later supports HS-400 mode. It works on
a quick test. Enable it in case somebody may want to use it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The base address 0x43f00000 is no longer true for the future SoC.
Extract the base address from the device tree.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This workaround was previously needed for LD4, Pro4, sLD8, Pro5
SoCs. The boot ROM does not touch this register for PXs2/LD6b or
later.
Now that the reset signal of the Denali NAND controller is always
asserted in board_init() then deasserted in the driver, the
WRITE_PROTECT register gets back to the default value, which means
the write protect is deasserted.
This workaround can go away entirely.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The comment /* deassert reset */ is wrong. It asserts the reset.
It no longer needs to stay in SPL. The NAND controller reset is
handled in the driver. So, this assert can be moved to the
board_init() of U-Boot proper.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add handy macros:
- sdscript: source boot.scr in the file system of the SD media
- sdboot : boot the kernel using the images in the file system
of the SD media
- sdscript: update the boot firmware in the SD media
(in raw block sectors)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
UEFI spec 2.8 errata A replaces the RuntimeServicesSupported variable
defined in UEFI spec 2.8 by the configuration table
EFI_RT_PROPERTIES_TABLE. So let's follow suit.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEbcT5xx8ppvoGt20zxIHbvCwFGsQFAl5WutkACgkQxIHbvCwF
GsTC0w/8DHQptNQXMfRIiQakxY/WLQX8zjecWh/cHUCTTsbhnuYori8edfwnnbkw
JkR8TGL0pqpNVt/PV/Lf7ptffybiYK87zEUttFNePme/SgJg6oG6PgtrwRug6Pbs
R5T8ldNuzQUd3XnT1dfigrkLKy8DKziYKegUnjZZn+ZhPt07mNHJM+ZoTaD5iKgS
tbSRD/e+g9B9rIQY0DvSC3QkqwLN3LW4dKora1RJEWGMNoVGB2XoscyhoYT0shku
BPA5vwAq4ekK/hw5nPPN9dgregT9ScAaTvBV113PAgIsQIlOmRIQx3Fpx3zTRpOI
XqFHVcYwRlehocNJ/i8rDHdaNTYh+FBgULPqR35TS9GjxycCh/biVzbtbMpoz4Ll
lJ74UnVpuZ8A2labR+qv5XDzAXcAKbTXC85JqkzZkZVOQECnqX4T6GMH1w79u5fh
czeBJZp+vONWWZWYjBYOTznYsCNV3W2cumCsub0NVO3IiDAhNhEU9SDPxdj3jPHY
YIk0FVC9KCqARnz9kXFj0MuzWqPTK0X0Cncl+oDlJcXhsSmayl2AqjhJS2yWuOPf
5fOdLVAx/Gq65tgfo9ZwKZJC+Ci9HharbH4FLmAo3KIdb1fOPW6xISbYubZj7Lfv
zbKgPSNXV230sBmWl3f9LsDS/Eir/z8rtXEZUtgTLba2oqRyCng=
=sap/
-----END PGP SIGNATURE-----
Merge tag 'efi-2020-04-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-04-rc4
UEFI spec 2.8 errata A replaces the RuntimeServicesSupported variable
defined in UEFI spec 2.8 by the configuration table
EFI_RT_PROPERTIES_TABLE. So let's follow suit.
UEFI spec 2.8 errata A replaces the RuntimeServicesSupported variable
defined in UEFI spec 2.8 by the configuration table
EFI_RT_PROPERTIES_TABLE. So let's follow suit.
Cc: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
This fixes the inadvertent definition of CONFIG_DTB_RESELECT and
CONFIG_MULTI_DTB_FIT in the K2x HS defconfigs, that happened as part of
a resync of the defconfigs.
The inclusion of these config options causes ethernet to stop working on
K2x HS devices as they interfere with the installation of the secure
boot monitor.
This patch also removes the above configs for the K2 GP devices, as they
are not needed, and to keep the differences between the GP and HS
defconfigs to a minimum.
Signed-off-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Its possible that k3_avs_priv is NULL because the driver may not have
been probed yet. Therefore check if pointer is valid before
dereferencing it.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
When the board was originally submitted, it was attempting to use the
ESDHC driver. The board uses the USDHC driver.
Signed-off-by: Carl Gelfand <carl@novtech.com>
Cc: Shawn Guo <shawn.guo@kernel.org> (maintainer:MEERKAT96 BOARD)
Acked-by: Shawn Guo <shawnguo@kernel.org>
Printing the error message in verbose mode fails, since python3
doesn't implicitely convert bytes to strings.
Signed-off-by: Markus Klotzbuecher <mk@mkio.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit b237d358b4 ("moveconfig: expand simple expressions") added
support for expanding expressions in configs, but used the unsafe python
built-in "eval". This patch fixes this by replacing eval with the
asteval module.
Signed-off-by: Markus Klotzbuecher <mk@mkio.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Macro SZ_64K is undeclared. Include sizes.h to fix the compilation
error.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The include uboot_aes.h is not useful and
it breaks the compilation on android, so
we remove it.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reported-by: Praneeth Bajjuri <praneeth@ti.com>
Several patches delivered incorrect restructured text as documentation. We
should be able to discover this in Travis CI, Gitlab CI, or Azure CI.
So let us turn all build warnings into errors.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Several patches delivered incorrect restructured text as documentation. We
should be able to discover this in Azure CI.
Provide a build step for 'make htmldocs'.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Several patches delivered incorrect restructured text as documentation. We
should be able to discover this in Gitlab CI.
Provide a build step for 'make htmldocs'.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Several patches delivered incorrect restructured text as documentation.
We should be able to discover this in Travis CI.
Provide a build step for 'make htmldocs'.
Add required package graphviz.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The sata of our powerpc platforms are updated. These changes is to
fit the driver probe.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This reverts commit 02dc1599ba
Commit 02dc1599ba ("configs: enable sata, eSDHC, USB device module in
T2080QDS")
has some sata defconfig changes to fit support DM mode, Now the driver
will be reverted, So revert it.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This reverts commit 856b9cdb53.
Commit 856b9cdb53 ("powerpc: mpc85xx: delete FSL_SATA for T2080QDS
board.") is to fit support sata DM mode, Now the driver will be reverted,
So revert it.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This reverts commit 1ee4942918.
Commit 1ee4942918 ("ata: fsl_ahci: Add sata DM support for Freescale
powerpc socs") introduced SCSI layer to call AHCI private API in order
to support sata operations, In DM mode, This is not necessary for
non-AHCI sata. So revert it and have already updated the driver itself
to operate sata directly.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Update doc/sphinx/kerneldoc.py from Linux next-20200219 to avoid warnings
like:
doc/sphinx/kerneldoc.py:125: RemovedInSphinx20Warning:
AutodocReporter is now deprecated. Use
sphinx.util.docutils.switch_source_input() instead.
self.state.memo.reporter =
AutodocReporter(result, self.state.memo.reporter)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This driver currently performs cache operation before the DMA start,
but does nothing after the DMA completion.
When reading data by DMA, the cache invalidation is needed also after
finishing the DMA transfer. Otherwise, the CPU might read data from
the cache instead of from the main memory when speculative memory read
or memory prefetch occurs.
Instead of calling the cache operation directly, this commit adds
dma_unmap_single(), which performs cache invalidation internally,
but drivers do not need which operation is being run.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, sdhci_prepare_dma() calls flush_cache() regardless of the
DMA direction.
Actually, cache invalidation is enough when reading data from the device.
This is correctly handled by dma_map_single(), which mimics the DMA-API
in Linux kernel. Drivers can be agnostic which cache operation occurs
behind the scene.
This commit also sanitizes the difference between the virtual address
and the dma address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
host->mmc is already (struct mmc *).
memalign() returns an opaque pointer, so there is no need for casting.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
