Commit graph

12603 commits

Author SHA1 Message Date
Wolfgang Denk
54841ab50c Make sure that argv[] argument pointers are not modified.
The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
commands.  Any code that modifies these pointers will cause serious
corruption of the malloc data structures and crash U-Boot, so make
sure the compiler can check that no such modifications are being done
by changing the code into "char * const argv[]".

This modification is the result of debugging a strange crash caused
after adding a new command, which used the following argument
processing code which has been working perfectly fine in all Unix
systems since version 6 - but not so in U-Boot:

int main (int argc, char **argv)
{
	while (--argc > 0 && **++argv == '-') {
/* ====> */	while (*++*argv) {
			switch (**argv) {
			case 'd':
				debug++;
				break;
			...
			default:
				usage ();
			}
		}
	}
	...
}

The line marked "====>" will corrupt the malloc data structures and
usually cause U-Boot to crash when the next command gets executed by
the shell.  With the modification, the compiler will prevent this with
an
	error: increment of read-only location '*argv'

N.B.: The code above can be trivially rewritten like this:

	while (--argc > 0 && **++argv == '-') {
		char *arg = *argv;
		while (*++arg) {
			switch (*arg) {
			...

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-07-04 23:55:42 +02:00
Sergey Matyukevich
64203c7b0f USB OHCI support for at91sam9g45 SoC
Add USB OHCI support for at91sam9g45ekes/at91sam9m10g45ek boards.

Note that according to errata from Atmel, OHCI is not operational
on the first revision of at91sam9g45 chip. So this patch enables
OHCI support for later revisions.

Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
2010-06-30 21:37:36 +02:00
Wolfgang Denk
e365c43d6a Merge branch 'next' of git://git.denx.de/u-boot-ti into next 2010-06-29 21:58:16 +02:00
Wolfgang Denk
f35f3968c2 Merge branch 'master' into next 2010-06-23 21:17:29 +02:00
Wolfgang Denk
482126e27b Prepare v2010.06-rc3
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-06-23 20:50:54 +02:00
Minkyu Kang
47ea6edfb3 ARM: remove unused VIDEOLFB ATAG
ATAG_VIDEOLFB is not used anywhere.
The belowing warning is occurred due to this ATAG.

[    0.000000] Ignoring unrecognised tag 0x54410008

This patch fixed it.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Martin Krause <Martin.Krause@tqs.de>
2010-06-23 00:11:10 +02:00
Wolfgang Denk
39e9b7c3c3 Merge branch 'master' of /home/wd/git/u-boot/custodians 2010-06-22 22:37:16 +02:00
Albert Aribaud
23fdf05806 Fix wrong orion5x MPP and GIPO writel arguments
Orion5x MPP and GPIO setting code had writel arguments
the wrong way around. Fixed and tested.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-06-22 22:37:00 +02:00
Terry Lv
95bc39e848 ARM: fix bug in macro __arch_ioremap.
Signed-off-by: Terry Lv <r65388@freescale.com>

Fix commit message and code formatting.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-06-22 22:33:06 +02:00
Vitaly Kuzmichev
a71da1b6c9 ARM: Align stack to 8 bytes
The ARM ABI requires that the stack be aligned to 8 bytes as it is noted
in Procedure Call Standard for the ARM Architecture:
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042d/index.html

Unaligned SP also causes the problem with variable-length arrays
allocation when VLA address becomes less than stack pointer during
aligning of this address, so the next 'push' in the stack overwrites
first 4 bytes of VLA.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>

Tested on tx25(mx25), imx27lite(mx27), qong(mx31) and trab(s3c2400)
Tested-by: Wolfgang Denk <wd@denx.de>
2010-06-22 22:15:07 +02:00
Prakash PM
e6441c4f40 DaVinci: EMAC: Get EMAC_MDIO_PHY_NUM from config files
Currently EMAC_MDIO_PHY_NUM is defined as 1 in emac_defs.h.
Because of this, EMAC does not work on EVMs which do not have phy
connected at 1. Moving the macro to board config file makes this
configurable depending on where the phy is connected on the MDIO bus.

This patch fixes the board reset issue observed during network access
on DM365EVM. EMAC driver was assuming EMAC_MDIO_PHY_NUM as 1
but it is 0 on DM365EVM.

This patch is verified on da830/omap-l137, dm365 and dm644x evms.

Signed-off-by: Prakash PM <prakash.pm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-06-22 10:24:43 -04:00
Wolfgang Denk
cd040a4953 arch/arm/cpu/arm_cortexa8/omap3/cache.S: make build with older tools
The push / pop instructions used in this file are available only with
more recent tool chains:

cache.S: Assembler messages:
cache.S:133: Error: bad instruction `push {r0,r1,r2,lr}'
cache.S:160: Error: bad instruction `pop {r1,r2,r3,pc}'
cache.S:164: Error: bad instruction `push {r0,r1,r2,lr}'
cache.S:191: Error: bad instruction `pop {r1,r2,r3,pc}'

Change push/pop into stmfd/ldmfd instructions to support older
versions of binutils as well.

I verified that the modified source code generates exactly the same
binary code.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Tom Rix <tom@bumblecow.com>
2010-06-18 16:01:07 +02:00
Wolfgang Denk
54e19a7ded Merge branch 'master' into next
Conflicts:
	Makefile

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-06-18 01:20:49 +02:00
Wolfgang Denk
1f241263e0 Merge branch 'fix' of git://git.denx.de/u-boot-pxa 2010-06-17 22:31:04 +02:00
Wolfgang Denk
cecda170e7 Merge branch 'master' of git://git.denx.de/u-boot-marvell 2010-06-17 22:22:06 +02:00
Wolfgang Denk
530135dcac Merge branch 'master' of git://git.denx.de/u-boot-ti
Conflicts:
	CONFLICT (rename/add): Rename
	board/davinci/da830evm/Makefile->board/ti/tnetv107xevm/Makefile
	in 89b765c7f6.
	board/ti/tnetv107xevm/Makefile added in HEAD
But files were identical, so no problem.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-06-17 21:59:57 +02:00
Albert Aribaud
0c61e6f925 Initial support for Marvell Orion5x SoC
This patch adds support for the Marvell Orion5x SoC.
It has no use alone, and must be followed by a patch
to add Orion5x support for serial, then support for
the ED Mini V2, an Orion5x-based product from LaCie.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-06-17 19:36:07 +05:30
Marek Vasut
bb596e84eb PXA: Add missing MDREFR bits
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-06-13 13:39:11 +02:00
Marek Vasut
52dc45e5a3 PXA: Add UP2OCR register bit definitions
This register is used on PXA to control the USB Port2 operation (USB Port2 is
the host port).

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-06-13 13:39:11 +02:00
Marek Vasut
3a96ad851f PXA: Align stack to 8 bytes
Part of this patch is by: Mikhail Kshevetskiy.

Stack must be aligned to 8 bytes on PXA (possibly all armv5te) for LDRD/STRD
instructions. In case LDRD/STRD is issued on an unaligned address, the behaviour
is undefined.

The issue was observed when working with the NAND code, which was rendered
disfunctional. Also, the vsprintf() function had serious problems with printing
64bit wide long longs. After aligning the stack, this wrong behaviour is no
longer present.

Tested on:
	Marvell Littleton PXA310 board
	Toradex Colibri PXA320 board
	Aeronix Zipit Z2 PXA270 handheld
	Voipac PXA270 board

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-06-13 13:39:02 +02:00
Sudhakar Rajashekhara
89b765c7f6 TI: DaVinci: Add board specific code for da850 EVM
Provides initial support for TI OMAP-L138/DA850 SoC devices on
a Logic PD EVM board.

Provides:
Initial boot and configuration.
Support for i2c.
UART support (console).

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Acked-by: Ben Gardiner <bengardiner@nanometrics.ca>
Reviewed-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-06-10 12:04:42 -04:00
Vaibhav Hiremath
1a5038ca68 AM35x: Add support for EMIF4
This patch adds support for the EMIF4 interface
available in the AM35x processors.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-06-08 10:07:19 -05:00
Vaibhav Hiremath
cae377b59a omap3: Consolidate SDRC related operations
Consolidated SDRC related functions into one file - sdrc.c

And also replaced sdrc_init with generic memory init
function (mem_init), this generalization of omap memory setup
is necessary to support the new emif4 interface introduced in AM3517.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-06-08 10:07:18 -05:00
Vaibhav Hiremath
d11212e377 omap3: Calculate CS1 size only when SDRC is
initialized for CS1

From: Vaibhav Hiremath <hvaibhav@ti.com>

The patch makes sure that size for SDRC CS1 gets calculated
only when the CS1 SDRC is initialized.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-06-08 10:07:18 -05:00
Cyril Chemparathy
3712367c48 ARM1176: TI: TNETV107X soc initial support
TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
bunch on on-chip integrated peripherals.  This is an initial commit with
basic functionality, more commits with drivers, etc. to follow.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-06-08 10:07:17 -05:00
Cyril Chemparathy
678e008c3a ARM1176: Coexist with other ARM1176 platforms
The current ARM1176 CPU specific code is too specific to the SMDK6400
architecture.  The following changes were necessary prerequisites for the
addition of other SoCs based on ARM1176.

Existing board's (SMDK6400) configuration has been modified to keep behavior
unchanged despite these changes.

1. Peripheral port remap configurability
The earlier code had hardcoded remap values specific to s3c64xx in start.S.
This change makes the peripheral port remap addresses and sizes configurable.

2. U-Boot code relocation support
Most architectures allow u-boot code to run initially at a different
address (possibly in NOR) and then get relocated to its final resting place
in RAM.  Added support for this capability in ARM1176 architecture.

3. Disable TCM if necessary
If a ROM based bootloader happened to have initialized TCM, we disable it here
to keep things sane.

4. Remove unnecessary SoC specific includes
ARM1176 code does not really need this SoC specific include.  The presence
of this include prevents builds on other ARM1176 archs.

5. Modified virt-to-phys conversion during MMU disable
The original MMU disable code masks out too many bits from the load address
when it tries to figure out the physical address of the jump target label.
Consequently, it ends up branching to the wrong address after disabling the
MMU.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-06-08 10:07:17 -05:00
Vaibhav Hiremath
05ee415e31 AM35x: Add support for EMIF4
This patch adds support for the EMIF4 interface
available in the AM35x processors.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-06-07 15:20:53 -04:00
Vaibhav Hiremath
8aa5c7cdc4 omap3: Consolidate SDRC related operations
Consolidated SDRC related functions into one file - sdrc.c

And also replaced sdrc_init with generic memory init
function (mem_init), this generalization of omap memory setup
is necessary to support the new emif4 interface introduced in AM3517.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-06-07 15:20:34 -04:00
Vaibhav Hiremath
16807ee411 omap3: Calculate CS1 size only when SDRC is
initialized for CS1

From: Vaibhav Hiremath <hvaibhav@ti.com>

The patch makes sure that size for SDRC CS1 gets calculated
only when the CS1 SDRC is initialized.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-06-07 15:20:29 -04:00
Cyril Chemparathy
da1ec42aaf ARM1176: TI: TNETV107X soc initial support
TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
bunch on on-chip integrated peripherals.  This is an initial commit with
basic functionality, more commits with drivers, etc. to follow.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-06-07 14:13:32 -04:00
Cyril Chemparathy
b87996d24a ARM1176: Coexist with other ARM1176 platforms
The current ARM1176 CPU specific code is too specific to the SMDK6400
architecture.  The following changes were necessary prerequisites for the
addition of other SoCs based on ARM1176.

Existing board's (SMDK6400) configuration has been modified to keep behavior
unchanged despite these changes.

1. Peripheral port remap configurability
The earlier code had hardcoded remap values specific to s3c64xx in start.S.
This change makes the peripheral port remap addresses and sizes configurable.

2. U-Boot code relocation support
Most architectures allow u-boot code to run initially at a different
address (possibly in NOR) and then get relocated to its final resting place
in RAM.  Added support for this capability in ARM1176 architecture.

3. Disable TCM if necessary
If a ROM based bootloader happened to have initialized TCM, we disable it here
to keep things sane.

4. Remove unnecessary SoC specific includes
ARM1176 code does not really need this SoC specific include.  The presence
of this include prevents builds on other ARM1176 archs.

5. Modified virt-to-phys conversion during MMU disable
The original MMU disable code masks out too many bits from the load address
when it tries to figure out the physical address of the jump target label.
Consequently, it ends up branching to the wrong address after disabling the
MMU.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-06-07 14:13:27 -04:00
George G. Davis
409a07c9d7 ARM1136: Fix cache_flush() error and correct cpu_init_crit() comments
The ARM1136 cache_flush() function uses the "mcr p15, 0, rn, c7, c7, 0"
instruction which means "Invalidate Both Caches" when in fact the intent
is to clean and invalidate all caches.  So add an "mcr p15, 0, %0, c7,
c10, 0" instruction to "Clean Entire Data Cache" prior to the "Invalidate
Both Caches" instruction to insure that memory is consistent with any
dirty cache lines.

Also fix a couple of "flush v*" comments in ARM1136 cpu_init_crit() so
that they correctly describe the actual ARM1136 CP15 C7 Cache Operations
used.

Signed-off-by: George G. Davis <gdavis@mvista.com>
2010-06-01 06:44:09 -05:00
Tom
39c209546a ARM Update mach-types
Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
And built with

repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
commit 3defb2476166445982a90c12d33f8947e75476c4

Signed-off-by: Tom <Tom@bumblecow.com>
2010-05-28 13:23:16 -05:00
Tom
551bd947bd ARM Update mach-types
Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
And built with

repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
commit 257dab81413b31b8648becfe11586b3a41e5c29a

Signed-off-by: Tom <Tom@bumblecow.com>
2010-05-28 11:49:42 -05:00
Wolfgang Denk
40792d675a a320evb: fix udelay / __udelay confusion
Fix the following compiler problems:

arch/arm/cpu/arm920t/a320/liba320.a(timer.o): In function `udelay':
/home/wd/git/u-boot/work/arch/arm/cpu/arm920t/a320/timer.c:160: multiple definition of `udelay'
lib/libgeneric.a(time.o):/home/wd/git/u-boot/work/lib/time.c:34: first defined here
lib/libgeneric.a(time.o): In function `udelay':
time.c:(.text+0x1c): undefined reference to `__udelay'

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-05-21 23:14:53 +02:00
Wolfgang Denk
92381c41c7 ARM: */timer.c: fix spelling and vertical alignment
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-05-21 23:13:18 +02:00
Wolfgang Denk
8a452c2c17 Merge branch 'master' of git://git.denx.de/u-boot-imx 2010-05-21 22:22:23 +02:00
Wolfgang Denk
cd4b02be1b ARM: add __aeabi_unwind_cpp_pr0() function to avoid linker complaints
Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Thomas Weber <weber@corscience.de>
2010-05-15 19:50:36 +02:00
Fabio Estevam
60381d6878 MX51: Fix MX51 CPU detect message
Fix MX51 CPU detect message.

Original string was:
CPU:   Freescale i.MX51 family 3.0V at 800 MHz

which can be misinterpreted as  3.0 Volts instead of the silicon revision.

,change it to:
CPU:   Freescale i.MX51 family rev3.0 at 800 MHz

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2010-05-05 09:48:41 +02:00
Asen Dimov
d6b91e30d3 at91: define matrix registers bit fields
Signed-off-by: Asen Dimov <dimov@ronetix.at>
2010-04-30 05:23:26 -05:00
Stefano Babic
eab40f819d MX31: Support 128MB RAM on QONG module
The QONG module can be downsized and delivered
with 128MB instead of 256MB. The patch adds
run time support for the two different memory
configurations.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-04-30 05:23:26 -05:00
Stefano Babic
efb9591069 MX31: add pin definitions for NAND controller
Add pin definitions ralted to the NAND controller to be used
to set up the pin multiplexer.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-04-30 05:23:25 -05:00
Stefano Babic
7d27cd08b4 MX31: add accessor function to get a gpio
The patch adds an accessor function to get the value of a gpio.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-04-30 05:23:25 -05:00
John Rigby
34196b0a8b MX25 print arm clock instead of mpllclk on boot
Replace call to imx_get_mpllclk with imx_get_armclk
to show frequency of ARM core instead of mpll internal
bus in print_cpuinfo.

Signed-off-by: John Rigby <jcrigby@gmail.com>
CC: Stefano Babic <sbabic@denx.de>
2010-04-30 05:23:24 -05:00
Stefano Babic
5e1fe88fe3 Moved board specific values in config file
The lowlevel_init file contained some hard-coded values
to setup the RAM. These board related values are moved into
the board configuration file.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-04-30 05:23:24 -05:00
Heiko Schocher
1e65c2beb5 arm, mx27: add support for SDHC1 pin init
Signed-off-by: Heiko Schocher <hs@denx.de>
2010-04-30 05:23:23 -05:00
Minkyu Kang
3bb6b037e8 SAMSUNG: make s5p common gpio functions
Because of s5pc1xx gpio is same as s5p seires SoC,
move gpio functions to drvier/gpio/
and modify structure's name from s5pc1xx_ to s5p_.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-04-30 05:23:23 -05:00
Minkyu Kang
46a3b5c8df SAMSUNG: serial: modify name from s5pc1xx to s5p
Because of other s5p series SoC will use these serial functions,
modify function's name and structure's name.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-04-30 05:23:23 -05:00
Alexander Holler
47eb08a97e at91: add defines for RTT and GPBR
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
2010-04-30 05:23:22 -05:00
trix
7bc8768039 ARM Update mach-types
Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
And built with

repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
commit 85b3cce880a19e78286570d5fd004cc3cac06f57

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2010-04-30 05:23:21 -05:00
Peter Tyser
84ad688473 arm: Move cpu/$CPU to arch/arm/cpu/$CPU
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:24 +02:00
Peter Tyser
819833af39 Move architecture-specific includes to arch/$ARCH/include/asm
This helps to clean up the include/ directory so that it only contains
non-architecture-specific headers and also matches Linux's directory
layout which many U-Boot developers are already familiar with.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:12 +02:00
Peter Tyser
ea0364f1bb Move lib_$ARCH directories to arch/$ARCH/lib
Also move lib_$ARCH/config.mk to arch/$ARCH/config.mk

This change is intended to clean up the top-level directory structure
and more closely mimic Linux's directory organization.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:03 +02:00