Commit graph

4 commits

Author SHA1 Message Date
Lin Jinhan
fb9230c53b arm: dts: rockchip: px30: add and enable rng node
Add enable rng node in px30-evb-u-boot.dtsi.

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-29 10:30:55 +08:00
Kever Yang
1e1cb9539f rockchip: px30: add -u-boot dtsi for soc
Add soc level -u-boot.dtst so that boards can share the common nodes.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-28 20:47:44 +08:00
Heiko Stuebner
8019d32c47 rockchip: px30: enable spl-fifo-mode for both emmc and sdmmc on evb
As part of loading trustedfirmware, the SPL is required to place portions
of code into the socs sram but the mmc controllers can only do dma
transfers into the regular memory, not sram.

The results of this are not directly visible in u-boot itself, but
manifest as security-relate cpu aborts during boot of for example Linux.

There were a number of attempts to solve this elegantly but so far
discussion is still ongoing, so to make the board at least boot correctly
put both mmc controllers into fifo-mode, which also circumvents the
issue for now.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-11-23 23:41:44 +08:00
Heiko Stuebner
537b1a2774 rockchip: add px30 devicetrees
Add px30 related devicetrees synced from the Linux kernel.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17 17:23:20 +08:00