Commit graph

58412 commits

Author SHA1 Message Date
Hou Zhiqiang
2b12f6cfe6 powerpc: mpc85xx: Move CONFIG_FSL_PCIE_RESET to Kconfig
Use the Kconfig option to select the PCIe reset errata.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-20 10:44:09 +05:30
Hou Zhiqiang
c16dfd016a powerpc: mpc85xx: Move CONFIG_FSL_PCIE_DISABLE_ASPM to Kconfig
Use the Kconfig option to select the PCIe ASPM errata.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-20 10:43:55 +05:30
Tom Rini
63a4585791 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- LS1046AFRWY support
- USB errata fix and secure boot defconfig support for LS1028A
- Enabled SDHC and SATA for LX2160
- LS1046A serdes fixes
- other minor fixes
2019-06-19 14:01:11 -04:00
Patrick Delaunay
7c65468346 usb: dwc2: allow peripheral mode for OTG configuration
Allow device mode in DWC2 driver when device tree select the dr_mode
"peripheral" or "otg".

The device mode is not allowed when dr_mode = "host" in device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2019-06-19 16:56:11 +02:00
Patrick Delaunay
de6e4a6f5c ARM: dts: stm32mp1: remove override for g-tx-fifo-size
Remove the override for usbotg_hs on g-tx-fifo-size as the correct
binding, used in the kernel device tree, is now supported in dwc2
device driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-06-19 16:56:11 +02:00
Patrick Delaunay
7350a75b51 usb: dwc2: correctly handle binding for g-tx-fifo-size
Manage g-tx-fifo-size as a array as specify in the binding.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2019-06-19 16:56:11 +02:00
Udit Agarwal
da70f766dd board/freescale/common: secure_boot: Set bootdelay to -2.
Uboot prompt must not be available while running
secure boot. TO ensure this  bootdelay must be set
to -2.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Vabhav Sharma
d90c7ac7a9 armv8: ls1046afrwy: Add support for LS1046AFRWY platform
LS1046AFRWY board supports LS1046A family SoCs. This patch
add base support for this board.
Board support's 4GB ddr memory, i2c, micro-click module,microSD card,
serial console,qspi nor flash,ifc nand flash,qsgmii network interface,
usb 3.0 and serdes interface to support two x1gen3 pcie interface.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Wasim Khan
196fa2efbe armv8: ls2088ardb: Fix MC firmware loading during SD boot
During SD boot, MC firmware and DPC are copied from SD card to DDR.
Size reserved between MC and DPC firmware on DDR is 1MB.
If the size of MC firmware(load address 0x80000000) is more than 1 MB
then part of MC firmware will be overwritten by DPC firmware (load
address 0x80100000).

Fix: Update the MC/DPL/DPC firmware's DDR address as per their
respective addresses in SD card.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Wasim Khan
c3d141e03a armv8: ls2088aqds: Fix MC firmware loading during SD boot
During SD boot, MC firmware and DPC are copied from SD card to DDR.
Size reserved between MC and DPC firmware on DDR is 1MB.
If the size of MC firmware(load address 0x80000000) is more than 1 MB
then part of MC firmware will be overwritten by DPC firmware (load
address 0x80100000).

Fix: Update the MC/DPL/DPC firmware's DDR address as per their
respective addresses in SD card.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Wasim Khan
d7a4ddd3b2 armv8: ls2088aqds: Add bootcmd for TFA boot
Add bootcmd for IFC NOR boot and SD boot.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Alex Marginean
062d8148f8 arm: ls1028a: define the integrated PCI bus (ECAM)
LS1028A includes an integrated PCI bus with 11 PCI functions residing on
bus 0.  ECAM plus the device register space takes up 256MB of address
space.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Yinbo Zhu
0dd74ec2df armv8: fsl-lsch2: add clock support for the second eSDHC
Layerscape began to use two eSDHC controllers, for example,
LS1012A. They are same IP block with same reference clock.
This patch is to add clock support for the second eSDHC.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Maciej Pijanowski
fd90b6d5ab configs/ls1046ardb_*: disable CONFIG_SPI_FLASH_USE_4K_SECTORS
With this setting enabled, the on-board QSPI cannot be
properly flashed. There are no error messages, but the simple
write / read / compare tests fail.

This is already disabled in the qspi and tfa defconfigs for the
LS1046ARDB platform.

Signed-off-by: Maciej Pijanowski <maciej.pijanowski@3mdeb.com>
Cc: piotr.krol@3mdeb.com
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Maciej Pijanowski
c34d8dcb3e arm: fsl-layerscape: add 0x3040 serdes1 settings for LS1046A
Signed-off-by: Maciej Pijanowski <maciej.pijanowski@3mdeb.com>
Cc: piotr.krol@3mdeb.com
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Maciej Pijanowski
73420f0220 arm: fsl-layerscape: fix 0x3363 serdes1 settings for ls1046a
As per LS1046A hardware manual, SGMII.9 and SGMII.10 present on
lane D and lane C respectively for 0x3363 protocol.

So fix serdes1 settings for ls1046a.

Signed-off-by: Maciej Pijanowski <maciej.pijanowski@3mdeb.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Ashish Kumar
7494232700 configs: Unset CONFIG_SPI_FLASH_BAR, move CONFIG_FSL_QSPI to defconfig
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Alex Marginean
4da0e52c9d armv8: fsl-layerscape: fix config dependency for layerscape pci code
Fixes a link error on layerscape platform, linking fails with CONFIG_PCI
set and CONFIG_PCI_LAYERSCAPE unset.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Pankit Garg
ab748801ef armv8: fsl-layerscape: Change bootcmd update logic
Change bootcmd update logic when CONFIG_ENV_ADDR is not defined

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Pankit Garg
4514ccef91 ls1046ardb: Add CONFIG_ENV_ADDR to init env in qspi boot
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Pankit Garg
293d75c0b1 armv8: fsl-layerscape: Update qspi clk cfg
Update qspi clock configuration in TFABOOT in case
of all boot sources except qspi boot source.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Peng Ma
f68ce9e9ac ARM: dts: ls1021a: Fixed reg for sata node
This patch is to fixed the reg read to "0" for armv7
architecture.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Meenakshi Aggarwal
1dff14c87d armv8/fsl-layerscape: Add loop to check L3 dcache status
Flushing L3 cache may need variable time depending upon cache line
allocation.

Coming up with a proper timeout value would be best handled by
simulations under multiple scenarios in your actual system.
>From the purely HN-F point of view, the flush would take ~15 cycles for
a clean line, and ~22 cycles for a dirty line.  For the dirty line case,
there are many variables outside the HN-F that will increase the
duration per line.  For example, a *DBIDResp from the SN-F/SBSX,
memory controller latency, SN-F/SBSX RetryAck responses, CCN ring
congestion, CCN ring hops, etc, etc.  The worst-case timeout would
have to factor in all of these variables plus the HN-F cycles for
every line in the L3, and assuming all lines are dirty

In case if L3 is not flushed properly, system behaviour will be
erratic, so remove timeout and add loop to check status of L3 cache.

System will stuck in while loop if there is some issue in L3 cache
flushing.

Signed-off-by: Udit Kumar <udit.kumar@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Yinbo Zhu
85e5e21981 armv8: lx2160aqds: Enable eSDHC controllers
This patch is to enable esdhc controllers for lx2160aqds

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Yuantian Tang
a1e126bf8d armv8: ls1028a: Add secure boot defconfig
Add secure boot defconfig for ls1028aqds and ls1028ardb boards.

Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Mian Yousaf Kaukab
9029fa115a board: lx2160a: use default scan_dev_for_boot
Default environment variable is more complete. Also scans for efi
binaries for example.

Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Mian Yousaf Kaukab
de0f9ad1de board: lx2160a: fix fsl-mc status in fdt with bootefi
fsl-mc lazyapply command applies dpl from efi_exit_boot_services().
Status of fsl-mc node in working fdt is updated at this stage.
However, an efi application like grub may already have copied the fdt.
So the updates to fdt done at efi_exit_boot_services() may not be
visible to the OS. Fix it by updating fdt earlier if fsl-mc lazyapply
command is used.

Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
Peng Ma
91f54e7c61 armv8: ls1028a: Add ecc address node for sata.
Move the ecc addr from driver to dts

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:56 +05:30
Yangbo Lu
66fa035b55 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled
u-boot is trying to make CONFIG_BLK as a hard requirement
for DM_MMC. But now it's still not.

config BLK
	bool "Support block devices"
	depends on DM
	default y if DM_MMC

When fsl_esdhc driver was reworked for DM_MMC support, DM_MMC
without CONFIG_BLK enabled wasn't considered. This patch is to
fix probe issue without CONFIG_BLK enabled.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:56 +05:30
Yangbo Lu
087bfe67ac armv8: fsl-lsch3: add clock support for the second eSDHC
Layerscape began to use two eSDHC controllers, for example,
LS1028A. They are same IP block with same reference clock.
This patch is to add clock support for the second eSDHC.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:56 +05:30
Peng Ma
d17eb57dcf armv8: lx2160aqds: Enable sata
Change sata node status to enable sata.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:56 +05:30
Xiaowei Bao
36f50b7523 armv8: ls1028a: Add other serdes protocal support
Add other serdes protocal support.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:56 +05:30
Yinbo Zhu
123fbbbe84 armv8: ls1028a: enable workaround for USB errarum A-009007
Rx Compliance tests may fail intermittently at high jitter
frequencies using default register values.

So program register USB_PHY_RX_OVRD_IN_HI in certain sequence
to make the Rx compliance test pass.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:56 +05:30
Ran Wang
3458a4198c armv8: ls1028a: enable workaround for USB erratum A-008997
Enable workaround for USB erratum A-008997. Here PCSTXSWINGFULL
registers has been moved to DSCR as compared to other Layerscape SoCs
where it was in SCFG.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:56 +05:30
Pankaj Bansal
1be0c66c79 board/fsl/layerscape: Modify the aliases names
when compiling dts file using DTC_FLAG='-@', the device tree compiler
reports these warnings:

Warning (alias_paths): /aliases: aliases property name must include
only lowercase and '-'

Fixed the node aliases to silence these warnings.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:56 +05:30
Marek Vasut
72119aa14a mmc: Avoid HS400 mode when accessing boot partitions
U-Boot code currently only applies this restriction to HS200 mode,
extend this to HS400 mode as well.

Currently U-Boot code not support accessing boot partition in HS200/400
mode. This needs more check.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-06-19 13:53:59 +08:00
Patrice Chotard
5fa8fe105e MAINTAINERS: Remove Christophe Kerello from STM32MP entry
Christophe will not have maintainer activities, so remove its name.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Christophe Kerello <christophe.kerello@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
2019-06-18 16:38:08 +02:00
Patrice Chotard
29dff4d455 configs: stm32mp15: Select correct Ethernet driver for trusted mode
Select the correct Ethernet driver from Synopsis.
Initially, "Synopsys Designware Ethernet MAC" driver was wrongly
selected instead of "Synopsys DWC Ethernet QOS device" driver.

Fixes: commit f90b3f5b68 ("configs: stm32mp15: Enable Ethernet feature")

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-06-18 16:38:08 +02:00
Tom Rini
c3f43185ee Merge branch 'master' of git://git.denx.de/u-boot-spi
- Drop zipitz2 board (Tom)
- Add DEPRECATED option (Tom)
- Mark legacy or non-dm drivers as DEPRECATED (Jagan)
2019-06-17 11:32:22 -04:00
Tom Rini
c3e8aa1a9e Merge branch 'master' of git://git.denx.de/u-boot-usb
- Assorted gadget fixes
2019-06-17 11:27:21 -04:00
Tom Rini
77f6e2dd05 Pull request for UEFI sub-system for v2019.07-rc5 (2)
This pull request provides bug fixes for the UEFI sub-system. The most
 relevant one concerns the allocation of memory at address 0. It is
 needed for booting Linux on several boards via bootefi, e.g. the Asus
 TinkerBoard.
 
 An undefined reference bug in disk/part.c related to a division is
 resolved.
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Merge tag 'efi-2019-07-rc5-2' of git://git.denx.de/u-boot-efi

Pull request for UEFI sub-system for v2019.07-rc5 (2)

This pull request provides bug fixes for the UEFI sub-system. The most
relevant one concerns the allocation of memory at address 0. It is
needed for booting Linux on several boards via bootefi, e.g. the Asus
TinkerBoard.

An undefined reference bug in disk/part.c related to a division is
resolved.
2019-06-15 13:03:00 -04:00
Tom Rini
f681eacbfe Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- SPL size check for Gen5, i2c enablement for S10
2019-06-15 13:02:26 -04:00
Tom Rini
8f93213227 Merge branch 'master' of git://git.denx.de/u-boot-sh
- More board removal
2019-06-15 13:02:12 -04:00
Tom Rini
8754656680 Merge branch '2019-06-14-master-imports'
- Kconfig migrations of SPL_BOOT_xxx, SYS_LDSCRIPT, IP_DEFRAG,
  TFTP_BLOCKSIZE.
- Typo fixes, other minor corrections.
2019-06-15 12:58:06 -04:00
Bartosz Golaszewski
75846445ed cmd: define CMD_DATA_SIZE when CONFIG_CMD_SETEXPR is selected
The setexpr shell command calls cmd_get_data_size() which is only built
when CMD_DATA_SIZE is defined. We need to define CMD_DATA_SIZE if
CONFIG_CMD_SETEXPR is selected or the build will fail if no other
command selecting this option is enabled.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-06-14 16:10:50 -04:00
Tom Rini
d760a5efb9 configs: Migrate CONFIG_SYS_LDSCRIPT to Kconfig
In order to migrate this symbol to Kconfig introduce a new symbol to
guard it, CONFIG_SYS_CUSTOM_LDSCRIPT.  When that is set we can then
provide the exact final location o the script.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-06-14 16:10:49 -04:00
Tom Rini
c7110a0ad5 configs: Remove unneeded CONFIG_SYS_LDSCRIPT instances
A number of boards set CONFIG_SYS_LDSCRIPT and then end up using one of
the default searched LDSCRIPT paths.  Remove these customizations.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-06-14 16:10:49 -04:00
Tom Rini
db4080d56d configs: Migrate the various SPL_BOOT_xxx choices for PowerPC
The non-CONFIG_SPL_FRAMEWORK SPL used on some PowerPC platforms have a
choice between CONFIG_SPL_NAND_BOOT, CONFIG_SPL_MMC_BOOT and
CONFIG_SPL_SPI_BOOT.  Migrate this to Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-06-14 16:10:49 -04:00
Andy Shevchenko
69264f4993 common: Fix a typo abnove -> above
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-06-14 16:10:48 -04:00
Simon Goldschmidt
c78b5cb7d3 tools: add tools/spl_size_limit to ignore list
This tool has just been added but it seems I forgot to add it to
the ignore list. So to prevent the built binary being marked as
unversioned, add it to the ignore list.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-06-14 16:10:48 -04:00