4 commits

Author	SHA1	Message	Date
Patrick Delaunay	9368bdfebd	ram: stm32mp1: the property st, phy-cal becomes optional ... This parameter "st,phy-cal" becomes optional and when it is absent the built-in PHY calibration is done. It is the case in the helper dtsi file "stm32mp15-ddr.dtsi" except if DDR_PHY_CAL_SKIP is defined. This patch also impact the ddr interactive mode - the registers of the param 'phy.cal' are initialized to 0 when "st,phy-cal" is not present in device tree (default behavior when DDR_PHY_CAL_SKIP is not activated) - the info 'cal' field can be use to change the calibration behavior - cal=1 => use param phy.cal to initialize the PHY, built-in training is skipped - cal=0 => param phy.cal is absent, built-in training is used (default) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Patrice Chotard <patrice.chotard@st.com>	2020-03-24 14:23:30 +01:00
Patrick Delaunay	53bb831658	stm32mp1: ram: update parameter array initialization ... Force alignment of the size of parameters array with the expected value in the binding, that allows compilation error when the array size change. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>	2019-05-23 11:38:10 +02:00
Patrick Delaunay	c60fed14f6	stm32mp1: ram: change ddr speed to kHz ... Allow fractional support in DDR tools. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>	2019-05-23 11:38:10 +02:00
Patrick Delaunay	3a29afcbbf	doc: binding: rename directory ram to memory-controller ... Alignment with kernel directory name as it have already bindings for DDR controllers in the directory: Documentation/devicetree/bindings/memory-controller PS: the drivers using RAM u-class should be associated with this binding directory Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>	2019-02-28 14:21:46 -05:00

Renamed from doc/device-tree-bindings/ram/st,stm32mp1-ddr.txt (Browse further)