Commit graph

2319 commits

Author SHA1 Message Date
Mike Frysinger
f8f0757dcb sf: localize erase funcs
No need for these to be exported as they are only accessed indirectly
via function pointers.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-12 02:15:56 -04:00
Mike Frysinger
c5910874ba sf: sst: setup read func
The previous unification patch missed setting up the sst read func.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-12 02:15:54 -04:00
Richard Retanubun
4e6a515899 sf: add struct spi_flash.sector_size parameter
This patch adds a new member to struct spi_flash (u16 sector_size)
and updates the spi flash drivers to start populating it.

This parameter can be used by spi flash commands that need to round
up units of operation to the flash's sector_size.

Having this number in one place also allows duplicated code to be
further collapsed into one common location (such as erase parameter
and the detected message).

Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-12 02:15:37 -04:00
Mike Frysinger
cdb6a00fb8 sf: atmel: undo unification of status polling
The AT45 flashes are completely different (at the command set and
status register level) from all other SPI flashes, so we can't unify
their logic with common code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 23:41:09 -04:00
Macpaul Lin
9096963c72 ftwdt010_wdt: support faraday ftwdt010 watchdog
Faraday ftwdt010 watchdog is an architecture independant
watchdog. It is usually used in SoC chip design.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-04-11 22:47:52 +02:00
Roy Zang
2c2668f971 Net: Add Intel E1000 82574L PCIe card support
Add Intel E1000 82574L PCIe card support. Test on MPC8544DS
and MPC8572 board.
Add the missing contact information for future support.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-11 22:20:13 +02:00
Ben Gardiner
7d2fade7b1 ea20: fix undefined PHY_* errors
This patch fixes ea20 after 8ef583a035 where
the u-boot custom PHY_ macros were replaced with those of linux/mii.h MII_
definitions except in the RMII support for davinci_emac. Probably also due to
the merge path of changes in 2010.12.

Signed-off-by: Ben Gardiner<bengardiner@nanometrics.ca>
CC: Mike Frysinger <vapier@gentoo.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 21:28:44 +02:00
Mike Frysinger
a4c3b40b33 sf: unify read functions
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 21:00:55 +02:00
Mike Frysinger
e7b44eddbe sf: unify erase functions
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 21:00:54 +02:00
Mike Frysinger
6163045bcd sf: unify status polling for ready bit
All of the spi flash drivers implement the status register polling for
detecting the device ready state, so unify them all in a new helper
function -- spi_flash_wait_ready.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 21:00:53 +02:00
Mike Frysinger
000044d8bf sf: unify read/write helpers
These functions largely do the same exact thing, so unify them all
into one basic function.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 21:00:49 +02:00
Wolfgang Denk
17e967b3df Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2011-04-10 21:24:40 +02:00
Wolfgang Denk
a8708a8634 Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2011-04-10 21:06:27 +02:00
Priyanka Jain
32c8cfb23c fsl_esdhc: Deal with watermark level register related changes
P1010 and P1014 has v2.3 version of FSL eSDHC controller in which watermark
level register description has been changed:

9-15 bits represent WR_WML[0:6], Max value = 128 represented by 0x00
25-31 bits represent RD_WML[0:6], Max value = 128 represented by 0x00

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:55 -05:00
Sonic Zhang
21a50374d5 Blackfin: bfin_sdh: add support for multiblock operations
Don't forget to count full data size for the multiblock operation request.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Cliff Cai
1fd2d792a2 Blackfin: bfin_sdh: set all timer bits before transfer
The timer register is 32bits, not 16bit, so 0xFFFF won't fill it.
Write out -1 to make sure to fill the whole thing.

Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Mike Frysinger
cca07417d5 Blackfin: BF50x: new processor port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Heiko Schocher
6ee1416e81 mtd, cfi: introduce void flash_protect_default(void)
collect code which protects default sectors in a function, called
flash_protect_default. So boardspecific code can call it too.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-07 10:20:22 +02:00
Mario Schuknecht
2c9f48af73 cfi_flash: use AMD fixups for AMIC (e.g. A29L160A series) too
Signed-off-by: Mario Schuknecht <m.schuknecht@dresearch.de>
Signed-off-by: Steffen Sledz <sledz@dresearch.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-07 10:10:47 +02:00
Haiying Wang
a52d2f816d powerpc/85xx: Add P1021 specific QE and UEC support
P1021 has some QE pins which need to be set in pmuxcr register before
using QE functions. In this patch, pin QE0 and QE3 are set for UCC1 and
UCC5 in Eth mode.  QE9 and QE12 are set for MII management. QE12 needs to
be released after MII access because QE12 pin is muxed with LBCTL signal.

Also added relevant QE support defines unique to P1021.

The P1021 QE is shared on P1012, P1016, and P1025.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-05 10:18:39 -05:00
Wolfgang Denk
4db2fa7f94 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Conflicts:
	drivers/usb/host/ehci-pci.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-04-05 12:24:20 +02:00
Li Yang
19d68d2027 tsec: add AR8021 PHY support
Signed-off-by: Li Yang <leoli@freescale.com>
2011-04-04 09:24:43 -05:00
Zhao Chenhui
298f8af17b echi: add ULI1575 PCI ID
Add ULI1575 EHCI controller to the list of the supported devices.

Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Acked-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Kumar Gala
7639675131 powerpc/8xxx: Fix LAW init to respect pre-initialized entries
If some pre-boot or earlier stage bootloader (NAND SPL) has setup LAW
entries consider them good and mark them used.

In the NAND SPL case we skip re-initializing based on the law_table
since the SPL phase already did that.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Prabhakar Kushwaha
b6ccd2c9de fsl_pci: Add support for FSL PCIe controllers v2.x
FSL PCIe controller v2.1:
	- New MSI inbound window
	- Same Inbound windows address as PCIe controller v1.x

Added new pit_t member(pmit) to struct ccsr_pci for MSI inbound window

FSL PCIe controller v2.2 and v2.3:
	- Different addresses for PCIe inbound window 3,2,1
	- Exposed PCIe inbound window 0
	- New PCIe interrupt status register

Added new Interrupt Status register to struct ccsr_pci & updated pit_t array
size to reflect the 4 inbound windows.

To maintain backward compatiblilty, on V2.2 or greater controllers we
start with inbound window 1 and leave inbound 0 with its default value
(which maps to CCSRBAR).

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Trübenbach, Ralf
0a5f7e1bdc ehci-pci: Add PCI EHCI controller
This patch adds support for the PI7C9X442SL PCIe EHCI host controller
from Pericom.

Tested at P4080DS eval board from Freescale.

Signed-off-by: Ralf Trübenbach <ralf.truebenbach@men.de>
Cc: Remy Bohmer <linux@bohmer.net>
2011-04-02 09:38:24 +02:00
Mike Frysinger
081b59e453 usb: musb: blackfin: check anomaly workarounds at runtime too
The anomaly workarounds we need for older silicon might break things
if used on newer versions where the anomalies don't exist.  So check
the silicon rev at runtime too.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-02 09:38:24 +02:00
Mike Frysinger
38e0745e4d usb: musb: blackfin: make clkin configurable
Not everyone has a 24MHz clkin to the USB, so let board porters override.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-02 09:38:24 +02:00
michael
67a490d60d atmel_nand: don't require CONFIG_SYS_NAND_ENABLE_PIN
If NCE is hooked up to NCS3, we don't need to (and can't)
explicitly set the state of the NCE pin. Instead, the
controller asserts it automatically as part of a
command/data access. Only "CE don't care"-type NAND chips
can be used in this manner.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-04-01 14:49:08 -05:00
Florian Fainelli
0272c718ba NAND: add support for reading ONFI page table
This patch adds support for reading an ONFI page parameter from a NAND
device supporting it. If this is the case, struct nand_chip onfi_version
member contains the supported ONFI version, 0 otherwise.

This allows NAND drivers past nand_scan_ident to set the best timings for the
NAND chip.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-04-01 14:49:08 -05:00
Scott Wood
6f2ffc3da2 NAND: add more watchdog resets
Poke the watchdog in a variety of looping constructs, which could take
a long time to complete.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-04-01 14:49:08 -05:00
Wolfgang Denk
b12fee010c Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2011-03-31 09:01:36 +02:00
Prabhakar Kushwaha
b03a466d6c powerpc/85xx: Handle PCIe initialization requires for P1021 class SoCs
The P1011, P1012, P1015, P1016, P1020, P1021, P1024, & P1025 SoCs require
that we initialize the SERDES registers if the lanes are configured for
PCIe.  Additionally these devices PCIe controller do not support ASPM
and we have to explicitly disable it.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-29 07:41:37 -05:00
Martin Krause
af56730153 cfi_flash: fix bug with flash banks with different sector numbers
The function find_sector() does not take into account if the flash bank
has changed since the last call. This could lead to illegal accesses inside
and beyond the flash_info_t info strcture. For example if the current
flash bank has less sectors than the last used flash bank.

This patch adds two cheks. One that insures, that the current sector does
not exceed the allowed maximum (which is always a good idea). And one that
checks if the current access is to the same flash bank as the last access.
If not, the search loop will start with sector 0.

Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-03-28 19:06:51 +02:00
Wolfgang Denk
14666418e9 Coding Style cleanup: remove trailing empty lines
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-03-27 21:48:08 +02:00
Chander Kashyap
f69bb51145 S5P: mmc: Resolved interrupt error during mmc_init
Blocksize was hardcoded to 512 bytes. But the blocksize varies
depeding on various mmc subsystem commands (between 8 and 512).
This hardcoding was resulting in interrupt error during data
transfer.

It is now calculated based upon the request sent by mmc subsystem.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:20:26 +02:00
Po-Yu Chuang
8d8fd5b696 net: ftmac100: update get_timer() usages
Use get_timer() the same way as drivers/net/ftgmac100.c

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Reviewed-by: Macpaul Lin <macpaul@gmail.com>
Tested-by: Macpaul Lin <macpaul@gmail.com>
2011-03-21 22:54:23 +01:00
Po-Yu Chuang
6f6e6e09b2 net: ftmac100: remove unnecessary volatiles
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Reviewed-by: Macpaul Lin <macpaul@gmail.com>
Tested-by: Macpaul Lin <macpaul@gmail.com>
2011-03-21 22:53:30 +01:00
Yoshihiro Shimoda
903de461e4 net: sh_eth: add support for SH7757's ETHER
SH7757 has ETHER and GETHER. This patch supports EHTER only.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-03-16 10:16:34 +09:00
Priyanka Jain
b71ea33699 fsl_esdhc: Correcting esdhc timeout counter calculation
- Timeout counter value is set as DTOCV bits in SYSCTL register
  For counter value set as timeout,
  Timeout period = (2^(timeout + 13)) SD Clock cycles

- As per 4.6.2.2 section of SD Card specification v2.00, host should
  cofigure timeout period value to minimum 0.25 sec.

- Number of SD Clock cycles for 0.25sec should be minimum
	(SD Clock/sec * 0.25 sec) SD Clock cycles
	= (mmc->tran_speed * 1/4) SD Clock cycles

- Calculating timeout based on
	(2^(timeout + 13)) >=  mmc->tran_speed * 1/4
	Taking log2 both the sides and rounding up to next power of 2
	=> timeout + 13 = log2(mmc->tran_speed/4) + 1

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-07 08:49:28 -06:00
Kumar Gala
8e29ebabf8 fsl_law: Fix LAW printing function
We had an extra '0x' in the output of the LAWAR header that would cause
output like:

LAWBAR11: 0x00000000 LAWAR0x11: 0x80f0001d

intead of:

LAWBAR11: 0x00000000 LAWAR11: 0x80f0001d

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-22 23:25:19 -06:00
Lei Wen
a03774ed88 mvmfp: add MFP configuration support for PANTHEON
This patch adds the Multiple Function Pin configuration support for
Marvell PANTHEON SoCs

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-02-21 08:30:55 +01:00
Lei Wen
b5d807f64d serial: add pantheon soc support
Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-02-21 08:30:55 +01:00
Tom Warren
2ee3678159 serial: Add Tegra2 serial port support
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-02-21 08:30:55 +01:00
Vitaly Kuzmichev
e4ae66608b USB-RNDIS: Send RNDIS state on disconnecting
Add waiting for receiving Ethernet gadget state on the Windows host
side before dropping pullup, but keep it for debug.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2011-02-19 20:32:38 +01:00
Vitaly Kuzmichev
7612a43d08 USB: Add USB RNDIS gadget protocol
Port USB gadget RNDIS protocol support from linux-2.6.26
(.27 gadget stack actually has composite drivers).

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2011-02-19 20:32:37 +01:00
Vitaly Kuzmichev
8b6b66b427 USB-CDC: Move struct declaration before its use
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2011-02-19 20:32:37 +01:00
Vitaly Kuzmichev
c85d70ef64 USB-CDC: Port struct net_device_stats
Port struct net_device_stats and statistics collecting needed for
RNDIS protocol.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2011-02-19 20:32:37 +01:00
Vitaly Kuzmichev
b3649f3bbf USB-CDC: handle interrupt after dropped pullup
Disconnecting USB gadget with pending interrupt may cause its wrong
handling in the next time when interface will be started again
(especially actual for RNDIS). This interrupt may force the gadget
to queue unexpected response before setup stage.
Despite the fact that such interrupt handled after dropped pullup
also may add pending response, this will not bring to any issues due to
usb_ep_disable (which clears the queue) called on gadget unregistering.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2011-02-19 20:32:36 +01:00
Simon Glass
9b70e00773 Add support for ASIX AX88772 USB 2.0 10/100Mbit Ethernet Adaptor
Driver originally written by NVIDIA Corporation, modified to
handle odd-length packets.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-02-19 20:32:36 +01:00