Commit graph

47821 commits

Author SHA1 Message Date
Masahiro Yamada
f2ce50b2d0 ARM: uniphier: compute SSCPLL values more precisely
Use DIV_ROUND_CLOSEST().  To make the JK value even more precise,
I used a bigger coefficient, then divide it by 512.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12 00:36:11 +09:00
Dai Okamura
c30c44e799 ARM: uniphier: fix SSCPLL init code for LD11 SoC
Commit 682e09ff9f ("ARM: uniphier: add PLL init code for LD20 SoC")
missed to write the computed value to the SSCPLLCTRL2 register.

Fixes: 682e09ff9f ("ARM: uniphier: add PLL init code for LD20 SoC")
Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12 00:36:11 +09:00
Masahiro Yamada
dc774e69bb mtd: nand: denali: make NAND_DENALI unconfigurable option
denali.c has no driver entry in itself.  It makes sense only when
compiled together with denali_dt.c

Let NAND_DENALI_DT select NAND_DENALI, and hide NAND_DENALI from
the Kconfig menu.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12 00:36:11 +09:00
Masahiro Yamada
00ed0e3ee3 ARM: uniphier: compile pll-base-ld20.c for PXs3
Fix the link error for the combination of
  CONFIG_ARCH_UNIPHIER_LD11=n
  CONFIG_ARCH_UNIPHIER_LD20=n
  CONFIG_ARCH_UNIPHIER_PXS3=y

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12 00:35:59 +09:00
Eugeniy Paltsev
e80dac0ab8 ARC: clk: introduce HSDK CGU clock driver
Synopsys HSDK clock controller generates and supplies clocks to various
controllers and peripherals within the SoC.

Each clock has assigned identifier and client device tree nodes can use
this identifier to specify the clock which they consume. All available
clocks are defined as preprocessor macros in the
dt-bindings/clock/snps,hsdk-cgu.h header and can be used in device
tree sources.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11 11:36:23 +03:00
Eugeniy Paltsev
3cf239394a ARC: cache: explicitly initialize "*_exists" variables
dcache_exists, icache_exists, slc_exists and ioc_exists global
variables in "arch/arc/lib/cache.c" remain uninitialized if
SoC doesn't have corresponding HW.

This happens because we use the next constructions for their
definition and initialization:
-------------------------->>---------------------
int ioc_exists __section(".data");

if (/* condition */)
		ioc_exists = 1;
-------------------------->>---------------------

That's quite a non-trivial issue as one may think of it.
The point is we intentionally put those variables in ".data" section
so they might survive relocation (remember we initilaize them very early
before relocation and continue to use after reloaction). While being
non-initialized and not explicitly put in .data section they would end-up
in ".bss" section which by definition is filled with zeroes.
But since we place those variables in .data section we need to care
about their proper initialization ourselves.

Also while at it we change their type to "bool" as more appropriate.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11 11:36:22 +03:00
Eugeniy Paltsev
64f4742631 ARC: add defines of some cache and xCCM AUX registers
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11 11:36:22 +03:00
Eugeniy Paltsev
e59c379720 ARC: add macro to get CPU id
ARCNUM [15:8] field in ARC_AUX_IDENTITY register allows us to
uniquely identify each core in a multi-core system.

I.e. with help of this macro each core may get its index in SMP system.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11 11:36:22 +03:00
Eugeniy Paltsev
4e782b5940 ARC: HSDK: Fixup DW SDIO CIU frequency to 50000000Hz
DW SDIO controller has external CIU clock divider controlled via
register in the SDIO IP. Due to its unexpected default value
(we expected it to divide by 1 but in reality it divides by 8)
SDIO IP uses wrong CIU clock (it should be 100000000Hz but actual
is 12500000Hz) and works unstable (see STAR 9001204800).

So increase SDIO CIU frequency from actual 12500000Hz to 50000000Hz
by switching from the default divisor value (div-by-8) to the
minimum possible value of the divisor (div-by-2) in HSDK platform
code.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11 11:36:22 +03:00
Eugeniy Paltsev
fc86faf9d6 ARC: add asm/gpio.h to fix compilation error with CONFIG_CMD_GPIO
With CONFIG_CMD_GPIO compilation reports error:
-------------------------->8---------------------
common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory
 #include <asm/gpio.h>
                      ^
-------------------------->8---------------------

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-10 21:13:05 +03:00
Masahiro Yamada
8755ceb5b8 ARM: socfpga: remove unneeded CONFIG_SYS_NAND_USE_FLASH_BBT
Neither denali.c nor denali_spl.c references this option.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-09 13:40:33 +01:00
Masahiro Yamada
c63e22ea40 ARM: socfpga: remove unused CONFIG_NAND_DENALI_ECC_SIZE
This option is no longer used.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-09 13:40:33 +01:00
Chris Brandt
243fd6420d usb: r8a66597: convert wait loop to readw_poll_timeout
It is better to use an existing wait loop implementation.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
2017-12-09 13:39:27 +01:00
Marek Vasut
7387d4c234 ARM: rmobile: Add R8A77995 D3 Draak board
Add bits to support yet another board, the R8A77995 D3 Draak.
The DT file is from Linux 4.15-rc1 , commit
b35334447513c14a4dd55a67c269a743d4a4824b .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:27 +01:00
Marek Vasut
d21f08ba81 ARM: rmobile: Add R8A77970 V3M Eagle board
Add bits to support yet another board, the R8A77970 V3M Eagle.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:27 +01:00
Marek Vasut
9e4a63736e net: ravb: Add R8A77995 D3 compatible
Add new compatible to the Ethernet AVB driver for R8A77995 D3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:26 +01:00
Marek Vasut
dc3bb3d41e net: ravb: Add R8A77970 V3M compatible
Add new compatible to the Ethernet AVB driver for R8A77970 V3M SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:26 +01:00
Marek Vasut
af098530e5 mmc: uniphier-sd: Add R8A77995 D3 compatible
Add new compatible to the Uniphier SD driver for R8A77995 D3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:26 +01:00
Marek Vasut
6ba2382f42 mmc: uniphier-sd: Add R8A77970 V3M compatible
Add new compatible to the Uniphier SD driver for R8A77970 V3M SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:26 +01:00
Marek Vasut
e3ab42480e gpio: rmobile: Add generic Gen3 compatible
Add generic compatible to the GPIO driver for Gen3 SoCs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:26 +01:00
Marek Vasut
f122c13bf5 gpio: rmobile: Add R8A77995 D3 compatible
Add new compatible to the GPIO driver for R8A77995 D3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:26 +01:00
Marek Vasut
0f2f0d89c4 gpio: rmobile: Add R8A77970 V3M compatible
Add new compatible to the GPIO driver for R8A77970 V3M SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:26 +01:00
Marek Vasut
a59e697618 pinctrl: rmobile: Add R8A77995 D3 PFC tables
Add PFC tables for R8A77995 D3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:26 +01:00
Marek Vasut
c106bb53ea pinctrl: rmobile: Add R8A77970 V3M PFC tables
Add PFC tables for R8A77970 V3M SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:26 +01:00
Marek Vasut
2c150950b0 clk: rmobile: Add R8A77995 D3 clock tables
Add clock tables for R8A77995 D3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:25 +01:00
Marek Vasut
7691ff2ada clk: rmobile: Add R8A77970 V3M clock tables
Add clock tables for R8A77970 V3M SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:25 +01:00
Marek Vasut
1154541a52 ARM: rmobile: Add R8A77995 SoC
Add bits to support yet another SoC, the R8A77995 D3 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:25 +01:00
Marek Vasut
5cb19e7ad5 ARM: rmobile: Add R8A77970 SoC
Add bits to support yet another SoC, the R8A77970 V3M .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:25 +01:00
Marek Vasut
894ee0575f clk: rmobile: Fix typo in R8A7796 RPC clock table entry
Fix a copy-paste typo in the clock table entry, s/7795/7796/.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:25 +01:00
Tom Rini
335f7b1290 Merge git://git.denx.de/u-boot-mpc85xx 2017-12-08 12:02:01 -05:00
Tom Rini
48f0e6bb37 Merge git://git.denx.de/u-boot-rockchip 2017-12-08 09:32:10 -05:00
Jakob Unterwurzacher
b32b1bd10b rockchip: rk3399-puma: preserve leading zeros in serial#
Linux preserves leading zeros in /proc/cpuinfo, so we
should as well.

Otherwise we have the situation that
/sys/firmware/devicetree/base/serial-number
and /proc/cpuinfo disagree in Linux.

Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-08 11:49:39 +01:00
Maxime Ripard
03eb76b9a6 sunxi: Add the TBS A711 tablet
The TBS Tablet sports an LVDS display, an eMMC, an external SD, USB devices
and USB OTG.

Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-12-08 10:51:43 +01:00
Tom Rini
6c7010b779 Merge git://git.denx.de/u-boot-fsl-qoriq 2017-12-07 17:56:51 -05:00
York Sun
e421b646fc armv8: fix gd after relocation
Commit 21f4486faa ("armv8: update gd after relocate") sets x18
without checking the return value of spl_relocate_stack_gd().

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Kever Yang <kever.yang@rock-chips.com>
CC: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-07 17:00:06 -05:00
Simon Glass
1d0f30a8e0 log: Add documentation
Add documentation for the log system.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07 15:17:00 -05:00
Simon Glass
20faa27c2b log: test: Add a pytest for logging
Add a test which tries out various filters and options to make sure that
logging works as expected.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07 15:17:00 -05:00
Simon Glass
e189a0bda8 log: sandbox: Enable logging
Enable all logging features on sandbox so that the tests can be run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07 15:17:00 -05:00
Simon Glass
af1bc0cf46 log: Plumb logging into the init sequence
Set up logging both before and after relocation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07 15:17:00 -05:00
Simon Glass
ef11ed8239 log: Add a test command
Add a command which exercises the logging system.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07 15:17:00 -05:00
Simon Glass
d5f61f272d log: Add a 'log level' command
Add a command for adjusting the log level.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07 15:17:00 -05:00
Simon Glass
c6d47535df log: Add a console driver
It is useful to display log messages on the console. Add a simple driver
to handle this.

Note that this driver outputs to the console, which may be serial or
video. It does not specifically select serial output.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07 15:17:00 -05:00
Simon Glass
e9c8d49d54 log: Add an implementation of logging
Add the logging header file and implementation with some configuration
options to control it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07 15:17:00 -05:00
Simon Glass
c5404b64fb Drop the log buffer
This does not appear to be used by any boards. Before introducing a new
log system, remove this old one.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07 15:17:00 -05:00
Simon Glass
0ad0458c76 usb: Correct use of debug()
With clang this gives a warning because hubsts appears to be used before
it is set, even if ultimately it is not used. Simplify the code to avoid
this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07 15:17:00 -05:00
Simon Glass
95b41b80d7 mtdparts: Correct use of debug()
The debug() macro now evaluates its expression so does not need #ifdef
protection. In fact the current code causes a warning with the new log
implementation. Adjust the code to fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07 15:17:00 -05:00
Simon Glass
0e98b0a650 Move debug and logging support to a separate header
Before adding new features, move these definitions to a separate header
to avoid further cluttering common.h.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07 15:17:00 -05:00
Simon Glass
64e9b4f346 Revert "sandbox: Drop special case console code for sandbox"
While sandbox works OK without the special-case code, it does result in
console output being stored in the pre-console buffer while sandbox starts
up. If there is a crash or a problem then there is no indication of what
is going on.

For ease of debugging it seems better to revert this change also.

This reverts commit d8c6fb8ced.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07 15:17:00 -05:00
Simon Glass
e341434a7f sandbox: Adjust pre-console address to avoid conflict
We cannot use sandbox memory at 0 since other things use memory at that
address. Move it up out of the way.

Note that the pre-console buffer is currently disabled with sandbox, but
this change will avoid confusion if it is manually enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07 15:17:00 -05:00
Simon Glass
0b189b6ce1 Revert "sandbox: remove os_putc() and os_puts()"
While sandbox works OK without the special-case code, it does result in
console output being stored in the pre-console buffer while sandbox starts
up. If there is a crash or a problem then there is no indication of what
is going on.

For ease of debugging it seems better to revert this change.

This reverts commit 47b98ad0f6.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07 15:17:00 -05:00