Commit graph

67076 commits

Author SHA1 Message Date
Bin Meng
6b62495026 Revert "riscv: Allow use of reset drivers"
This reverts commit 958a3f464c.

A more appropriate change below is already in mainline.
Commit fd31e4fd18 ("riscv: Do not build reset.c if SYSRESET is on")

Revert this patch, so that U-Boot can be built successfully for
SiFive Fu540 board.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
2020-07-24 14:55:31 +08:00
Bin Meng
d20d0a5777 azure: gitlab: travis: Update OpenSBI used for RISC-V testing
Change to use OpenSBI release v0.8 generic platform images for QEMU
RISC-V CI testing for azure, gitlab and travis-ci.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-24 14:55:24 +08:00
Jagan Teki
2270ae6388 sifive: fu540: Enable SF distro bootcmd
Enable SPI flash(SF) distro boot command in Sifive FU540.

This distro boot will read the boot script at specific
location at the flash and start sourcing the same.

Included the SF device at the last of the target devices
list since all the rest of the devices on the list have
more possibility to boot the distribution due to the
size of the SPI flash is concern.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Jagan Teki
ca0f93fb74 sifive: fu540: Add boot flash script offset, size
HiFive-Unleashed-A00 has SPI flash with 32MiB size.
So, let's use the script offset at the end of 4K.
This way it cannot overlap any offsets being used
by software components in flash layout.

So, SF distrocmd will pick the script at desired
script address and run.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Jagan Teki
662d518e8a sifive: fu540: Mark the default env as SPI flash
Mark the default U-Boot environment as SPI flash since
this is an on board flash device.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Jagan Teki
ff7d25e8db env: Enable SPI flash env for SiFive FU540
SPI flash device on HiFive Unleashed has 32MiB Size.

This patch adds SPI flash environment after U-Boot proper
partition with a size of 128KiB.

SPI flash partition layout(32MiB):
    0 - 34	: reserved for GPT header
   35 - 39	: unused
   40 - 2087	: loader1 (SPL, FSBL)
 2088 - 10279	: loader2 (U-Boot proper, U-Boot)
10280 - 10535	: environment
10536 - 65494	: rootfs
65528 - 65536	: distro script

Note: the loader1 must start from 40th sector even though
there are 6 free sectors prior since 40th sector is nearest
flash sector boundary. 

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Jagan Teki
4243ff11fe sifive: fu540: Add Booting from SPI
Add booting from SPI for SiFive Unleashed board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Jagan Teki
868e295ef7 sifive: fu540: Add runtime boot mode detection
Add support to detect boot mode at runtime for
SiFive FU540 boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Pragnesh Patel
3d5ac3536b riscv: sifive: fu540: Enable SiFive PWM driver
This patch enables SiFive PWM driver for the SiFive
Unleashed board.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:11 +08:00
Bin Meng
a0018fc820 riscv: Make SiFive HiFive Unleashed board boot again
Commit 40686c394e ("riscv: Clean up IPI initialization code")
caused U-Boot failed to boot on SiFive HiFive Unleashed board.

The codes inside arch_cpu_init_dm() may call U-Boot timer APIs
before the call to riscv_init_ipi(). At that time the timer register
base (e.g.: the SiFive CLINT device in this case) is unknown yet.

It might be the name riscv_init_ipi() that misleads people to only
consider it is related to IPI, but in fact the timer capability is
provided by the same SiFive CLINT device that provides the IPI.
Timer capability is needed for both UP and SMP.

Considering that the original refactor does have benefits, that it
makes the IPI code more similar to U-Boot initialization idioms.
It also removes some quite ugly macros. Let's do the minimal revert
instead of a complete revert, plus a fixes to arch_cpu_init_dm() to
consider the SPL case.

Fixes: 40686c394e ("riscv: Clean up IPI initialization code")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Leo Liang <ycliang@andestech.com>
2020-07-24 14:55:04 +08:00
Tom Rini
5d3a21df66 binman support for FIT
new UCLASS_SOC
 patman switch 'test' command
 minor fdt fixes
 patman usability improvements
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Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm

binman support for FIT
new UCLASS_SOC
patman switch 'test' command
minor fdt fixes
patman usability improvements
2020-07-23 15:56:06 -04:00
Tom Rini
56d37f1c56 Pull request for UEFI sub-system for efi-2020-10-rc1 (5)
The series provides bug fixes for:
 
 * crash in OS when accessing UEFI variables
 * returning from UEFI fit images to U-Boot
 * error handling for variable services provided by OP-TEE
 * error handling in EFI_FILE_PROTOCOL.Read()
 * missing function documentation
 
 The first patches needed to use intermediate certificates for
 secure boot are added. (The rest of the series requires
 updating sbsigntool in our CI systems.)
 
 Logging is enabled in the bootefi command.
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Merge tag 'efi-2020-10-rc1-5' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-10-rc1 (5)

The series provides bug fixes for:

* crash in OS when accessing UEFI variables
* returning from UEFI fit images to U-Boot
* error handling for variable services provided by OP-TEE
* error handling in EFI_FILE_PROTOCOL.Read()
* missing function documentation

The first patches needed to use intermediate certificates for
secure boot are added. (The rest of the series requires
updating sbsigntool in our CI systems.)

Logging is enabled in the bootefi command.
2020-07-23 08:57:35 -04:00
Tom Rini
95fc1f1647 Merge tag 'u-boot-rockchip-20200722' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- New rk3326 board: Hardkernel Odroid Go2;
- Update board config and dts for RockPI 4/N8/N10;
- Update led boot on support for roc-rk3399-pc;
- Enable SPI Flash suppor for rk3328 rock64 board;
- Update rockchip pcie phy to use generic framework;
2020-07-22 11:30:52 -04:00
Jagan Teki
8bedcf0ef9 rockchip: rock-p-n8/n10: Disable RAM_ROCKCHIP_DEBUG
Disable ram rockchip debug driver for ROCKPi N8/N10 boards
since we have verified ram in many instances with respective
U-Boot versions.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
318392a745 arm64: dts: rockchip: Add u-boot, spl-boot-order for ROCKPi N10
Add u-boot,spl-boot-order for ROCKPi N10, so-that it can able
to boot from eMMC and SDMMC in order.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
cfcbcb4668 rockchip: rock-pi-n10: Enable PCI/NVME
Enable PCI/NVME for M.2 Slot on RockPI-4 boards.

=> nvme info
Device 0: Vendor: 0x144d Rev: 4L1QCXB7 Prod: S35FNX0J623292
            Type: Hard Disk
            Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Suniel Mahesh
60edbfa1da rockchip: rock-pi-n8: Enable on board devices
Enable common on board devices for ROCKPi N8.

- USB 2.0 Host
- USB 2.0 OTG/Gadget
- HDMI Out

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Suniel Mahesh
c997d1c87b rockchip: evb_rk3288: Add console settings
Add console settings like stdin, stdout and stderr as
usbkbd and vidconsole respectively for evb-rk3288 targets.

This would certainly help to detect the attached video
devices (like HDMI) and print the console messages on display.

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Suniel Mahesh
d840cace52 rockchip: rock-pi-n10: Enable on board devices
Enable common on board devices for ROCKPi N10.

- USB 2.0 Host
- USB 3.0 Host
- USB 3.0 Gadget
- HDMI Out

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
e1e1c3de24 arm64: dts: rockchip: Add PCIe for RockPI N10
This patch adds support to enable PCIe for RockPI N10.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
5217f4991e arm: dts: rockchip: Add HDMI out for RockPI N8/N10
This patch adds support to enable HDMI out for
N10 and N8 combinations SBCs.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
87027292c1 ARM: dts: rockchip: Add USB for RockPI N8/N10
Radxa dalang carrier board has 2x USB 2.0 and 1x USB 3.0
ports.

This patch adds support to enable all these USB ports for
N10 and N8 combinations SBCs.

Note that the USB 3.0 port on RockPI N8 combination works
as USB 2.0 OTG since it is driven from RK3288.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
4b0446d57f ARM: dts: rockchip: Add usb host0 ohci node for rk3288
rk3288 and rk3288w have a usb host0 ohci controller.

Although rk3288 ohci doesn't actually work on hardware, but
rk3288w ohci can work well.

So add usb host0 ohci node in rk3288 dtsi and the quirk in
ohci platform driver will disable ohci on rk3288.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Suniel Mahesh
e70d826c06 arm: dts: rockchip: Sync rk3288 dtsi from linux
This sync has changes required to use HDMI CEC pin in U-Boot.

Sync dts from linux v5.8-rc5 commit:
	"ARM: dts: rockchip: define the two possible rk3288 CEC pins"
	(sha1: 838980dd04e994bf81cf104fa01ae60802146b39)

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
2710779efd ARM: dts: rockchip: Sync ROCKPi N8/N10 dts(i) from Linux
Sync ROCKPi N8/N10 dts(i) changes from Linux.

commit <afd9eb880414> ("ARM: dts: rockchip: Add Radxa Rock Pi N8 initial
support")

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
6d06ea6c94 rockchip: roc-rk3399-pc: Set LED only during POR and pwr_key=y
ROC-RK3399-PC has specific set of configurations for
on-board led setup.

Due to easiness for user to know the state of the board
roc-rk339-pc board code will setup the low power led
on/off, and waiting for user to press power key and then
glow full power led.

All this needs to happen only during power-on-reset not
for soft reset or WDT.

Also, it is not a proper usage to ask the user to press
the Power key if the board connected remotely, so add
the environment variable 'pwr_key' to check as well.

So, user need to press Power key only
- during POR
- pwr_key=y

Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
e230c579a3 rockchip: Separate the reset cause from display cpuinfo
reset cause is a generic functionality based on the soc
cru registers in rockchip. This can be used for printing
the cause of reset in cpuinfo or some other place where
reset cause is needed. 

Other than cpuinfo, reset cause can also be using during
bootcount for checking the specific reset cause and glow
the led based on the reset cause.

So, let's separate the reset cause code from cpuinfo, and
add a check to build it for rk3399, rk3288 since these two
soc are supporting reset cause as of now.

Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
88132e0a28 rockchip: Don't clear the reset status reg
reset reason can be used several stages of U-Boot bootloader
like SPL, U-Boot proper based on the requirements.

Clearing the status register end of get_reset_cause will end
up showing the wrong reset cause when it read the second time.
For example, if board resets, SPL reads the reset status as
RST whereas U-Boot proper reads the status as POR.

However, based on the latest testing clearing reset status
won't be required for determine the last reset cause or
following resets.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Kever Yang
b24405f39b rockchip: tpl: Remove board_early_init_f()
There is no need for board_early_init_f() in TPL, anything like this
should goes to SPL.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
9aed288060 rockchip: roc-rk3399-pc: Add custom led_setup()
roc-rk3399-pc has some specific requirements to support LEDS,
environment. board detection and etc prior to U-Boot proper.

So as of now SPL would be a better stage for these custom board
requirements to support unlike TPL. Adding few of these custom
requirements like LEDS in TPL would require extra code pulling
and also the size of TPL can grow.

So, this patch moves the leds code from TPL into SPL Board init
led_setup code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(split tpl.c change as separate patch)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
500d1e7749 rockchip: rk3399: Add weak led_setup()
Add weak led_setup() so that board which has an uncommon
led setup code that can make use of custom implementation.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
eab5c50a3b rockchip: rk3288: Add OF board setup
The new rk3288 revision rk3288w has some changes with respect
to legacy rk3288 like hclk_vio in cru and usb host0 ohci.

Linux clock driver already handle this via rockchip,rk3288w-cru
compatible.

USB ohci host can enable via dts for rk3288w based boards.

So, add fdt board setup code to update cru compatible with
rk3288w-cru compatible if the SOC revision is RK3288W.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
c60d1c4e17 rockchip: Add rk3288 SoC detection helper
Rockchip SoC's has a new revision chip for rk3288 SoCs.

RK3288 has a new revision chip called RK3288W which is similar
but different hclk_vio clock and fixed OHCI host.

Add common Rockchip SoC detection helper to support this rk3288w
detection.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
1f1395405f arm64: dts: rockchip: Add Radxa ROCK Pi 4C support
Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C.

So, add or enable difference nodes/properties in 4C dts
by including common dtsi.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
8d7192cb7f arm64: dts: rockchip: Add ROCKPi 4A/4B support
Rock PI 4 has 3 variants of hardware platforms called
RockPI 4A, 4B, and 4C.

- Rock PI 4A has no Wif/BT.
- Rock PI 4B has AP6256 Wifi/BT, PoE.
- Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enable
  GPIO pin change compared to 4B, 4C

So move common nodes, properties into dtsi file and include
on respective variant dts files.

Use 4B dts into default rock-pi-4 defconfig until we find any
solution for dynamic detection of these variants.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Kever Yang
fad823f45e rockchip: firefly-rk3399: enable CONFIG_USB_DWC3
To fix below build error:
drivers/usb/host/built-in.o: In function `xhci_dwc3_remove':
drivers/usb/host/xhci-dwc3.c:174: undefined reference to `dwc3_shutdown_phy'
drivers/usb/host/built-in.o: In function `xhci_dwc3_probe':
drivers/usb/host/xhci-dwc3.c:130: undefined reference to `dwc3_setup_phy'

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Kever Yang
6c041b35bf rockchip: rk3399: Add default env to support compressed kernel Image
Add default kernel_comp_addr_r and kernel_comp_size to support boot
from compressed kernel Image, this space is temporarily used during
decompress according to README.distro.

Reported-by: Tian Yuanhao <tianyuanhao@aliyun.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:56 +08:00
Alex Bee
90f740a06a rockchip: sdram: fix dram_init_banksize
Currently 2.5 GB is calculated as DRAM size for a 1 GB RK322x board
if CONFIG_SPL_OPTEE is set. This is troublesome when booting a
linux kernel since this size will be injected in FDT of the kernel.

gd->bd->bi_dram[0].start (which is basically CONFIG_SYS_SDRAM_BASE)
must not be taken into consideration for calculation of second bank
size, since this offset is already included in calculation of "top".

After applying this patch 992 MB (1024 MB - 32 MB reserved for
optee-os) is correctly calculated and has also been verified on
2 GB boards.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:52 +08:00
Jagan Teki
ad415c80a5 pci: rockchip: Drop legacy PHY driver
Drop the legacy PHY driver and it's associated code since
the PHY handling driver now part of Generic PHY framework.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:49 +08:00
Jagan Teki
ce920e0e56 pci: rockchip: Switch to generic-phy
Now, we have a PCIe PHY driver as part of the Generic
PHY framework. Let's use it instead of legacy PHY driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:47 +08:00
Jagan Teki
7bdeb4ef4c phy: Add Rockchip PCIe PHY driver
Add the Rockchip PCIe PHY driver as part of
Generic PHY framework.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:42 +08:00
Jagan Teki
80632e0485 rockchip: roc-rk3399-pc: Disable RAM_ROCKCHIP_DEBUG
Disable ram rockchip debug driver for roc-rk3399-pc
boards since we have verified ram in many instances
with respective U-Boot versions.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:36 +08:00
Kever Yang
b32858ca51 rockchip: ram: fix debug funcfion define when RAM_ROCKCHIP_DEBUG not set
The empty function define should not be in the header file, or else the
build will error with function multi definition after CONFIG_RAM_ROCKCHIP_DEBUG
is disabled.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:33 +08:00
Jagan Teki
40794c825f ram: rk3399: Mark existing prints via RAM_ROCKCHIP_DEBUG
Right now all these debug statements are printing on the
console to make sure proper dram initialization happens.  

Mark them into RAM_ROCKCHIP_DEBUG would be more meaningful
and work like before since the RAM_ROCKCHIP_DEBUG is by
default yet.

No functionality changes.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:28 +08:00
Jagan Teki
304eaae36b ram: rk3399: Drop debug stride in driver
stride debug is already present in sdram_common.c via
RAM_ROCKCHIP_DEBUG.

So, drop the redundant debug stride code in rk3399 driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:23 +08:00
Johannes Krottmayer
618db675c8 rockchip: rock64-rk3328_defconfig: Add SPI Flash support
Add U-Boot SPI Flash support for the PINE64 Rock64 board

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:21 +08:00
Johannes Krottmayer
61b229e24c ARM: dts: rk3328-rock64: Add SPI Flash support
Add U-Boot SPI Flash support for the PINE64 Rock64 board

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:16 +08:00
Johannes Krottmayer
b5716c1325 ARM: dts: rk3328: Add SPI support
Add U-Boot SPI support for the RK3328

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(fix checkpatch error for code ident)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:07 +08:00
Johannes Krottmayer
e93d2f4e96 drivers: spi: rk_spi: Add support for RK3328
Add support for the RK3328 SPI controller

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:03 +08:00
Johannes Krottmayer
19933b66f4 drivers: clk: rockchip: clk_rk3328: Add SPI support
Add SPI support for the RK3328 clock driver

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:00 +08:00