Commit graph

5 commits

Author SHA1 Message Date
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Joachim Foerster
03d67e1276 gpio: Add driver for Altera's PIO core
This driver may handle multiple PIO cores and thus needs to be
setup by calling the altera_pio_init() function within the early
board setup routine.

The driver comes with some extras, see below the copyleft header.

Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2011-10-28 09:50:49 +08:00
Joachim Foerster
b962ac794a altera_tse: Add support for dedicated descriptor memory
Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
2011-10-26 21:27:37 +02:00
Thomas Chou
030103d780 nios2: reset cfi flash before reading env
Flash might be in unknown state when u-boot is started with jtag.
And got wrong env data. So reset it in board early init.

We cannot use generic cfi flash routines, because flash_init() is
not run yet.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2011-04-08 09:02:27 -04:00
Thomas Chou
8cbb0ddd7e nios2: add nios2-generic board
This is a generic approach to port u-boot for nios2 boards.
You may find the usage of this approach on the nioswiki,
http://nioswiki.com/DasUBoot

A fpga parameter file, which contains base address information
and drivers declaration, is generated from Altera's hardware system
description sopc file using tools.

The example fpga parameter file is compatible with EP1C20, EP1S10
and EP1S40 boards. So these boards can be removed after this commit.
Though epcs controller is removed to cut the dependency of altera_spi
driver.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2010-04-24 18:21:23 -04:00